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rk3288 sleep support

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This commit is contained in:
xxx
2014-03-28 15:58:51 +08:00
parent 3f90324bec
commit 8db81b142f
7 changed files with 695 additions and 281 deletions
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1
arch/arm/boot/dts/rk3188.dtsi
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@@ -510,7 +510,6 @@
|RKPM_CTR_GTCLKS
|RKPM_CTR_PLLS
|RKPM_CTR_SYSCLK_DIV
|RKPM_CTR_NORIDLE_MD
)
>;
rockchip,pmic-gpios=<

6
arch/arm/boot/dts/rk3288-clocks.dtsi
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@@ -2158,7 +2158,7 @@
"reserved", "reserved", /*"g_clk_ddrphy0", "g_clk_ddrphy1",*/
"clk_jtag", "reserved"; /*"testclk_gate_en";*/
rockchip,suspend-clkgating-setting=<0x7000 0xf000>;
rockchip,suspend-clkgating-setting=<0xf000 0xf000>;
#clock-cells = <1>;
};
@@ -2190,7 +2190,7 @@
"g_hdmi_hdcp_clk", "g_ps2c_clk",
"usbphy_480m", "g_mipidsi_24m";
rockchip,suspend-clkgating-setting=<0x0000 0x0000>;
rockchip,suspend-clkgating-setting=<0x0100 0x0100>;
#clock-cells = <1>;
};
@@ -2355,7 +2355,7 @@
"g_aclk_dmac1", "g_aclk_strc_sys",
"g_p_ddrupctl0", "g_pclk_publ0";
rockchip,suspend-clkgating-setting=<0xe0f0 0xe0f0>;
rockchip,suspend-clkgating-setting=<0xe2f0 0xe2f0>;
#clock-cells = <1>;
};

20
arch/arm/boot/dts/rk3288.dtsi
View File

@@ -1050,15 +1050,17 @@
};
rockchip_suspend {
rockchip,ctrbits = <
(0
//|RKPM_CTR_PWR_DMNS
//|RKPM_CTR_GTCLKS
//|RKPM_CTR_PLLS
//|RKPM_CTR_SYSCLK_DIV
//|RKPM_CTR_NORIDLE_MD
)
>;
rockchip,ctrbits = <
(0
|RKPM_CTR_PWR_DMNS
|RKPM_CTR_GTCLKS
|RKPM_CTR_PLLS
//|RKPM_CTR_SYSCLK_DIV
//|RKPM_CTR_IDLEAUTO_MD
//|RKPM_CTR_ARMDP_LPMD
|RKPM_CTR_ARMOFF_LPMD
)
>;
rockchip,pmic-gpios=<
RKPM_PINGPIO_BITS_OUTPUT(GPIO0_A0,RKPM_GPIO_OUT_L)
RKPM_PINGPIO_BITS_INTPUT(GPIO0_A1,RKPM_GPIO_PULL_UP)

2
arch/arm/boot/dts/rk808.dtsi Normal file → Executable file
View File

@@ -15,7 +15,7 @@
regulator-initial-state = <3>;
regulator-state-mem {
regulator-state-mode = <0x2>;
regulator-state-enabled;
regulator-state-disabled;//disabled
regulator-state-uv = <900000>;
};
};

6
arch/arm/mach-rockchip/pm-rk3188.c Normal file → Executable file
View File

@@ -315,7 +315,7 @@ static u32 clk_sel0, clk_sel1, clk_sel10;
static u32 cpll_con3;
static u32 cru_mode_con;
void plls_suspend(void)
static void plls_suspend(void)
{
cru_mode_con = cru_readl(RK3188_CRU_MODE_CON);
cru_writel(RK3188_PLL_MODE_SLOW(RK3188_CPLL_ID), RK3188_CRU_MODE_CON);
@@ -357,7 +357,7 @@ void plls_suspend(void)
}
void plls_resume(void)
static void plls_resume(void)
{
//gpll
@@ -451,7 +451,7 @@ void PIE_FUNC(sysclk_resume)(u32 sel_clk)
}
void clks_gating_suspend_init(void)
static void clks_gating_suspend_init(void)
{
// get clk gating info
p_rkpm_clkgt_last_set= kern_to_pie(rockchip_pie_chunk, &DATA(rkpm_clkgt_last_set[0]));

853
arch/arm/mach-rockchip/pm-rk3288.c Normal file → Executable file
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File diff suppressed because it is too large Load Diff

88
arch/arm/mach-rockchip/rk3288.c
View File

@@ -80,7 +80,7 @@ static struct map_desc rk3288_io_desc[] __initdata = {
RK_DEVICE(RK_GPIO_VIRT(8), RK3288_GPIO8_PHYS, RK3288_GPIO_SIZE),
RK_DEVICE(RK_DEBUG_UART_VIRT, RK3288_UART_DBG_PHYS, RK3288_UART_SIZE),
RK_DEVICE(RK_GIC_VIRT, RK3288_GIC_DIST_PHYS, RK3288_GIC_DIST_SIZE),
RK_DEVICE(RK_GIC_VIRT + RK3288_GIC_DIST_SIZE, RK3288_GIC_DIST_PHYS + RK3288_GIC_DIST_SIZE, RK3288_GIC_CPU_SIZE),
RK_DEVICE(RK_GIC_VIRT + RK3288_GIC_DIST_SIZE, RK3288_GIC_CPU_PHYS, RK3288_GIC_CPU_SIZE),
RK_DEVICE(RK_BOOTRAM_VIRT, RK3288_BOOTRAM_PHYS, RK3288_BOOTRAM_SIZE),
RK_DEVICE(RK3288_IMEM_VIRT, RK3288_IMEM_PHYS, SZ_4K),
};
@@ -416,7 +416,6 @@ EXPORT_PIE_SYMBOL(DATA(sram_stack));
static int __init rk3288_pie_init(void)
{
int err;
if (!cpu_is_rk3288())
return 0;
@@ -434,7 +433,8 @@ static int __init rk3288_pie_init(void)
rockchip_sram_virt = kern_to_pie(rockchip_pie_chunk, &__pie_common_start[0]);
rockchip_sram_stack = kern_to_pie(rockchip_pie_chunk, (char *) DATA(sram_stack) + sizeof(DATA(sram_stack)));
return 0;
return 0;
}
arch_initcall(rk3288_pie_init);
#ifdef CONFIG_PM
@@ -493,53 +493,63 @@ int rk3288_sys_set_power_domain(enum pmu_power_domain pd, bool on)
static u32 rk_pmu_pwrdn_st;
static inline void rk_pm_soc_pd_suspend(void)
{
rk_pmu_pwrdn_st = pmu_readl(RK3288_PMU_PWR_STATE);
if(!(rk_pmu_pwrdn_st&BIT(pmu_pd_map[IDLE_REQ_GPU])))
rk3288_sys_set_power_domain(IDLE_REQ_GPU, false);
if(!(rk_pmu_pwrdn_st&BIT(pmu_pd_map[IDLE_REQ_HEVC])))
rk3288_sys_set_power_domain(IDLE_REQ_HEVC, false);
if(!(rk_pmu_pwrdn_st&BIT(pmu_pd_map[IDLE_REQ_VIO])))
rk3288_sys_set_power_domain(IDLE_REQ_VIO, false);
if(!(rk_pmu_pwrdn_st&BIT(pmu_pd_map[IDLE_REQ_VIDEO])))
rk3288_sys_set_power_domain(IDLE_REQ_VIDEO, false);
rkpm_ddr_printascii("pd state:");
rkpm_ddr_printhex(pmu_readl(RK3288_PMU_PWR_STATE));
rkpm_ddr_printascii("\n");
rk_pmu_pwrdn_st = pmu_readl(RK3288_PMU_PWRDN_ST);
if(!(rk_pmu_pwrdn_st&BIT(pmu_st_map[PD_GPU])))
rk3288_sys_set_power_domain(PD_GPU, false);
if(!(rk_pmu_pwrdn_st&BIT(pmu_st_map[PD_HEVC])))
rk3288_sys_set_power_domain(PD_HEVC, false);
if(!(rk_pmu_pwrdn_st&BIT(pmu_st_map[PD_VIO])))
rk3288_sys_set_power_domain(PD_VIO, false);
if(!(rk_pmu_pwrdn_st&BIT(pmu_st_map[PD_VIDEO])))
rk3288_sys_set_power_domain(PD_VIDEO, false);
#if 0
rkpm_ddr_printascii("pd state:");
rkpm_ddr_printhex(rk_pmu_pwrdn_st);
rkpm_ddr_printhex(pmu_readl(RK3288_PMU_PWRDN_ST));
rkpm_ddr_printascii("\n");
#endif
}
static inline void rk_pm_soc_pd_resume(void)
{
if(!(rk_pmu_pwrdn_st&BIT(pmu_pd_map[IDLE_REQ_GPU])))
rk3288_sys_set_power_domain(IDLE_REQ_GPU, false);
if(!(rk_pmu_pwrdn_st&BIT(pmu_pd_map[IDLE_REQ_HEVC])))
rk3288_sys_set_power_domain(IDLE_REQ_HEVC, false);
if(!(rk_pmu_pwrdn_st&BIT(pmu_pd_map[IDLE_REQ_VIO])))
rk3288_sys_set_power_domain(IDLE_REQ_VIO, false);
if(!(rk_pmu_pwrdn_st&BIT(pmu_pd_map[IDLE_REQ_VIDEO])))
rk3288_sys_set_power_domain(IDLE_REQ_VIDEO, false);
if(!(rk_pmu_pwrdn_st&BIT(pmu_st_map[PD_GPU])))
rk3288_sys_set_power_domain(PD_GPU, true);
if(!(rk_pmu_pwrdn_st&BIT(pmu_st_map[PD_HEVC])))
rk3288_sys_set_power_domain(PD_HEVC, true);
if(!(rk_pmu_pwrdn_st&BIT(pmu_st_map[PD_VIO])))
rk3288_sys_set_power_domain(PD_VIO, true);
if(!(rk_pmu_pwrdn_st&BIT(pmu_st_map[PD_VIDEO])))
rk3288_sys_set_power_domain(PD_VIDEO, true);
#if 0
rkpm_ddr_printascii("pd state:");
rkpm_ddr_printhex(pmu_readl(RK3288_PMU_PWR_STATE));
rkpm_ddr_printhex(pmu_readl(RK3288_PMU_PWRDN_ST));
rkpm_ddr_printascii("\n");
#endif
}
//extern bool console_suspend_enabled;
static void __init rk3288_init_suspend(void)
extern bool console_suspend_enabled;
static void rk3288_init_suspend(void)
{
//return;
printk("%s\n",__FUNCTION__);
rockchip_suspend_init();
//rkpm_pie_init();
rk3288_suspend_init();
// rkpm_set_ops_pwr_dmns(rk_pm_soc_pd_suspend,rk_pm_soc_pd_resume);
//console_suspend_enabled=0;
//pm_suspend(PM_SUSPEND_MEM);
rkpm_set_ops_pwr_dmns(rk_pm_soc_pd_suspend,rk_pm_soc_pd_resume);
#if 0
console_suspend_enabled=0;
do{
pm_suspend(PM_SUSPEND_MEM);
}
while(1);
#endif
}
#endif