From 8e8a910e988d786da9ce942511ed0fa3be2b4a6d Mon Sep 17 00:00:00 2001 From: Finley Xiao Date: Fri, 27 Mar 2020 12:35:25 +0800 Subject: [PATCH] ARM: dts: rockchip: rv1126: Modify cpu opp table Stressapptest pass. ARM leakage range: 0.7mA to 1.9mA. 0.7mA 0.9mA 1.1mA 1.2mA 1.4mA 1.5mA 1.9mA Change-Id: Id281999dd79f4d9ad435cfdf57faf4cdf45a2fbb Signed-off-by: Finley Xiao --- arch/arm/boot/dts/rv1126.dtsi | 28 ++++++++++++++++++++++++---- 1 file changed, 24 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/rv1126.dtsi b/arch/arm/boot/dts/rv1126.dtsi index b1aaba0302f7..f232f0732d4d 100644 --- a/arch/arm/boot/dts/rv1126.dtsi +++ b/arch/arm/boot/dts/rv1126.dtsi @@ -87,23 +87,43 @@ opp-408000000 { opp-hz = /bits/ 64 <408000000>; - opp-microvolt = <800000 800000 945000>; + opp-microvolt = <725000 725000 1100000>; clock-latency-ns = <40000>; opp-suspend; }; opp-600000000 { opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <800000 800000 945000>; + opp-microvolt = <725000 725000 1000000>; clock-latency-ns = <40000>; }; opp-816000000 { opp-hz = /bits/ 64 <816000000>; - opp-microvolt = <800000 800000 945000>; + opp-microvolt = <725000 725000 1000000>; clock-latency-ns = <40000>; }; opp-1008000000 { opp-hz = /bits/ 64 <1008000000>; - opp-microvolt = <800000 800000 945000>; + opp-microvolt = <775000 775000 1000000>; + clock-latency-ns = <40000>; + }; + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <825000 825000 1000000>; + clock-latency-ns = <40000>; + }; + opp-1296000000 { + opp-hz = /bits/ 64 <1296000000>; + opp-microvolt = <875000 875000 1000000>; + clock-latency-ns = <40000>; + }; + opp-1416000000 { + opp-hz = /bits/ 64 <1416000000>; + opp-microvolt = <925000 925000 1000000>; + clock-latency-ns = <40000>; + }; + opp-1512000000 { + opp-hz = /bits/ 64 <1512000000>; + opp-microvolt = <975000 975000 1000000>; clock-latency-ns = <40000>; }; };