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drm/rockchip: vop2: update pre_dither_down config

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1. config vp1 pre_dither_down at split mode;
2. disable pre_dither_down at YUV 10/8 bit output and RGB 10 bit output;
3. enable pre_dither_down at RGB 8/6 bit output;

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I304fc66324c97e3e4f50e03b8c8c2c1835871b1a
This commit is contained in:
Sandy Huang
2023-07-17 20:12:35 +08:00
parent cedb72825d
commit 903953ddeb
1 changed files with 14 additions and 8 deletions
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22
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
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@@ -6736,37 +6736,37 @@ static bool vop2_crtc_mode_fixup(struct drm_crtc *crtc,
return true; return true;
} }
static void vop2_dither_setup(struct drm_crtc *crtc) static void vop2_dither_setup(struct rockchip_crtc_state *vcstate, struct drm_crtc *crtc)
{ {
struct rockchip_crtc_state *vcstate = to_rockchip_crtc_state(crtc->state);
struct vop2_video_port *vp = to_vop2_video_port(crtc); struct vop2_video_port *vp = to_vop2_video_port(crtc);
struct vop2 *vop2 = vp->vop2; struct vop2 *vop2 = vp->vop2;
bool pre_dither_down_en = false;
switch (vcstate->bus_format) { switch (vcstate->bus_format) {
case MEDIA_BUS_FMT_RGB565_1X16: case MEDIA_BUS_FMT_RGB565_1X16:
VOP_MODULE_SET(vop2, vp, dither_down_en, 1); VOP_MODULE_SET(vop2, vp, dither_down_en, 1);
VOP_MODULE_SET(vop2, vp, dither_down_mode, RGB888_TO_RGB565); VOP_MODULE_SET(vop2, vp, dither_down_mode, RGB888_TO_RGB565);
VOP_MODULE_SET(vop2, vp, pre_dither_down_en, 1); pre_dither_down_en = true;
break; break;
case MEDIA_BUS_FMT_RGB666_1X18: case MEDIA_BUS_FMT_RGB666_1X18:
case MEDIA_BUS_FMT_RGB666_1X24_CPADHI: case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG: case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
VOP_MODULE_SET(vop2, vp, dither_down_en, 1); VOP_MODULE_SET(vop2, vp, dither_down_en, 1);
VOP_MODULE_SET(vop2, vp, dither_down_mode, RGB888_TO_RGB666); VOP_MODULE_SET(vop2, vp, dither_down_mode, RGB888_TO_RGB666);
VOP_MODULE_SET(vop2, vp, pre_dither_down_en, 1); pre_dither_down_en = true;
break; break;
case MEDIA_BUS_FMT_YUYV8_1X16: case MEDIA_BUS_FMT_YUYV8_1X16:
case MEDIA_BUS_FMT_YUV8_1X24: case MEDIA_BUS_FMT_YUV8_1X24:
case MEDIA_BUS_FMT_UYYVYY8_0_5X24: case MEDIA_BUS_FMT_UYYVYY8_0_5X24:
VOP_MODULE_SET(vop2, vp, dither_down_en, 0); VOP_MODULE_SET(vop2, vp, dither_down_en, 0);
VOP_MODULE_SET(vop2, vp, pre_dither_down_en, 1); pre_dither_down_en = true;
break; break;
case MEDIA_BUS_FMT_YUYV10_1X20: case MEDIA_BUS_FMT_YUYV10_1X20:
case MEDIA_BUS_FMT_YUV10_1X30: case MEDIA_BUS_FMT_YUV10_1X30:
case MEDIA_BUS_FMT_UYYVYY10_0_5X30: case MEDIA_BUS_FMT_UYYVYY10_0_5X30:
case MEDIA_BUS_FMT_RGB101010_1X30: case MEDIA_BUS_FMT_RGB101010_1X30:
VOP_MODULE_SET(vop2, vp, dither_down_en, 0); VOP_MODULE_SET(vop2, vp, dither_down_en, 0);
VOP_MODULE_SET(vop2, vp, pre_dither_down_en, 0); pre_dither_down_en = false;
break; break;
case MEDIA_BUS_FMT_RGB888_3X8: case MEDIA_BUS_FMT_RGB888_3X8:
case MEDIA_BUS_FMT_RGB888_DUMMY_4X8: case MEDIA_BUS_FMT_RGB888_DUMMY_4X8:
@@ -6775,10 +6775,14 @@ static void vop2_dither_setup(struct drm_crtc *crtc)
case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA: case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
default: default:
VOP_MODULE_SET(vop2, vp, dither_down_en, 0); VOP_MODULE_SET(vop2, vp, dither_down_en, 0);
VOP_MODULE_SET(vop2, vp, pre_dither_down_en, 1); pre_dither_down_en = true;
break; break;
} }
if (is_yuv_output(vcstate->bus_format))
pre_dither_down_en = false;
VOP_MODULE_SET(vop2, vp, pre_dither_down_en, pre_dither_down_en);
VOP_MODULE_SET(vop2, vp, dither_down_sel, DITHER_DOWN_ALLEGRO); VOP_MODULE_SET(vop2, vp, dither_down_sel, DITHER_DOWN_ALLEGRO);
} }
@@ -9742,7 +9746,9 @@ static void vop2_cfg_update(struct drm_crtc *crtc,
vop2_post_color_swap(crtc); vop2_post_color_swap(crtc);
vop2_dither_setup(crtc); vop2_dither_setup(vcstate, crtc);
if (vcstate->splice_mode)
vop2_dither_setup(vcstate, &splice_vp->rockchip_crtc.crtc);
VOP_MODULE_SET(vop2, vp, overlay_mode, vcstate->yuv_overlay); VOP_MODULE_SET(vop2, vp, overlay_mode, vcstate->yuv_overlay);