camera: rockchip: camsys_drv: v0.0x22.7 camsys_head: v0.e.0

read MRV_MIPI_FRAME register in camsys_mrv_irq, and pass the
value fs_id and fe_id into isp library.

Change-Id: I98c43f1cac25c74c5058b90dbf25937ceb924f84
Signed-off-by: Wen Dingxian <shawn.wen@rock-chips.com>
This commit is contained in:
Wen Dingxian
2017-11-21 16:12:54 +08:00
committed by Tao Huang
parent a4d023c815
commit 90d186256b
4 changed files with 27 additions and 3 deletions

View File

@@ -180,9 +180,12 @@
1) gpio base start from 1000,adapt to it.
*v0.0x22.6:
1) revert v0.0x22.3.
*v0.0x22.7:
1) read MRV_MIPI_FRAME register in camsys_mrv_irq, and pass the value
fs_id and fe_id into isp library.
*/
#define CAMSYS_DRIVER_VERSION KERNEL_VERSION(0, 0x22, 6)
#define CAMSYS_DRIVER_VERSION KERNEL_VERSION(0, 0x22, 7)
#define CAMSYS_PLATFORM_DRV_NAME "RockChip-CamSys"
#define CAMSYS_PLATFORM_MARVIN_NAME "Platform_MarvinDev"

View File

@@ -713,6 +713,7 @@ static irqreturn_t camsys_mrv_irq(int irq, void *data)
camsys_irqpool_t *irqpool;
unsigned int isp_mis, mipi_mis, mi_mis, *mis, jpg_mis, jpg_err_mis;
unsigned int mi_ris, mi_imis;
static unsigned int mipi_frame;
isp_mis = __raw_readl((void volatile *)
(camsys_dev->devmems.registermem->vir_base +
@@ -751,6 +752,13 @@ static irqreturn_t camsys_mrv_irq(int irq, void *data)
MRV_MI_IMIS));
}
if (isp_mis & MIS_V_START) {
mipi_frame = __raw_readl((void *)
(camsys_dev->devmems.registermem->vir_base +
MRV_MIPI_FRAME));
camsys_trace(2, "mipi_frame: 0x%08x \r\n", mipi_frame);
}
__raw_writel(isp_mis, (void volatile *)
(camsys_dev->devmems.registermem->vir_base +
MRV_ISP_ICR));
@@ -819,6 +827,11 @@ static irqreturn_t camsys_mrv_irq(int irq, void *data)
camsys_irqstas_t,
list);
irqsta->sta.mis = *mis;
irqsta->sta.fs_id =
mipi_frame & 0xFFFF;
irqsta->sta.fe_id =
(mipi_frame >> 16)
& 0xFFFF;
list_del_init(&irqsta->list);
list_add_tail(&irqsta->list,
&irqpool->active);

View File

@@ -5,6 +5,8 @@
#define CAMSYS_MARVIN_IRQNAME "MarvinIrq"
#define MIS_V_START BIT(6)
#define MRV_ISP_BASE 0x400
#define MRV_ISP_RIS (MRV_ISP_BASE + 0x1c0)
#define MRV_ISP_MIS (MRV_ISP_BASE + 0x1c4)
@@ -13,6 +15,7 @@
#define MRV_MIPI_BASE 0x1C00
#define MRV_MIPI_MIS (MRV_MIPI_BASE + 0x10)
#define MRV_MIPI_ICR (MRV_MIPI_BASE + 0x14)
#define MRV_MIPI_FRAME (MRV_MIPI_BASE + 0x40)
#define MRV_MI_BASE (0x1400)

View File

@@ -33,8 +33,10 @@
1) support sensor powerup sequence configurable.
*v0.d.0:
1) powerup sequence type moved to common_head.h.
*v0.e.0:
1) add fs_id, fe_id and some reserved bytes in struct camsys_irqsta_s.
*/
#define CAMSYS_HEAD_VERSION KERNEL_VERSION(0,0xd,0)
#define CAMSYS_HEAD_VERSION KERNEL_VERSION(0, 0xe, 0)
#define CAMSYS_MARVIN_DEVNAME "camsys_marvin"
#define CAMSYS_CIF0_DEVNAME "camsys_cif0"
@@ -60,6 +62,9 @@
typedef struct camsys_irqsta_s {
unsigned int ris; //Raw interrupt status
unsigned int mis; //Masked interrupt status
unsigned int fs_id; // frame number from Frame Start (FS) short packet
unsigned int fe_id; // frame number from Frame End (FE) short packet
unsigned int reserved[4];
} camsys_irqsta_t;
typedef struct camsys_irqcnnt_s {
@@ -67,7 +72,7 @@ typedef struct camsys_irqcnnt_s {
unsigned int timeout; //us
unsigned int mis;
unsigned int icr;
unsigned int icr;
} camsys_irqcnnt_t;
typedef enum camsys_mmap_type_e { //this type can be filled in mmap offset argument