From 910d9e3f54cbcbbf04ced978f7964335ed2c1a43 Mon Sep 17 00:00:00 2001 From: Yifeng Zhao Date: Wed, 27 Feb 2019 10:24:54 +0800 Subject: [PATCH] dt-bindings: mtd: add Rockchip NAND controller V9 documentation This patch adds the related dts binding document for Rockchip NAND controller v9. Change-Id: I783cb1cd957907744812ace2179bb861e7ca4e63 Signed-off-by: Yifeng Zhao --- .../bindings/mtd/rockchip-nand-v9.txt | 34 +++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/rockchip-nand-v9.txt diff --git a/Documentation/devicetree/bindings/mtd/rockchip-nand-v9.txt b/Documentation/devicetree/bindings/mtd/rockchip-nand-v9.txt new file mode 100644 index 000000000000..aaa6d6926422 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/rockchip-nand-v9.txt @@ -0,0 +1,34 @@ +Rockchip NAND Flash Controller DT binding + +Required properties: + +- compatible : "rockchip,rk-nand-v9". +- reg : shall contain registers location and length for data and reg. +- interrupts : shall define the nand controller interrupt. +- clocks : shall reference nand controller clocks. +- clock-names : nand controller internal clock names. Shall contain : + * "hclk_nandc" : AHB gating clock + * "clk_nandc" : nand controller clock + +Example for rk3326 / rkpx30: + nandc0: nandc@ff3b0000 { + compatible = "rockchip,rk-nandc-v9"; + reg = <0x0 0xff3b0000 0x0 0x4000>; + interrupts = ; + nandc_id = <0>; + clocks = <&cru SCLK_NANDC>, <&cru HCLK_NANDC>; + clock-names = "clk_nandc", "hclk_nandc"; + assigned-clocks = <&cru SCLK_NANDC>; + assigned-clock-parents = <&cru SCLK_NANDC_DIV50>; + clock-frequency = <150000000>; + status = "okay"; + + #address-cells = <1>; + #size-cells = <1>; + nand@0 { + reg = <0>; + nand-ecc-mode = "hw"; + nand-ecc-strength = <16>; + nand-ecc-step-size = <1024>; + }; + };