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lcd: optimize tcon type for extensible usage [1/1]
PD#SWPL-3957 Problem: tcon_type need extensible usage for special case Solution: tcon_type change to hex value Verify: x301 Change-Id: I26cb58ffc1cd2f525c8cf0f7c08b0d9cf66766e5 Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com> Conflicts: arch/arm/boot/dts/amlogic/mesontl1_skt-panel.dtsi arch/arm/boot/dts/amlogic/mesontl1_t309-panel.dtsi arch/arm/boot/dts/amlogic/mesontl1_x301-panel.dtsi arch/arm64/boot/dts/amlogic/mesontl1_skt-panel.dtsi arch/arm64/boot/dts/amlogic/mesontl1_t309-panel.dtsi arch/arm64/boot/dts/amlogic/mesontl1_x301-panel.dtsi drivers/amlogic/media/vout/lcd/lcd_debug.c include/linux/amlogic/media/vout/lcd/lcd_vout.h
This commit is contained in:
Evoke Zhang
@@ -441,13 +441,16 @@
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1 /*clk_auto_generate*/
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0>; /*pixel_clk(unit in Hz)*/
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p2p_attr = <
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1 /*lvds_repack*/
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1 /*dual_port*/
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0 /*pn_swap*/
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0 /*port_swap*/
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0>; /*lane_reverse*/
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phy_attr=<
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3 0 /*vswing_level, preem_level*/>;
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0x0 /* p2p_teyp:
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* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
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* 0x10=chpi, 0x11=cspi, 0x12=usit
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*/
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12 /* channel_num */
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0x76543210 /* channel_sel0 */
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0xba98 /* channel_sel1 */
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0 /* pn_swap */
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0>; /* bit_swap */
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phy_attr=<0xf 1>; /* vswing_level, preem_level */
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/* power step: type, index, value, delay(ms) */
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power_on_step = <
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@@ -461,6 +464,240 @@
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0xff 0 0 0>; /*ending*/
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backlight_index = <0xff>;
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};
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p2p_1{
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model_name = "p2p_ceds";
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interface = "p2p"; /*lcd_interface
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*(lvds, vbyone, minilvds, p2p)
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*/
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basic_setting = <
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3840 2160 /*h_active, v_active*/
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5000 2250 /*h_period, v_period*/
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8 /*lcd_bits */
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16 9>; /*screen_widht, screen_height*/
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range_setting = <
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4240 5100 /*h_period_min, max*/
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2200 2760 /*v_period_min, max*/
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480000000 624000000>; /*pclk_min, max*/
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lcd_timing = <
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16 29 0 /*hs_width, hs_bp, hs_pol*/
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6 65 0>; /*vs_width, vs_bp, vs_pol*/
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clk_attr = <
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2 /*fr_adj_type
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*(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
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* 4=hdmi_mode)
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*/
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0 /*clk_ss_level*/
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1 /*clk_auto_generate*/
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0>; /*pixel_clk(unit in Hz)*/
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p2p_attr = <
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0x0 /* p2p_teyp:
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* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
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* 0x10=chpi, 0x11=cspi, 0x12=usit
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*/
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6 /* channel_num */
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0x76543210 /* channel_sel0 */
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0xba98 /* channel_sel1 */
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0 /* pn_swap */
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0>; /* bit_swap */
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phy_attr=<0xf 1>; /* vswing_level, preem_level */
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/* power step: type, index, value, delay(ms) */
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power_on_step = <
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0 0 1 20 /*panel power on*/
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2 0 0 10 /*signal enable*/
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0xff 0 0 0>; /*ending*/
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power_off_step = <
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2 0 0 10 /*signal disable*/
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0 0 0 100 /*panel power off*/
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0xff 0 0 0>; /*ending*/
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backlight_index = <0xff>;
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};
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p2p_2{
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model_name = "p2p_chpi";
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interface = "p2p"; /*lcd_interface
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*(lvds, vbyone, minilvds, p2p)
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*/
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basic_setting = <
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3840 2160 /*h_active, v_active*/
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4400 2250 /*h_period, v_period*/
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8 /*lcd_bits */
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16 9>; /*screen_widht, screen_height*/
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range_setting = <
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4240 5100 /*h_period_min, max*/
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2200 2760 /*v_period_min, max*/
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480000000 624000000>; /*pclk_min, max*/
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lcd_timing = <
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16 29 0 /*hs_width, hs_bp, hs_pol*/
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6 65 0>; /*vs_width, vs_bp, vs_pol*/
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clk_attr = <
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2 /*fr_adj_type
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*(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
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* 4=hdmi_mode)
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*/
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0 /*clk_ss_level*/
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1 /*clk_auto_generate*/
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0>; /*pixel_clk(unit in Hz)*/
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p2p_attr = <
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0x10 /* p2p_teyp:
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* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
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* 0x10=chpi, 0x11=cspi, 0x12=usit
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*/
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6 /* channel_num */
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0x76543210 /* channel_sel0 */
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0xba98 /* channel_sel1 */
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0 /* pn_swap */
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0>; /* bit_swap */
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phy_attr=<0xf 1>; /* vswing_level, preem_level */
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/* power step: type, index, value, delay(ms) */
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power_on_step = <
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0 0 1 20 /*panel power on*/
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2 0 0 10 /*signal enable*/
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0xff 0 0 0>; /*ending*/
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power_off_step = <
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2 0 0 10 /*signal disable*/
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0 0 0 100 /*panel power off*/
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0xff 0 0 0>; /*ending*/
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backlight_index = <0xff>;
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};
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p2p_3{
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model_name = "p2p_chpi";
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interface = "p2p"; /*lcd_interface
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*(lvds, vbyone, minilvds, p2p)
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*/
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basic_setting = <
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3840 2160 /*h_active, v_active*/
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4400 2250 /*h_period, v_period*/
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8 /*lcd_bits */
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16 9>; /*screen_widht, screen_height*/
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range_setting = <
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4240 5100 /*h_period_min, max*/
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2200 2760 /*v_period_min, max*/
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480000000 624000000>; /*pclk_min, max*/
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lcd_timing = <
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16 29 0 /*hs_width, hs_bp, hs_pol*/
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6 65 0>; /*vs_width, vs_bp, vs_pol*/
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clk_attr = <
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2 /*fr_adj_type
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*(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
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* 4=hdmi_mode)
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*/
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0 /*clk_ss_level*/
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1 /*clk_auto_generate*/
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0>; /*pixel_clk(unit in Hz)*/
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p2p_attr = <
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0x10 /* p2p_teyp:
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* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
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* 0x10=chpi, 0x11=cspi, 0x12=usit
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*/
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12 /* channel_num */
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0x76543210 /* channel_sel0 */
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0xba98 /* channel_sel1 */
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0 /* pn_swap */
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0>; /* bit_swap */
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phy_attr=<0xf 1>; /* vswing_level, preem_level */
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/* power step: type, index, value, delay(ms) */
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power_on_step = <
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0 0 1 20 /*panel power on*/
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2 0 0 10 /*signal enable*/
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0xff 0 0 0>; /*ending*/
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power_off_step = <
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2 0 0 10 /*signal disable*/
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0 0 0 100 /*panel power off*/
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0xff 0 0 0>; /*ending*/
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backlight_index = <0xff>;
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};
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mlvds_0{
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model_name = "mlvds_1080p";
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interface = "minilvds"; /*lcd_interface
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*(lvds, vbyone, minilvds, p2p)
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*/
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basic_setting = <
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1920 1080 /*h_active, v_active*/
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2200 1125 /*h_period, v_period*/
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8 /*lcd_bits */
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16 9>; /*screen_widht, screen_height*/
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range_setting = <
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2080 2720 /*h_period_min, max*/
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2200 1125 /*v_period_min, max*/
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133940000 156000000>; /*pclk_min, max*/
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lcd_timing = <
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44 148 0 /*hs_width, hs_bp, hs_pol*/
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5 30 0>; /*vs_width, vs_bp, vs_pol*/
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clk_attr = <
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2 /*fr_adj_type
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*(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
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* 4=hdmi_mode)
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*/
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0 /*clk_ss_level*/
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1 /*clk_auto_generate*/
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0>; /*pixel_clk(unit in Hz)*/
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minilvds_attr = <
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6 /* channel_num */
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0x12304567 /* channel_sel0 */
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0x0 /* channel_sel1 */
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0xaa0 /* clk_phase */
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0 /* pn_swap */
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0>; /* bit_swap */
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phy_attr=<0xf 0>; /* vswing_level, preem_level */
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/* power step: type, index, value, delay(ms) */
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power_on_step = <
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0 0 1 20 /*panel power on*/
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2 0 0 10 /*signal enable*/
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0xff 0 0 0>; /*ending*/
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power_off_step = <
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2 0 0 10 /*signal disable*/
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0 0 0 100 /*panel power off*/
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0xff 0 0 0>; /*ending*/
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backlight_index = <0xff>;
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};
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mlvds_1{
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model_name = "mlvds_768p";
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interface = "minilvds";/*lcd_interface
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*(lvds, vbyone, minilvds, p2p)
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*/
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basic_setting = <
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1366 768 /*h_active, v_active*/
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1560 806 /*h_period, v_period*/
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8 /*lcd_bits */
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16 9>; /*screen_widht, screen_height*/
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range_setting = <
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1460 2000 /*h_period_min, max*/
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784 1015 /*v_period_min, max*/
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50000000 85000000>; /*pclk_min, max*/
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lcd_timing = <
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56 64 0 /*hs_width, hs_bp, hs_pol*/
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3 28 0>; /*vs_width, vs_bp, vs_pol*/
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clk_attr = <
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2 /*fr_adj_type
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*(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
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* 4=hdmi_mode)
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*/
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0 /*clk_ss_level*/
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1 /*clk_auto_generate*/
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0>; /*pixel_clk(unit in Hz)*/
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minilvds_attr = <
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6 /* channel_num */
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0x45603012 /* channel_sel0 */
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0x0 /* channel_sel1 */
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0xaa0 /* clk_phase */
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0 /* pn_swap */
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0>; /* bit_swap */
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phy_attr=<0xf 0>; /* vswing_level, preem_level */
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/* power step: type, index, value, delay(ms) */
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power_on_step = <
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0 0 1 20 /*panel power on*/
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2 0 0 10 /*signal enable*/
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0xff 0 0 0>; /*ending*/
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power_off_step = <
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2 0 0 10 /*signal disable*/
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0 0 0 100 /*panel power off*/
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0xff 0 0 0>; /*ending*/
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backlight_index = <0xff>;
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};
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};
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lcd_extern{
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@@ -690,10 +690,6 @@ static void lcd_set_tcon_clk(struct lcd_config_s *pconf)
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switch (pconf->lcd_basic.lcd_type) {
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case LCD_MLVDS:
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case LCD_P2P:
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/* tcon_clk 50M */
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/*lcd_hiu_write(HHI_TCON_CLK_CNTL,
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* (1 << 7) | (1 << 6) | (7 << 0));
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*/
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if (!IS_ERR_OR_NULL(lcd_clktree.tcon_clk)) {
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clk_set_rate(lcd_clktree.tcon_clk, 50000000);
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clk_prepare_enable(lcd_clktree.tcon_clk);
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@@ -280,13 +280,13 @@ static int lcd_info_print_ttl(char *buf, int offset)
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n = lcd_debug_info_len(len + offset);
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len += snprintf((buf+len), n,
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"clk_pol %u\n"
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"hvsync_valid %u\n"
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"de_valid %u\n"
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"hvsync_valid %u\n"
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"rb_swap %u\n"
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"bit_swap %u\n\n",
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pconf->lcd_control.ttl_config->clk_pol,
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((pconf->lcd_control.ttl_config->sync_valid >> 0) & 1),
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((pconf->lcd_control.ttl_config->sync_valid >> 1) & 1),
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((pconf->lcd_control.ttl_config->sync_valid >> 0) & 1),
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((pconf->lcd_control.ttl_config->swap_ctrl >> 1) & 1),
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((pconf->lcd_control.ttl_config->swap_ctrl >> 0) & 1));
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@@ -464,6 +464,7 @@ static int lcd_info_print_p2p(char *buf, int offset)
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n = lcd_debug_info_len(len + offset);
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len += snprintf((buf+len), n,
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"p2p_type 0x%x\n"
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"lane_num %d\n"
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"channel_sel1 0x%08x\n"
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"channel_sel1 0x%08x\n"
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@@ -966,7 +967,7 @@ static int lcd_reg_print_p2p(char *buf, int offset)
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len += snprintf((buf+len), n, "\np2p regs:\n");
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n = lcd_debug_info_len(len + offset);
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reg = HHI_TCON_CLK_CNTL_TL1;
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reg = HHI_TCON_CLK_CNTL;
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len += snprintf((buf+len), n,
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"HHI_TCON_CLK_CNTL [0x%04x] = 0x%08x\n",
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reg, lcd_hiu_read(reg));
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@@ -2036,7 +2037,7 @@ static ssize_t lcd_debug_change_store(struct class *class,
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break;
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case 'p':
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p2p_conf = pconf->lcd_control.p2p_config;
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ret = sscanf(buf, "p2p %d %x %x %x %d %d",
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ret = sscanf(buf, "p2p %x %d %x %x %d %d",
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&val[0], &val[1], &val[2], &val[3], &val[4], &val[5]);
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if (ret == 6) {
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p2p_conf->lane_num = val[0];
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@@ -2046,7 +2047,7 @@ static ssize_t lcd_debug_change_store(struct class *class,
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p2p_conf->pn_swap = val[4];
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p2p_conf->bit_swap = val[5];
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pr_info("change p2p config:\n"
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"lane_num=%d,\n"
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"p2p_type=0x%x, lane_num=%d,\n"
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"channel_sel0=0x%08x, channel_sel1=0x%08x,\n"
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"clk_phase=0x%04x,\n"
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"pn_swap=%d, bit_swap=%d\n",
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@@ -3092,10 +3093,11 @@ static const char *lcd_mlvds_debug_usage_str = {
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static const char *lcd_p2p_debug_usage_str = {
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"Usage:\n"
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" echo <lane_num> <channel_sel0> <channel_sel1> <clk_phase> <pn_swap> <bit_swap> > minilvds ; set minilvds config\n"
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" echo <p2p_type> <lane_num> <channel_sel0> <channel_sel1> <pn_swap> <bit_swap> > p2p ; set p2p config\n"
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"data format:\n"
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" <channel_sel> : minilvds 8 channels mapping in tx 10 channels\n"
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" <clk_phase> : bit[13:12]=clk01_pi_sel, bit[11:8]=pi2, bit[7:4]=pi1, bit[3:0]=pi0\n"
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" <p2p_type> : 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,\n"
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" 0x10=chpi, 0x11=cspi, 0x12=usit\n"
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" <channel_sel> : 12 channels mapping\n"
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" <pn_swap> : 0=normal, 1=swap p/n channels\n"
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" <bit_swap> : 0=normal, 1=swap bit LSB/MSB\n"
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"\n"
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@@ -3126,37 +3128,128 @@ static const char *lcd_debug_tcon_usage_str = {
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static ssize_t lcd_ttl_debug_show(struct class *class,
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struct class_attribute *attr, char *buf)
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{
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return sprintf(buf, "%s\n", lcd_ttl_debug_usage_str);
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int len = 0;
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struct aml_lcd_drv_s *lcd_drv = aml_lcd_get_driver();
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struct ttl_config_s *ttl_conf;
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ttl_conf = lcd_drv->lcd_config->lcd_control.ttl_config;
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len += sprintf(buf+len,
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"ttl config: clk_pol=%d, de_valid=%d, hvsync_valid=%d,",
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ttl_conf->clk_pol,
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(ttl_conf->sync_valid >> 1) & 0x1,
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(ttl_conf->sync_valid >> 0) & 0x1);
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len += sprintf(buf+len, "rb_swap=%d, bit_swap=%d\n\n",
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(ttl_conf->swap_ctrl >> 1) & 0x1,
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(ttl_conf->swap_ctrl >> 0) & 0x1);
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len += sprintf(buf+len, "%s\n", lcd_ttl_debug_usage_str);
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||||
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return len;
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}
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||||
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static ssize_t lcd_lvds_debug_show(struct class *class,
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struct class_attribute *attr, char *buf)
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{
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return sprintf(buf, "%s\n", lcd_lvds_debug_usage_str);
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int len = 0;
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struct aml_lcd_drv_s *lcd_drv = aml_lcd_get_driver();
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struct lvds_config_s *lvds_conf;
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lvds_conf = lcd_drv->lcd_config->lcd_control.lvds_config;
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len += sprintf(buf+len, "lvds config: repack=%d, dual_port=%d,",
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lvds_conf->lvds_repack, lvds_conf->dual_port);
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len += sprintf(buf+len, "pn_swap=%d, port_swap=%d, lane_reverse=%d\n\n",
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lvds_conf->pn_swap, lvds_conf->port_swap,
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lvds_conf->lane_reverse);
|
||||
len += sprintf(buf+len, "%s\n", lcd_lvds_debug_usage_str);
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
static ssize_t lcd_vx1_debug_show(struct class *class,
|
||||
struct class_attribute *attr, char *buf)
|
||||
{
|
||||
return sprintf(buf, "%s\n", lcd_vbyone_debug_usage_str);
|
||||
int len = 0;
|
||||
struct aml_lcd_drv_s *lcd_drv = aml_lcd_get_driver();
|
||||
struct vbyone_config_s *vx1_conf;
|
||||
|
||||
vx1_conf = lcd_drv->lcd_config->lcd_control.vbyone_config;
|
||||
|
||||
len += sprintf(buf+len, "vbyone config: lane_count=%d,",
|
||||
vx1_conf->lane_count);
|
||||
len += sprintf(buf+len, "region_num=%d, byte_mode=%d\n\n",
|
||||
vx1_conf->region_num, vx1_conf->byte_mode);
|
||||
len += sprintf(buf+len, "%s\n", lcd_vbyone_debug_usage_str);
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
static ssize_t lcd_mipi_debug_show(struct class *class,
|
||||
struct class_attribute *attr, char *buf)
|
||||
{
|
||||
return sprintf(buf, "%s\n", lcd_mipi_debug_usage_str);
|
||||
int len = 0;
|
||||
struct aml_lcd_drv_s *lcd_drv = aml_lcd_get_driver();
|
||||
struct dsi_config_s *dsi_conf;
|
||||
|
||||
dsi_conf = lcd_drv->lcd_config->lcd_control.mipi_config;
|
||||
|
||||
len += sprintf(buf+len, "mipi_dsi config: lane_num=%d, ",
|
||||
dsi_conf->lane_num);
|
||||
len += sprintf(buf+len, "bit_rate_max=%dMhz, factor_numerator=%d, ",
|
||||
dsi_conf->bit_rate_max, dsi_conf->factor_numerator);
|
||||
len += sprintf(buf+len,
|
||||
"operation_mode_init=%d, operation_mode_display=%d, ",
|
||||
dsi_conf->operation_mode_init,
|
||||
dsi_conf->operation_mode_display);
|
||||
len += sprintf(buf+len,
|
||||
"video_mode_type=%d, clk_always_hs=%d, phy_switch=%d\n\n",
|
||||
dsi_conf->video_mode_type, dsi_conf->clk_always_hs,
|
||||
dsi_conf->phy_switch);
|
||||
len += sprintf(buf+len, "%s\n", lcd_mipi_debug_usage_str);
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
static ssize_t lcd_mlvds_debug_show(struct class *class,
|
||||
struct class_attribute *attr, char *buf)
|
||||
{
|
||||
return sprintf(buf, "%s\n", lcd_mlvds_debug_usage_str);
|
||||
int len = 0;
|
||||
struct aml_lcd_drv_s *lcd_drv = aml_lcd_get_driver();
|
||||
struct mlvds_config_s *mlvds_conf;
|
||||
|
||||
mlvds_conf = lcd_drv->lcd_config->lcd_control.mlvds_config;
|
||||
|
||||
len += sprintf(buf+len, "minilvds config: channel_num=%d, ",
|
||||
mlvds_conf->channel_num);
|
||||
len += sprintf(buf+len, "channel_sel0=0x%08x, channel_sel1=0x%08x, ",
|
||||
mlvds_conf->channel_sel0, mlvds_conf->channel_sel1);
|
||||
len += sprintf(buf+len, "clk_phase=0x%04x, pn_swap=%d, bit_swap=%d\n\n",
|
||||
mlvds_conf->clk_phase,
|
||||
mlvds_conf->pn_swap, mlvds_conf->bit_swap);
|
||||
len += sprintf(buf+len, "%s\n", lcd_mlvds_debug_usage_str);
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
static ssize_t lcd_p2p_debug_show(struct class *class,
|
||||
struct class_attribute *attr, char *buf)
|
||||
{
|
||||
return sprintf(buf, "%s\n", lcd_p2p_debug_usage_str);
|
||||
int len = 0;
|
||||
struct aml_lcd_drv_s *lcd_drv = aml_lcd_get_driver();
|
||||
struct p2p_config_s *p2p_conf;
|
||||
|
||||
p2p_conf = lcd_drv->lcd_config->lcd_control.p2p_config;
|
||||
|
||||
len += sprintf(buf+len, "p2p config: p2p_type=0x%x, lane_num=%d, ",
|
||||
p2p_conf->p2p_type, p2p_conf->lane_num);
|
||||
len += sprintf(buf+len, "channel_sel0=0x%08x, channel_sel1=0x%08x, ",
|
||||
p2p_conf->channel_sel0, p2p_conf->channel_sel1);
|
||||
len += sprintf(buf+len, "pn_swap=%d, bit_swap=%d\n\n",
|
||||
p2p_conf->pn_swap, p2p_conf->bit_swap);
|
||||
len += sprintf(buf+len, "%s\n", lcd_p2p_debug_usage_str);
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
static ssize_t lcd_tcon_debug_show(struct class *class,
|
||||
@@ -3178,7 +3271,7 @@ static ssize_t lcd_ttl_debug_store(struct class *class,
|
||||
&temp[0], &temp[1], &temp[2], &temp[3], &temp[4]);
|
||||
if (ret == 5) {
|
||||
pr_info("set ttl config:\n"
|
||||
"clk_pol=%d, de_valid=%d, de_valid=%d\n"
|
||||
"clk_pol=%d, de_valid=%d, hvsync_valid=%d\n"
|
||||
"rb_swap=%d, bit_swap=%d\n",
|
||||
temp[0], temp[1], temp[2], temp[3], temp[4]);
|
||||
ttl_conf->clk_pol = temp[0];
|
||||
@@ -3400,14 +3493,13 @@ static ssize_t lcd_p2p_debug_store(struct class *class,
|
||||
struct p2p_config_s *p2p_conf;
|
||||
|
||||
p2p_conf = lcd_drv->lcd_config->lcd_control.p2p_config;
|
||||
ret = sscanf(buf, "%d %x %x %x %d %d",
|
||||
&p2p_conf->lane_num,
|
||||
ret = sscanf(buf, "%x %d %x %x %d %d",
|
||||
&p2p_conf->p2p_type, &p2p_conf->lane_num,
|
||||
&p2p_conf->channel_sel0, &p2p_conf->channel_sel1,
|
||||
&p2p_conf->clk_phase,
|
||||
&p2p_conf->pn_swap, &p2p_conf->bit_swap);
|
||||
if (ret == 6) {
|
||||
pr_info("set minilvds config:\n"
|
||||
"lane_num=%d,\n"
|
||||
pr_info("set p2p config:\n"
|
||||
"p2p_type=0x%x, lane_num=%d,\n"
|
||||
"channel_sel0=0x%08x, channel_sel1=0x%08x,\n"
|
||||
"clk_phase=0x%04x,\n"
|
||||
"pn_swap=%d, bit_swap=%d\n",
|
||||
|
||||
@@ -211,8 +211,7 @@
|
||||
#define HHI_DIF_TCON_CNTL0 0x3c
|
||||
#define HHI_DIF_TCON_CNTL1 0x3d
|
||||
#define HHI_DIF_TCON_CNTL2 0x3e
|
||||
#define HHI_TCON_CLK_CNTL 0xf0
|
||||
#define HHI_TCON_CLK_CNTL_TL1 0x9c
|
||||
#define HHI_TCON_CLK_CNTL 0x9c
|
||||
|
||||
/* Global control: RESET_CBUS_BASE = 0x11 */
|
||||
#define VERSION_CTRL 0x1100
|
||||
|
||||
@@ -339,6 +339,12 @@ struct mlvds_config_s {
|
||||
|
||||
enum p2p_type_e {
|
||||
P2P_CEDS = 0,
|
||||
P2P_CMPI,
|
||||
P2P_ISP,
|
||||
P2P_EPI,
|
||||
P2P_CHPI = 0x10, /* low common mode */
|
||||
P2P_CSPI,
|
||||
P2P_USIT,
|
||||
P2P_MAX,
|
||||
};
|
||||
|
||||
|
||||
Reference in New Issue
Block a user