From 6a5f6ee5bfe4a51426e67d81b0d3106d6a3f0b83 Mon Sep 17 00:00:00 2001 From: David Wu Date: Sun, 20 Aug 2023 15:12:03 +0800 Subject: [PATCH 01/14] net: phy: rk630: Fixed for reboot && ping issue Fixes: ee144563a528 ("net: phy: rk630: Enable aps && uaps to save power consumption") Fixes: b67f47f2429e ("net: phy: rk630phy: Add adc performance") Signed-off-by: David Wu Change-Id: I9519024f839e1648570ea98c77d2c22e58b9bc76 --- drivers/net/phy/rk630phy.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/net/phy/rk630phy.c b/drivers/net/phy/rk630phy.c index 471baeca43a8..de76196712cb 100644 --- a/drivers/net/phy/rk630phy.c +++ b/drivers/net/phy/rk630phy.c @@ -238,7 +238,7 @@ static void rk630_phy_t22_config_init(struct phy_device *phydev) /* Switch to page 6 */ phy_write(phydev, REG_PAGE_SEL, 0x0600); /* PHYAFE ADC optimization */ - phy_write(phydev, REG_PAGE6_ADC_ANONTROL, 0x555e); + phy_write(phydev, REG_PAGE6_ADC_ANONTROL, 0x5540); /* PHYAFE Gain optimization */ phy_write(phydev, REG_PAGE6_GAIN_ANONTROL, 0x0400); /* PHYAFE EQ optimization */ @@ -291,8 +291,8 @@ static int rk630_phy_config_init(struct phy_device *phydev) break; case PHY_ADDR_T22: rk630_phy_t22_config_init(phydev); - rk630_phy_set_aps(phydev, true); - rk630_phy_set_uaps(phydev, true); + rk630_phy_set_aps(phydev, false); + rk630_phy_set_uaps(phydev, false); break; default: phydev_err(phydev, "Unsupported address for current phy: %d\n", From 99f27375345c70440d0ac9c3f7c7befb805e0411 Mon Sep 17 00:00:00 2001 From: Finley Xiao Date: Mon, 30 Jan 2023 16:07:51 +0800 Subject: [PATCH 02/14] arm64: dts: rockchip: rk3528: Add low temperature config for opp table Signed-off-by: Finley Xiao Change-Id: I7f8813c2508bc1eb024f2e2b327dc298bbe5bcb6 --- arch/arm64/boot/dts/rockchip/rk3528.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi index 029e72547caa..ee828d9c58dd 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi @@ -220,6 +220,9 @@ rockchip,pvtm-temp-prop = <0 0>; rockchip,pvtm-thermal-zone = "soc-thermal"; rockchip,grf = <&grf>; + rockchip,temp-hysteresis = <5000>; + rockchip,low-temp = <10000>; + rockchip,low-temp-min-volt = <900000>; opp-408000000 { opp-hz = /bits/ 64 <408000000>; @@ -1073,6 +1076,9 @@ rockchip,pvtm-temp-prop = <0 0>; rockchip,pvtm-thermal-zone = "soc-thermal"; rockchip,grf = <&grf>; + rockchip,temp-hysteresis = <5000>; + rockchip,low-temp = <10000>; + rockchip,low-temp-min-volt = <900000>; opp-300000000 { opp-hz = /bits/ 64 <300000000>; From 18df0d10b711d3e7fd8ddbc8fd04e1e99daa9ca7 Mon Sep 17 00:00:00 2001 From: Damon Ding Date: Thu, 26 Oct 2023 15:29:32 +0800 Subject: [PATCH 03/14] backlight: pwm_bl: fix the state check in power-off If the default-brightness-level is 0 and related pwm has been enabled in uboot, the pwm_backlight may not actually be turned off. Signed-off-by: Damon Ding Change-Id: I92c0c363a13040e300dd8aa2d40edcad87fa50d0 --- drivers/video/backlight/pwm_bl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/video/backlight/pwm_bl.c b/drivers/video/backlight/pwm_bl.c index 38ac5fb70b1d..c4323e94fe9f 100644 --- a/drivers/video/backlight/pwm_bl.c +++ b/drivers/video/backlight/pwm_bl.c @@ -74,7 +74,7 @@ static void pwm_backlight_power_off(struct pwm_bl_data *pb) struct pwm_state state; pwm_get_state(pb->pwm, &state); - if (!pb->enabled) + if (!pb->enabled && !state.enabled) return; if (pb->enable_gpio) From ce8fb3bb3029338443d76e13eb007c3e841f0860 Mon Sep 17 00:00:00 2001 From: Cody Xie Date: Tue, 31 Oct 2023 14:44:36 +0800 Subject: [PATCH 04/14] arm64: dts: rockchip: rk3588-vehicle\*maxim\*: Fix pins default pinctrls Set all default pins to expected input/output values to prevent glitch during probe. Change-Id: I29e882f47b8ab1e4d89e29cc1525187a434cba53 Signed-off-by: Cody Xie --- .../rk3588-vehicle-evb-maxim-max96712-dcphy0.dtsi | 6 +++--- .../rk3588-vehicle-evb-maxim-max96712-dcphy1.dtsi | 6 +++--- .../rk3588-vehicle-evb-maxim-max96712-dphy0.dtsi | 6 +++--- .../rk3588-vehicle-evb-maxim-max96712-dphy3.dtsi | 6 +++--- .../rockchip/rk3588-vehicle-evb-maxim-max96712.dtsi | 6 +++--- .../rk3588-vehicle-evb-maxim-max96722-dphy0.dtsi | 6 +++--- .../rk3588-vehicle-evb-maxim-max96722-dphy3.dtsi | 6 +++--- .../rockchip/rk3588-vehicle-evb-maxim-max96722.dtsi | 6 +++--- .../arm64/boot/dts/rockchip/rk3588-vehicle-evb-v22.dts | 10 +++++++--- 9 files changed, 31 insertions(+), 27 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96712-dcphy0.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96712-dcphy0.dtsi index 1f9af40db207..b34959997878 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96712-dcphy0.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96712-dcphy0.dtsi @@ -720,15 +720,15 @@ &pinctrl { max96712-dcphy0 { max96712_dcphy0_pwdn: max96712-dcphy0-pwdn { - rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>; }; max96712_dcphy0_errb: max96712-dcphy0-errb { - rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none_smt>; }; max96712_dcphy0_lock: max96712-dcphy0-lock { - rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none_smt>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96712-dcphy1.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96712-dcphy1.dtsi index d7a0a2f46011..656402014983 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96712-dcphy1.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96712-dcphy1.dtsi @@ -490,15 +490,15 @@ &pinctrl { max96712-dcphy1 { max96712_dcphy1_pwdn: max96712-dcphy1-pwdn { - rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_output_low>; }; max96712_dcphy1_errb: max96712-dcphy1-errb { - rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none_smt>; }; max96712_dcphy1_lock: max96712-dcphy1-lock { - rockchip,pins = <4 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <4 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none_smt>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96712-dphy0.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96712-dphy0.dtsi index 18580f723e28..d5e2cc86bbc1 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96712-dphy0.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96712-dphy0.dtsi @@ -732,15 +732,15 @@ &pinctrl { max96712-dphy0 { max96712_dphy0_pwdn: max96712-dphy0-pwdn { - rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_output_low>; }; max96712_dphy0_errb: max96712-dphy0-errb { - rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none_smt>; }; max96712_dphy0_lock: max96712-dphy0-lock { - rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none_smt>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96712-dphy3.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96712-dphy3.dtsi index e146b16365b9..720b3ec46e56 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96712-dphy3.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96712-dphy3.dtsi @@ -636,15 +636,15 @@ &pinctrl { max96712-dphy3 { max96712_dphy3_pwdn: max96712-dphy3-pwdn { - rockchip,pins = <4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <4 RK_PA6 RK_FUNC_GPIO &pcfg_output_low>; }; max96712_dphy3_errb: max96712-dphy3-errb { - rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none_smt>; }; max96712_dphy3_lock: max96712-dphy3-lock { - rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none_smt>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96712.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96712.dtsi index db774ff1a03f..586c869881ba 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96712.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96712.dtsi @@ -148,15 +148,15 @@ &pinctrl { max96712-dphy3 { max96712_dphy3_power: max96712-dphy3-power { - rockchip,pins = <4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <4 RK_PA6 RK_FUNC_GPIO &pcfg_output_low>; }; max96712_dphy3_errb: max96712-dphy3-errb { - rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none_smt>; }; max96712_dphy3_lock: max96712-dphy3-lock { - rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none_smt>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96722-dphy0.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96722-dphy0.dtsi index becc8999e206..d2eedacfeac7 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96722-dphy0.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96722-dphy0.dtsi @@ -732,15 +732,15 @@ &pinctrl { max96722-dphy0 { max96722_dphy0_pwdn: max96722-dphy0-pwdn { - rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_output_low>; }; max96722_dphy0_errb: max96722-dphy0-errb { - rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none_smt>; }; max96722_dphy0_lock: max96722-dphy0-lock { - rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none_smt>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96722-dphy3.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96722-dphy3.dtsi index ad1b25ef7b97..53dfac5b03a8 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96722-dphy3.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96722-dphy3.dtsi @@ -502,15 +502,15 @@ &pinctrl { max96722-dphy3 { max96722_dphy3_pwdn: max96722-dphy3-pwdn { - rockchip,pins = <4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <4 RK_PA6 RK_FUNC_GPIO &pcfg_output_low>; }; max96722_dphy3_errb: max96722-dphy3-errb { - rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none_smt>; }; max96722_dphy3_lock: max96722-dphy3-lock { - rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none_smt>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96722.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96722.dtsi index 3b655bb8a3fc..c464e0a61ed6 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96722.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-maxim-max96722.dtsi @@ -149,15 +149,15 @@ &pinctrl { max96722-dphy0 { max96722_dphy0_power: max96722-dphy0-power { - rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_output_low>; }; max96722_dphy0_errb: max96722-dphy0-errb { - rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none_smt>; }; max96722_dphy0_lock: max96722-dphy0-lock { - rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none_smt>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-v22.dts b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-v22.dts index e161b05b7984..d418e022873e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-v22.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-v22.dts @@ -456,6 +456,10 @@ }; &pinctrl { + pinctrl-names = "init"; + pinctrl-0 = <&max96712_dphy3_pwdn + &max96712_dphy3_errb + &max96712_dphy3_lock>; bl { bl0_enable_pin: bl0-enable-pin { @@ -489,15 +493,15 @@ max96712-dphy3 { max96712_dphy3_pwdn: max96712-dphy3-pwdn { - rockchip,pins = <4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <4 RK_PA6 RK_FUNC_GPIO &pcfg_output_low>; }; max96712_dphy3_errb: max96712-dphy3-errb { - rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none_smt>; }; max96712_dphy3_lock: max96712-dphy3-lock { - rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none_smt>; }; }; From 87742febe29899cd1e3cf48f984d5e1bbc7575b1 Mon Sep 17 00:00:00 2001 From: Cody Xie Date: Thu, 2 Nov 2023 16:30:57 +0800 Subject: [PATCH 05/14] arm64: dts: rockchip: rk3588-vehicle-s66\*maxim\*: Fix pins default pinctrls Change-Id: Ide7bc019d2599888ee52bc1d257f5ba5a598631d Signed-off-by: Cody Xie --- .../rockchip/rk3588-vehicle-maxim-cameras-s66.dtsi | 12 ++++++------ .../boot/dts/rockchip/rk3588-vehicle-s66-v10.dts | 10 ++++++++++ 2 files changed, 16 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-vehicle-maxim-cameras-s66.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-maxim-cameras-s66.dtsi index c4fe0cbcf165..c9a6c4e51ad6 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-vehicle-maxim-cameras-s66.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-maxim-cameras-s66.dtsi @@ -1151,27 +1151,27 @@ &pinctrl { maxim-cameras { max96712_dphy0_pwdn: max96712-dphy0-pwdn { - rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_output_low>; }; max96712_dphy0_errb: max96712-dphy0-errb { - rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none_smt>; }; max96712_dphy0_lock: max96712-dphy0-lock { - rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none_smt>; }; max96722_dphy3_pwdn: max96722-dphy3-pwdn { - rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_output_low>; }; max96722_dphy3_errb: max96722-dphy3-errb { - rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none_smt>; }; max96722_dphy3_lock: max96722-dphy3-lock { - rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>; + rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none_smt>; }; }; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-vehicle-s66-v10.dts b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-s66-v10.dts index e27ee5107455..59abe8d4e1cb 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-vehicle-s66-v10.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-s66-v10.dts @@ -87,3 +87,13 @@ regulator-on-in-suspend; }; }; + +&pinctrl { + pinctrl-names = "init"; + pinctrl-0 = <&max96712_dphy0_pwdn + &max96712_dphy0_errb + &max96712_dphy0_lock + &max96722_dphy3_pwdn + &max96722_dphy3_errb + &max96722_dphy3_lock>; +}; From dbcf24dd4ca7261c6ac1e9a51b42c73f31f302c8 Mon Sep 17 00:00:00 2001 From: Zefa Chen Date: Thu, 14 Sep 2023 20:11:28 +0800 Subject: [PATCH 06/14] media: rockchip: isp: support change work mode to online with quick stream Signed-off-by: Zefa Chen Change-Id: Ic44728b9e98cb8d15967f3ebdc94ca3d05f7d0e3 --- drivers/media/platform/rockchip/isp/rkisp.c | 52 +++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/drivers/media/platform/rockchip/isp/rkisp.c b/drivers/media/platform/rockchip/isp/rkisp.c index cd09209e9766..c69a21f3dd50 100644 --- a/drivers/media/platform/rockchip/isp/rkisp.c +++ b/drivers/media/platform/rockchip/isp/rkisp.c @@ -3412,6 +3412,55 @@ static int rkisp_get_info(struct rkisp_device *dev, struct rkisp_isp_info *info) return 0; } +static int rkisp_set_work_mode_by_vicap(struct rkisp_device *isp_dev, + struct rkisp_vicap_mode *vicap_mode) +{ + struct rkisp_hw_dev *hw = isp_dev->hw_dev; + int rd_mode = isp_dev->rd_mode; + + if (vicap_mode->rdbk_mode == RKISP_VICAP_ONLINE) { + if (!hw->is_single) + return -EINVAL; + /* switch to online mode for single sensor */ + switch (rd_mode) { + case HDR_RDBK_FRAME3: + isp_dev->rd_mode = HDR_LINEX3_DDR; + break; + case HDR_RDBK_FRAME2: + isp_dev->rd_mode = HDR_LINEX2_DDR; + break; + default: + isp_dev->rd_mode = HDR_NORMAL; + } + } else if (vicap_mode->rdbk_mode == RKISP_VICAP_RDBK_AUTO) { + /* switch to readback mode */ + switch (rd_mode) { + case HDR_LINEX3_DDR: + isp_dev->rd_mode = HDR_RDBK_FRAME3; + break; + case HDR_LINEX2_DDR: + isp_dev->rd_mode = HDR_RDBK_FRAME2; + break; + default: + isp_dev->rd_mode = HDR_RDBK_FRAME1; + } + } else { + return -EINVAL; + } + isp_dev->hdr.op_mode = isp_dev->rd_mode; + if (rd_mode != isp_dev->rd_mode && hw->cur_dev_id == isp_dev->dev_id) { + rkisp_unite_write(isp_dev, CSI2RX_CTRL0, + SW_IBUF_OP_MODE(isp_dev->rd_mode), true); + if (IS_HDR_RDBK(isp_dev->rd_mode)) + rkisp_unite_set_bits(isp_dev, CTRL_SWS_CFG, 0, + SW_MPIP_DROP_FRM_DIS, true); + else + rkisp_unite_clear_bits(isp_dev, CTRL_SWS_CFG, + SW_MPIP_DROP_FRM_DIS, true); + } + return 0; +} + static long rkisp_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) { struct rkisp_device *isp_dev = sd_to_isp_dev(sd); @@ -3543,6 +3592,9 @@ static long rkisp_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) isp_dev->hw_dev->monitor.state &= ~ISP_CIF_RESET; } break; + case RKISP_VICAP_CMD_MODE: + ret = rkisp_set_work_mode_by_vicap(isp_dev, arg); + break; default: ret = -ENOIOCTLCMD; } From 8abd0d3f68eb55a18a2878d6c18e1c9e301ddb6a Mon Sep 17 00:00:00 2001 From: YouMin Chen Date: Thu, 2 Nov 2023 18:31:56 +0800 Subject: [PATCH 07/14] PM / devfreq: rockchip_dmc: add support SYS_STATUS_DEEP_SUSPEND Set the frequency of SYS_STATUS_DEEP_SUSPEND to devfreq->suspend_freq, which is the device frequency set during deep suspend phase. Signed-off-by: YouMin Chen Change-Id: Ic33ded5cc6a17335404ef65dd071e856bdf7e598 --- drivers/devfreq/rockchip_dmc.c | 10 ++++++++++ include/dt-bindings/soc/rockchip-system-status.h | 1 + 2 files changed, 11 insertions(+) diff --git a/drivers/devfreq/rockchip_dmc.c b/drivers/devfreq/rockchip_dmc.c index c8cbbfbfaf6d..48764d7172d6 100644 --- a/drivers/devfreq/rockchip_dmc.c +++ b/drivers/devfreq/rockchip_dmc.c @@ -141,6 +141,7 @@ struct rockchip_dmcfreq { unsigned long hdmirx_rate; unsigned long idle_rate; unsigned long suspend_rate; + unsigned long deep_suspend_rate; unsigned long reboot_rate; unsigned long boost_rate; unsigned long fixed_rate; @@ -2254,6 +2255,9 @@ static int rockchip_get_system_status_rate(struct device_node *np, case SYS_STATUS_SUSPEND: dmcfreq->suspend_rate = freq * 1000; break; + case SYS_STATUS_DEEP_SUSPEND: + dmcfreq->deep_suspend_rate = freq * 1000; + break; case SYS_STATUS_VIDEO_1080P: dmcfreq->video_1080p_rate = freq * 1000; break; @@ -2396,6 +2400,11 @@ static int rockchip_get_system_status_level(struct device_node *np, dmcfreq->suspend_rate = rockchip_freq_level_2_rate(dmcfreq, level); dev_info(dmcfreq->dev, "suspend_rate = %ld\n", dmcfreq->suspend_rate); break; + case SYS_STATUS_DEEP_SUSPEND: + dmcfreq->deep_suspend_rate = rockchip_freq_level_2_rate(dmcfreq, level); + dev_info(dmcfreq->dev, "deep_suspend_rate = %ld\n", + dmcfreq->deep_suspend_rate); + break; case SYS_STATUS_VIDEO_1080P: dmcfreq->video_1080p_rate = rockchip_freq_level_2_rate(dmcfreq, level); dev_info(dmcfreq->dev, "video_1080p_rate = %ld\n", @@ -3097,6 +3106,7 @@ static int rockchip_dmcfreq_add_devfreq(struct rockchip_dmcfreq *dmcfreq) devm_devfreq_register_opp_notifier(dev, devfreq); devfreq->last_status.current_frequency = opp_rate; + devfreq->suspend_freq = dmcfreq->deep_suspend_rate; reset_last_status(devfreq); diff --git a/include/dt-bindings/soc/rockchip-system-status.h b/include/dt-bindings/soc/rockchip-system-status.h index 51364815dcf8..6a0d198a2e6e 100644 --- a/include/dt-bindings/soc/rockchip-system-status.h +++ b/include/dt-bindings/soc/rockchip-system-status.h @@ -37,6 +37,7 @@ #define SYS_STATUS_HDMIRX (1 << 18) #define SYS_STATUS_VIDEO_SVEP (1 << 19) #define SYS_STATUS_VIDEO_4K_60P (1 << 20) +#define SYS_STATUS_DEEP_SUSPEND (1 << 21) #define SYS_STATUS_VIDEO (SYS_STATUS_VIDEO_4K | \ SYS_STATUS_VIDEO_1080P | \ From 59cc6c2107ac38fb7490b057bd237d8c6ad689cc Mon Sep 17 00:00:00 2001 From: YouMin Chen Date: Thu, 2 Nov 2023 18:35:15 +0800 Subject: [PATCH 08/14] arm64: dts: rockchip: rk3588: dmc add SYS_STATUS_DEEP_SUSPEND Signed-off-by: YouMin Chen Change-Id: Ia15fc5ce372aeaaef1a009da20e2759f599988bf --- arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 12d2daa32af5..3ab70af8fffd 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -1744,6 +1744,7 @@ SYS_STATUS_PERFORMANCE DMC_FREQ_LEVEL_HIGH SYS_STATUS_DUALVIEW DMC_FREQ_LEVEL_HIGH SYS_STATUS_HDMIRX DMC_FREQ_LEVEL_HIGH + SYS_STATUS_DEEP_SUSPEND DMC_FREQ_LEVEL_HIGH >; auto-freq-en = <1>; status = "disabled"; From d9794ef01e6e7a2baddc0466192f53c90d6fb0d3 Mon Sep 17 00:00:00 2001 From: Yandong Lin Date: Mon, 6 Nov 2023 16:03:36 +0800 Subject: [PATCH 09/14] video: rockchip: mpp: fix rkvenc2 run crash issue Calling an interface containing mutex lock after schedule_preempt_disabled caused the problem. Call trace: dump_backtrace+0xf4/0x118 show_stack+0x18/0x24 dump_stack_lvl+0x60/0x7c dump_stack+0x18/0x3c __schedule_bug+0x6c/0x8c __schedule+0x64c/0x9cc schedule+0x7c/0xe8 schedule_preempt_disabled+0x24/0x40 __mutex_lock+0x224/0xdac __mutex_lock_slowpath+0x14/0x24 mutex_lock+0x40/0xec clk_get_rate+0x50/0x134 rkvenc_run+0x4ec/0x728 [rk_vcodec] mpp_task_worker_default+0x2b4/0x494 [rk_vcodec] kthread_worker_fn+0x10c/0x244 kthread+0x104/0x1d4 ret_from_fork+0x10/0x20 Fixes: ca7fd6569330 ("video: rockchip: mpp: rkvenc2: optimize iommu fault handle") Signed-off-by: Yandong Lin Change-Id: I1bceea441495a1c6c94776a648601d670b7a29d2 --- drivers/video/rockchip/mpp/mpp_rkvenc2.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/video/rockchip/mpp/mpp_rkvenc2.c b/drivers/video/rockchip/mpp/mpp_rkvenc2.c index fc55395dafc0..ce60a15c838b 100644 --- a/drivers/video/rockchip/mpp/mpp_rkvenc2.c +++ b/drivers/video/rockchip/mpp/mpp_rkvenc2.c @@ -1246,11 +1246,6 @@ static int rkvenc_run(struct mpp_dev *mpp, struct mpp_task *mpp_task) /* init current task */ mpp->cur_task = mpp_task; - mpp_task_run_begin(mpp_task, timing_en, MPP_WORK_TIMEOUT_DELAY); - - /* Flush the register before the start the device */ - wmb(); - /* * reconfig timeout threshold. * bit0-bit23,x1024 core clk cycles @@ -1258,6 +1253,11 @@ static int rkvenc_run(struct mpp_dev *mpp, struct mpp_task *mpp_task) timeout_thd = mpp_read(mpp, RKVENC_WDG) & 0xff000000; timeout_thd |= TIMEOUT_MS * clk_get_rate(enc->core_clk_info.clk) / 1024000; mpp_write(mpp, RKVENC_WDG, timeout_thd); + + mpp_task_run_begin(mpp_task, timing_en, MPP_WORK_TIMEOUT_DELAY); + + /* Flush the register before the start the device */ + wmb(); mpp_write(mpp, enc->hw_info->enc_start_base, start_val); mpp_task_run_end(mpp_task, timing_en); From ecd2f7a8a0bf605b71e2e40bdfa2dd62fce2d2c4 Mon Sep 17 00:00:00 2001 From: Cody Xie Date: Mon, 6 Nov 2023 15:11:14 +0800 Subject: [PATCH 10/14] arm64: dts: rockchip: rk3588-vehicle-evb-v22: Switch to use standalone NCA9539 driver Change-Id: Iff456e2bf6644185a164fba601e914f19c86effa Signed-off-by: Cody Xie --- .../dts/rockchip/rk3588-vehicle-evb-v22.dts | 59 +++++-------------- 1 file changed, 15 insertions(+), 44 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-v22.dts b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-v22.dts index d418e022873e..fe2ecfed9bea 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-v22.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-v22.dts @@ -7,6 +7,7 @@ /dts-v1/; #include "rk3588-vehicle-evb-v21.dtsi" +#include "rk3588-vehicle-evb-v22-nca9539-io-expander.dtsi" #include "rk3588-vehicle-evb-maxim-max96712-dphy3.dtsi" #include "rk3588-vehicle-serdes-mfd-display-rohm.dtsi" #include "rk3588-android.dtsi" @@ -61,7 +62,7 @@ regulator-min-microvolt = <12000000>; regulator-max-microvolt = <12000000>; enable-active-high; - gpio = <&i2c5_nca9539_gpio 0 GPIO_ACTIVE_HIGH>; + gpio = <&nca9539_gpio 0 GPIO_ACTIVE_HIGH>; vin-supply = <&vcc12v_dcin>; regulator-state-mem { regulator-off-in-suspend; @@ -77,7 +78,7 @@ regulator-min-microvolt = <12000000>; regulator-max-microvolt = <12000000>; enable-active-high; - gpio = <&i2c5_nca9539_gpio 1 GPIO_ACTIVE_HIGH>; + gpio = <&nca9539_gpio 1 GPIO_ACTIVE_HIGH>; vin-supply = <&vcc12v_dcin>; regulator-state-mem { regulator-off-in-suspend; @@ -93,7 +94,7 @@ regulator-min-microvolt = <12000000>; regulator-max-microvolt = <12000000>; enable-active-high; - gpio = <&i2c5_nca9539_gpio 2 GPIO_ACTIVE_HIGH>; + gpio = <&nca9539_gpio 2 GPIO_ACTIVE_HIGH>; vin-supply = <&vcc12v_dcin>; regulator-state-mem { regulator-off-in-suspend; @@ -109,7 +110,7 @@ regulator-min-microvolt = <12000000>; regulator-max-microvolt = <12000000>; enable-active-high; - gpio = <&i2c5_nca9539_gpio 3 GPIO_ACTIVE_HIGH>; + gpio = <&nca9539_gpio 3 GPIO_ACTIVE_HIGH>; vin-supply = <&vcc12v_dcin>; regulator-state-mem { regulator-off-in-suspend; @@ -125,7 +126,7 @@ regulator-min-microvolt = <12000000>; regulator-max-microvolt = <12000000>; enable-active-high; - gpio = <&i2c5_nca9539_gpio 4 GPIO_ACTIVE_HIGH>; + gpio = <&nca9539_gpio 4 GPIO_ACTIVE_HIGH>; vin-supply = <&vcc12v_dcin>; regulator-state-mem { regulator-off-in-suspend; @@ -141,7 +142,7 @@ regulator-min-microvolt = <12000000>; regulator-max-microvolt = <12000000>; enable-active-high; - gpio = <&i2c5_nca9539_gpio 5 GPIO_ACTIVE_HIGH>; + gpio = <&nca9539_gpio 5 GPIO_ACTIVE_HIGH>; vin-supply = <&vcc12v_dcin>; regulator-state-mem { regulator-off-in-suspend; @@ -156,7 +157,7 @@ regulator-min-microvolt = <12000000>; regulator-max-microvolt = <12000000>; enable-active-high; - gpio = <&i2c5_nca9539_gpio 6 GPIO_ACTIVE_HIGH>; + gpio = <&nca9539_gpio 6 GPIO_ACTIVE_HIGH>; startup-delay-us = <2000>; off-on-delay-us = <16000>; vin-supply = <&vcc12v_dcin>; @@ -173,7 +174,7 @@ regulator-min-microvolt = <12000000>; regulator-max-microvolt = <12000000>; enable-active-high; - gpio = <&i2c5_nca9539_gpio 7 GPIO_ACTIVE_HIGH>; + gpio = <&nca9539_gpio 7 GPIO_ACTIVE_HIGH>; startup-delay-us = <2000>; off-on-delay-us = <16000>; vin-supply = <&vcc12v_dcin>; @@ -190,7 +191,7 @@ regulator-min-microvolt = <12000000>; regulator-max-microvolt = <12000000>; enable-active-high; - gpio = <&i2c5_nca9539_gpio 8 GPIO_ACTIVE_HIGH>; + gpio = <&nca9539_gpio 8 GPIO_ACTIVE_HIGH>; startup-delay-us = <2000>; off-on-delay-us = <16000>; vin-supply = <&vcc12v_dcin>; @@ -207,7 +208,7 @@ regulator-min-microvolt = <12000000>; regulator-max-microvolt = <12000000>; enable-active-high; - gpio = <&i2c5_nca9539_gpio 9 GPIO_ACTIVE_HIGH>; + gpio = <&nca9539_gpio 9 GPIO_ACTIVE_HIGH>; startup-delay-us = <2000>; off-on-delay-us = <16000>; vin-supply = <&vcc12v_dcin>; @@ -225,7 +226,7 @@ regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; enable-active-high; - gpio = <&i2c5_nca9539_gpio 10 GPIO_ACTIVE_HIGH>; + gpio = <&nca9539_gpio 10 GPIO_ACTIVE_HIGH>; startup-delay-us = <2000>; off-on-delay-us = <16000>; vin-supply = <&vcc5v0_usb>; @@ -239,7 +240,7 @@ regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; enable-active-high; - gpio = <&i2c5_nca9539_gpio 11 GPIO_ACTIVE_HIGH>; + gpio = <&nca9539_gpio 11 GPIO_ACTIVE_HIGH>; startup-delay-us = <2000>; off-on-delay-us = <16000>; vin-supply = <&vcc5v0_usb>; @@ -253,7 +254,7 @@ regulator-min-microvolt = <12000000>; regulator-max-microvolt = <12000000>; enable-active-high; - gpio = <&i2c5_nca9539_gpio 12 GPIO_ACTIVE_HIGH>; + gpio = <&nca9539_gpio 12 GPIO_ACTIVE_HIGH>; vin-supply = <&vcc12v_dcin>; regulator-state-mem { regulator-off-in-suspend; @@ -269,7 +270,7 @@ regulator-min-microvolt = <12000000>; regulator-max-microvolt = <12000000>; enable-active-high; - gpio = <&i2c5_nca9539_gpio 13 GPIO_ACTIVE_HIGH>; + gpio = <&nca9539_gpio 13 GPIO_ACTIVE_HIGH>; vin-supply = <&vcc5v0_usb>; regulator-state-mem { regulator-off-in-suspend; @@ -398,36 +399,6 @@ interrupt-parent = <&gpio1>; interrupts = ; }; - - i2c5_nca9539: i2c5-nca9539@74 { - compatible = "novo,nca9539"; - reg = <0x74>; - status = "okay"; - - /* P00-P07 P10-P17 output HIGH level default*/ - serdes-init-sequence = [ - 0002 00ff - 0003 00ff - 0004 0000 - 0005 0000 - 0006 0000 - 0007 0000 - ]; - - i2c5_nca9539_pinctrl: i2c5-nca9539-pinctrl { - compatible = "novo,nca9539-pinctrl"; - status = "okay"; - - i2c5_nca9539_gpio: i2c5-nca9539-gpio { - compatible = "novo,nca9539-gpio"; - status = "okay"; - - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&i2c5_nca9539_pinctrl 0 256 16>; - }; - }; - }; }; &i2c5_bu18tl82 { From 4314dcc88fad787dfacdbab51ad9f135b2c550e7 Mon Sep 17 00:00:00 2001 From: Elaine Zhang Date: Fri, 13 Oct 2023 10:21:20 +0800 Subject: [PATCH 11/14] net: can: rockchip: fix tx error in special application add wait tx req cmd. fix warning: "BUG! echo_skb %d is occupied!" disable space_rx_mode when tx req to fix extended frame probability change standard frame. Signed-off-by: Elaine Zhang Change-Id: I0b11d985224682700f43cb155f357b28622dc4be --- drivers/net/can/rockchip/rockchip_canfd.c | 57 ++++++++++++++++------- 1 file changed, 40 insertions(+), 17 deletions(-) diff --git a/drivers/net/can/rockchip/rockchip_canfd.c b/drivers/net/can/rockchip/rockchip_canfd.c index abdcdb580eff..f616f3b98803 100644 --- a/drivers/net/can/rockchip/rockchip_canfd.c +++ b/drivers/net/can/rockchip/rockchip_canfd.c @@ -214,6 +214,7 @@ enum { #define CAN_RXFRD_OFFSET(n) (CAN_RXFRD + CAN_RF_SIZE * (n)) #define CAN_RX_FILTER_MASK 0x1fffffff +#define NOACK_ERR_FLAG 0xc200800 #define DRV_NAME "rockchip_canfd" @@ -234,6 +235,7 @@ struct rockchip_canfd { bool txtorx; u32 tx_invalid[4]; struct delayed_work tx_err_work; + u32 delay_time_ms; }; static inline u32 rockchip_canfd_read(const struct rockchip_canfd *priv, @@ -357,6 +359,12 @@ static int rockchip_canfd_set_bittiming(struct net_device *ndev) rockchip_canfd_write(rcan, CAN_DBTP, reg_btp); } + if (bt->bitrate > 200000) + rcan->delay_time_ms = 1; + else if (bt->bitrate > 50000) + rcan->delay_time_ms = 5; + else + rcan->delay_time_ms = 20; netdev_dbg(ndev, "%s NBTP=0x%08x, DBTP=0x%08x, TDCR=0x%08x\n", __func__, rockchip_canfd_read(rcan, CAN_NBTP), @@ -487,13 +495,27 @@ static void rockchip_canfd_tx_err_delay_work(struct work_struct *work) { struct rockchip_canfd *rcan = container_of(work, struct rockchip_canfd, tx_err_work.work); - u32 mode; + u32 mode, err_code; mode = rockchip_canfd_read(rcan, CAN_MODE); - rockchip_canfd_write(rcan, CAN_MODE, 0); - rockchip_canfd_write(rcan, CAN_MODE, mode); - rockchip_canfd_write(rcan, CAN_CMD, CAN_TX0_REQ); - schedule_delayed_work(&rcan->tx_err_work, 1); + err_code = rockchip_canfd_read(rcan, CAN_ERR_CODE); + if ((err_code & NOACK_ERR_FLAG) == NOACK_ERR_FLAG) { + rockchip_canfd_write(rcan, CAN_MODE, + rockchip_canfd_read(rcan, CAN_MODE) | MODE_SPACE_RX); + rockchip_canfd_write(rcan, CAN_CMD, CAN_TX0_REQ); + rockchip_canfd_write(rcan, CAN_MODE, + rockchip_canfd_read(rcan, CAN_MODE) & (~MODE_SPACE_RX)); + schedule_delayed_work(&rcan->tx_err_work, msecs_to_jiffies(rcan->delay_time_ms)); + } else { + rockchip_canfd_write(rcan, CAN_MODE, 0); + rockchip_canfd_write(rcan, CAN_MODE, mode); + rockchip_canfd_write(rcan, CAN_MODE, + rockchip_canfd_read(rcan, CAN_MODE) | MODE_SPACE_RX); + rockchip_canfd_write(rcan, CAN_CMD, CAN_TX0_REQ); + rockchip_canfd_write(rcan, CAN_MODE, + rockchip_canfd_read(rcan, CAN_MODE) & (~MODE_SPACE_RX)); + schedule_delayed_work(&rcan->tx_err_work, msecs_to_jiffies(rcan->delay_time_ms)); + } } /* transmit a CAN message @@ -569,10 +591,9 @@ static int rockchip_canfd_start_xmit(struct sk_buff *skb, for (i = 0; i < cf->len; i += 4) rockchip_canfd_write(rcan, CAN_TXDAT0 + i, *(u32 *)(cf->data + i)); + can_put_echo_skb(skb, ndev, 0); rockchip_canfd_write(rcan, CAN_CMD, CAN_TX1_REQ); local_irq_restore(flags); - can_put_echo_skb(skb, ndev, 0); - return NETDEV_TX_OK; } @@ -583,12 +604,13 @@ static int rockchip_canfd_start_xmit(struct sk_buff *skb, rockchip_canfd_write(rcan, CAN_TXDAT0 + i, *(u32 *)(cf->data + i)); - rockchip_canfd_write(rcan, CAN_CMD, cmd); - - schedule_delayed_work(&rcan->tx_err_work, 1); - can_put_echo_skb(skb, ndev, 0); - + rockchip_canfd_write(rcan, CAN_MODE, + rockchip_canfd_read(rcan, CAN_MODE) | MODE_SPACE_RX); + rockchip_canfd_write(rcan, CAN_CMD, cmd); + rockchip_canfd_write(rcan, CAN_MODE, + rockchip_canfd_read(rcan, CAN_MODE) & (~MODE_SPACE_RX)); + schedule_delayed_work(&rcan->tx_err_work, msecs_to_jiffies(rcan->delay_time_ms)); return NETDEV_TX_OK; } @@ -740,9 +762,6 @@ static int rockchip_canfd_err(struct net_device *ndev, u32 isr) cf->data[7] = rxerr; } - if (isr & TX_LOSTARB_INT) - schedule_delayed_work(&rcan->tx_err_work, 1); - if (isr & BUS_OFF_INT) { rcan->can.state = CAN_STATE_BUS_OFF; rcan->can.can_stats.bus_off++; @@ -788,13 +807,14 @@ static irqreturn_t rockchip_canfd_interrupt(int irq, void *dev_id) struct rockchip_canfd *rcan = netdev_priv(ndev); struct net_device_stats *stats = &ndev->stats; u32 err_int = ERR_WARN_INT | RX_BUF_OV_INT | PASSIVE_ERR_INT | - TX_LOSTARB_INT | BUS_ERR_INT | BUS_OFF_INT; + BUS_ERR_INT | BUS_OFF_INT; u32 isr; u32 dlc = 0; u32 quota, work_done = 0; isr = rockchip_canfd_read(rcan, CAN_INT); if (isr & TX_FINISH_INT) { + cancel_delayed_work(&rcan->tx_err_work); dlc = rockchip_canfd_read(rcan, CAN_TXFIC); /* transmission complete interrupt */ if (dlc & FDF_MASK) @@ -802,7 +822,6 @@ static irqreturn_t rockchip_canfd_interrupt(int irq, void *dev_id) else stats->tx_bytes += (dlc & DLC_MASK); stats->tx_packets++; - cancel_delayed_work(&rcan->tx_err_work); if (rcan->txtorx && rcan->mode <= ROCKCHIP_RK3568_CAN_MODE && dlc & FORMAT_MASK) { rockchip_canfd_write(rcan, CAN_TX_CHECK_FIC, FORMAT_MASK); quota = rockchip_canfd_get_rx_fifo_cnt(ndev); @@ -814,6 +833,10 @@ static irqreturn_t rockchip_canfd_interrupt(int irq, void *dev_id) rockchip_canfd_write(rcan, CAN_CMD, CAN_TX1_REQ); rockchip_canfd_write(rcan, CAN_TX_CHECK_FIC, 0); } + if (read_poll_timeout_atomic(rockchip_canfd_read, quota, + !(quota & 0x3), + 0, 5000000, false, rcan, CAN_CMD)) + netdev_err(ndev, "Warning: wait tx req timeout!\n"); rockchip_canfd_write(rcan, CAN_CMD, 0); can_get_echo_skb(ndev, 0); netif_wake_queue(ndev); From e903c656610598fda90716f232f64ad39bf32a49 Mon Sep 17 00:00:00 2001 From: Elaine Zhang Date: Mon, 6 Nov 2023 09:49:15 +0800 Subject: [PATCH 12/14] net: can: rockchip: support Listen-only mode Signed-off-by: Elaine Zhang Change-Id: I6b566f3f0834ff01e9cff1c1b7ef3934c2e5ec37 --- drivers/net/can/rockchip/rockchip_canfd.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/net/can/rockchip/rockchip_canfd.c b/drivers/net/can/rockchip/rockchip_canfd.c index f616f3b98803..3f9fa214b335 100644 --- a/drivers/net/can/rockchip/rockchip_canfd.c +++ b/drivers/net/can/rockchip/rockchip_canfd.c @@ -436,6 +436,10 @@ static int rockchip_canfd_start(struct net_device *ndev) if (rcan->can.ctrlmode & CAN_CTRLMODE_LOOPBACK) val |= MODE_SELF_TEST | MODE_LBACK; + /* Listen-only mode */ + if (rcan->can.ctrlmode & CAN_CTRLMODE_LISTENONLY) + val |= MODE_SILENT; + rockchip_canfd_write(rcan, CAN_MODE, val); rockchip_canfd_set_bittiming(ndev); From 9038fae6bddb6dd9c0af4cfde90d88a9ea021635 Mon Sep 17 00:00:00 2001 From: Elaine Zhang Date: Mon, 6 Nov 2023 09:50:18 +0800 Subject: [PATCH 13/14] net: can: rockchip: fix rx stuck and timeout In some special applications, tx has read data from the fifo, rx to read the fifo is 0 when there is no need to do timeout waiting. Signed-off-by: Elaine Zhang Change-Id: I7f4bc88ace026088228396da96d628bebb9e4b94 --- drivers/net/can/rockchip/rockchip_canfd.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/net/can/rockchip/rockchip_canfd.c b/drivers/net/can/rockchip/rockchip_canfd.c index 3f9fa214b335..3189abc20ad7 100644 --- a/drivers/net/can/rockchip/rockchip_canfd.c +++ b/drivers/net/can/rockchip/rockchip_canfd.c @@ -852,7 +852,10 @@ static irqreturn_t rockchip_canfd_interrupt(int irq, void *dev_id) rockchip_canfd_write(rcan, CAN_INT_MASK, 0x1); napi_schedule(&rcan->napi); } else { - quota = rockchip_canfd_get_rx_fifo_cnt(ndev); + work_done = 0; + quota = (rockchip_canfd_read(rcan, CAN_RXFC) & + rcan->rx_fifo_mask) >> + rcan->rx_fifo_shift; if (quota) { while (work_done < quota) work_done += rockchip_canfd_rx(ndev); From 64ab42efa552b21f5d9cd259f7f13c8b5125842d Mon Sep 17 00:00:00 2001 From: Elaine Zhang Date: Mon, 6 Nov 2023 09:56:50 +0800 Subject: [PATCH 14/14] net: can: rockchip: use soft reset for bus off Signed-off-by: Elaine Zhang Change-Id: I8950b7ee8fa677376600599922aa6c40d1af2d0a --- drivers/net/can/rockchip/rockchip_canfd.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/net/can/rockchip/rockchip_canfd.c b/drivers/net/can/rockchip/rockchip_canfd.c index 3189abc20ad7..dba7f14c45f3 100644 --- a/drivers/net/can/rockchip/rockchip_canfd.c +++ b/drivers/net/can/rockchip/rockchip_canfd.c @@ -215,6 +215,7 @@ enum { #define CAN_RX_FILTER_MASK 0x1fffffff #define NOACK_ERR_FLAG 0xc200800 +#define CAN_BUSOFF_FLAG 0x20 #define DRV_NAME "rockchip_canfd" @@ -795,8 +796,14 @@ static int rockchip_canfd_err(struct net_device *ndev, u32 isr) } if (rcan->can.state >= CAN_STATE_BUS_OFF || - ((sta_reg & 0x20) == 0x20)) - can_bus_off(ndev); + ((sta_reg & CAN_BUSOFF_FLAG) == CAN_BUSOFF_FLAG)) { + cancel_delayed_work(&rcan->tx_err_work); + netif_stop_queue(ndev); + rockchip_canfd_stop(ndev); + can_free_echo_skb(ndev, 0); + rockchip_canfd_start(ndev); + netif_start_queue(ndev); + } stats->rx_packets++; stats->rx_bytes += cf->can_dlc;