diff --git a/drivers/amlogic/mtd/aml_mtd.h b/drivers/amlogic/mtd/aml_mtd.h index d7cc6fd30e48..98f1247cc0fe 100644 --- a/drivers/amlogic/mtd/aml_mtd.h +++ b/drivers/amlogic/mtd/aml_mtd.h @@ -878,5 +878,9 @@ extern struct aml_nand_flash_dev aml_nand_flash_ids[]; void aml_nand_new_nand_param_init(struct mtd_info *mtd, struct aml_nand_flash_dev *type); +int aml_nand_get_fbb_issue(void); + +void aml_nand_check_fbb_issue(u8 *dev_id); + #endif diff --git a/drivers/amlogic/mtd/nand_flash.c b/drivers/amlogic/mtd/nand_flash.c index 3b0cb1725b18..13edce8a674f 100644 --- a/drivers/amlogic/mtd/nand_flash.c +++ b/drivers/amlogic/mtd/nand_flash.c @@ -17,6 +17,7 @@ #include "aml_mtd.h" +int nand_fbb_issue_flag; struct aml_nand_flash_dev aml_nand_flash_ids[] = { {"A revision NAND 2GiB H27UAG8T2A", {NAND_MFR_HYNIX, 0xd5, 0x94, 0x25, 0x44, 0x41}, @@ -1041,6 +1042,21 @@ struct aml_nand_flash_dev aml_nand_flash_ids[] = { {NULL,} }; +int aml_nand_get_fbb_issue(void) +{ + return nand_fbb_issue_flag; +} + +void aml_nand_check_fbb_issue(u8 *dev_id) +{ + u8 samsung_nand_id[MAX_ID_LEN] = { + NAND_MFR_SAMSUNG, 0xdc, 0x10, 0x95, 0x56}; + + if (!strncmp((char *)samsung_nand_id, (char *)dev_id, + strlen((const char *)samsung_nand_id))) + nand_fbb_issue_flag = 1; +} + /* ******************** */ #ifdef CONFIG_PARAMETER_PAGE struct parameter_page para_page; @@ -1241,6 +1257,7 @@ static struct aml_nand_flash_dev *aml_nand_get_flash_type(struct mtd_info *mtd, if (!type) return ERR_PTR(-ENODEV); } + aml_nand_check_fbb_issue(dev_id); if (type->new_type) { pr_info("new nand support!!!\n"); diff --git a/drivers/amlogic/mtd/rsv_manage.c b/drivers/amlogic/mtd/rsv_manage.c index 674c13c91287..f8038c17a688 100644 --- a/drivers/amlogic/mtd/rsv_manage.c +++ b/drivers/amlogic/mtd/rsv_manage.c @@ -192,6 +192,12 @@ int aml_nand_scan_shipped_bbt(struct mtd_info *mtd) if (aml_chip->plane_num == 2) { chip->select_chip(mtd, i); aml_chip->aml_nand_wait_devready(aml_chip, i); + if (aml_nand_get_fbb_issue()) { + chip->cmd_ctrl(mtd, + NAND_CMD_SEQIN, NAND_CTRL_CLE); + chip->cmd_ctrl(mtd, + 0, NAND_CTRL_ALE); + } aml_chip->aml_nand_command(aml_chip, NAND_CMD_READ0, 0x00, aml_chip->page_addr, i); @@ -232,6 +238,12 @@ int aml_nand_scan_shipped_bbt(struct mtd_info *mtd) chip->select_chip(mtd, i); /* nand_get_chip(); */ /*aml_chip->aml_nand_select_chip(aml_chip, i);*/ + if (aml_nand_get_fbb_issue()) { + chip->cmd_ctrl(mtd, + NAND_CMD_SEQIN, NAND_CTRL_CLE); + chip->cmd_ctrl(mtd, + 0, NAND_CTRL_ALE); + } aml_chip->aml_nand_command(aml_chip, NAND_CMD_READ0, 0x00, aml_chip->page_addr, i);