diff --git a/arch/arm/boot/dts/exynos5422-cpus.dtsi b/arch/arm/boot/dts/exynos5422-cpus.dtsi
index e4a5857c135f..aea3893fed24 100644
--- a/arch/arm/boot/dts/exynos5422-cpus.dtsi
+++ b/arch/arm/boot/dts/exynos5422-cpus.dtsi
@@ -26,7 +26,7 @@
 			compatible = "arm,cortex-a7";
 			reg = <0x100>;
 			clocks = <&clock CLK_KFC_CLK>;
-			clock-frequency = <1000000000>;
+			clock-frequency = <1400000000>;
 			cci-control-port = <&cci_control0>;
 			operating-points-v2 = <&cluster_a7_opp_table>;
 			#cooling-cells = <2>; /* min followed by max */
@@ -38,7 +38,7 @@
 			compatible = "arm,cortex-a7";
 			reg = <0x101>;
 			clocks = <&clock CLK_KFC_CLK>;
-			clock-frequency = <1000000000>;
+			clock-frequency = <1400000000>;
 			cci-control-port = <&cci_control0>;
 			operating-points-v2 = <&cluster_a7_opp_table>;
 			#cooling-cells = <2>; /* min followed by max */
@@ -50,7 +50,7 @@
 			compatible = "arm,cortex-a7";
 			reg = <0x102>;
 			clocks = <&clock CLK_KFC_CLK>;
-			clock-frequency = <1000000000>;
+			clock-frequency = <1400000000>;
 			cci-control-port = <&cci_control0>;
 			operating-points-v2 = <&cluster_a7_opp_table>;
 			#cooling-cells = <2>; /* min followed by max */
@@ -62,7 +62,7 @@
 			compatible = "arm,cortex-a7";
 			reg = <0x103>;
 			clocks = <&clock CLK_KFC_CLK>;
-			clock-frequency = <1000000000>;
+			clock-frequency = <1400000000>;
 			cci-control-port = <&cci_control0>;
 			operating-points-v2 = <&cluster_a7_opp_table>;
 			#cooling-cells = <2>; /* min followed by max */
@@ -74,7 +74,7 @@
 			compatible = "arm,cortex-a15";
 			reg = <0x0>;
 			clocks = <&clock CLK_ARM_CLK>;
-			clock-frequency = <1800000000>;
+			clock-frequency = <2000000000>;
 			cci-control-port = <&cci_control1>;
 			operating-points-v2 = <&cluster_a15_opp_table>;
 			#cooling-cells = <2>; /* min followed by max */
@@ -86,7 +86,7 @@
 			compatible = "arm,cortex-a15";
 			reg = <0x1>;
 			clocks = <&clock CLK_ARM_CLK>;
-			clock-frequency = <1800000000>;
+			clock-frequency = <2000000000>;
 			cci-control-port = <&cci_control1>;
 			operating-points-v2 = <&cluster_a15_opp_table>;
 			#cooling-cells = <2>; /* min followed by max */
@@ -98,7 +98,7 @@
 			compatible = "arm,cortex-a15";
 			reg = <0x2>;
 			clocks = <&clock CLK_ARM_CLK>;
-			clock-frequency = <1800000000>;
+			clock-frequency = <2000000000>;
 			cci-control-port = <&cci_control1>;
 			operating-points-v2 = <&cluster_a15_opp_table>;
 			#cooling-cells = <2>; /* min followed by max */
@@ -110,7 +110,7 @@
 			compatible = "arm,cortex-a15";
 			reg = <0x3>;
 			clocks = <&clock CLK_ARM_CLK>;
-			clock-frequency = <1800000000>;
+			clock-frequency = <2000000000>;
 			cci-control-port = <&cci_control1>;
 			operating-points-v2 = <&cluster_a15_opp_table>;
 			#cooling-cells = <2>; /* min followed by max */
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts
index c19b5a51ca44..8082e3ce4228 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts
@@ -18,6 +18,15 @@
 	compatible = "hardkernel,odroid-xu3-lite", "samsung,exynos5800", "samsung,exynos5";
 };
 
+&cluster_a15_opp_table {
+	/delete-node/opp-2000000000;
+	/delete-node/opp-1900000000;
+};
+
+&cluster_a7_opp_table {
+	/delete-node/opp-1400000000;
+};
+
 &arm_a7_pmu {
 	status = "disabled";
 };
diff --git a/arch/arm/boot/dts/exynos5800.dtsi b/arch/arm/boot/dts/exynos5800.dtsi
index de639eecc5c9..da293b0ec411 100644
--- a/arch/arm/boot/dts/exynos5800.dtsi
+++ b/arch/arm/boot/dts/exynos5800.dtsi
@@ -21,35 +21,48 @@
 };
 
 &cluster_a15_opp_table {
-	opp-1700000000 {
+	opp-2000000000 {
+		opp-hz = /bits/ 64 <2000000000>;
+		opp-microvolt = <1312500>;
+		clock-latency-ns = <140000>;
+	};
+	opp-1900000000 {
+		opp-hz = /bits/64 <1900000000>;
 		opp-microvolt = <1250000>;
+		clock-latency-ns = <140000>;
+	};
+	opp-1800000000 {
+		opp-microvolt = <1200000>;
+	};
+	opp-1700000000 {
+		opp-microvolt = <1162500>;
 	};
 	opp-1600000000 {
-		opp-microvolt = <1250000>;
+		opp-microvolt = <1125000>;
 	};
 	opp-1500000000 {
-		opp-microvolt = <1100000>;
+		opp-microvolt = <1087500>;
 	};
 	opp-1400000000 {
-		opp-microvolt = <1100000>;
+		opp-microvolt = <1062500>;
 	};
 	opp-1300000000 {
-		opp-microvolt = <1100000>;
+		opp-microvolt = <1050000>;
 	};
 	opp-1200000000 {
-		opp-microvolt = <1000000>;
+		opp-microvolt = <1050000>;
 	};
 	opp-1100000000 {
 		opp-microvolt = <1000000>;
 	};
 	opp-1000000000 {
-		opp-microvolt = <1000000>;
+		opp-microvolt = <975000>;
 	};
 	opp-900000000 {
-		opp-microvolt = <1000000>;
+		opp-microvolt = <950000>;
 	};
 	opp-800000000 {
-		opp-microvolt = <900000>;
+		opp-microvolt = <925000>;
 	};
 	opp-700000000 {
 		opp-microvolt = <900000>;
@@ -82,38 +95,43 @@
 };
 
 &cluster_a7_opp_table {
+	opp-1400000000 {
+		opp-hz = /bits/ 64 <1400000000>;
+		opp-microvolt = <1275000>;
+		clock-latency-ns = <140000>;
+	};
 	opp-1300000000 {
-		opp-microvolt = <1250000>;
+		opp-microvolt = <1225000>;
 	};
 	opp-1200000000 {
-		opp-microvolt = <1250000>;
+		opp-microvolt = <1175000>;
 	};
 	opp-1100000000 {
-		opp-microvolt = <1250000>;
+		opp-microvolt = <1137500>;
 	};
 	opp-1000000000 {
 		opp-microvolt = <1100000>;
 	};
 	opp-900000000 {
-		opp-microvolt = <1100000>;
+		opp-microvolt = <1062500>;
 	};
 	opp-800000000 {
-		opp-microvolt = <1100000>;
+		opp-microvolt = <1025000>;
 	};
 	opp-700000000 {
-		opp-microvolt = <1000000>;
+		opp-microvolt = <987500>;
 	};
 	opp-600000000 {
-		opp-microvolt = <1000000>;
+		opp-microvolt = <950000>;
 	};
 	opp-500000000 {
 		opp-hz = /bits/ 64 <500000000>;
-		opp-microvolt = <1000000>;
+		opp-microvolt = <900000>;
 		clock-latency-ns = <140000>;
 	};
 	opp-400000000 {
 		opp-hz = /bits/ 64 <400000000>;
-		opp-microvolt = <1000000>;
+		opp-microvolt = <900000>;
 		clock-latency-ns = <140000>;
 	};
 	opp-300000000 {