diff --git a/sound/soc/rockchip/rockchip_pdm.c b/sound/soc/rockchip/rockchip_pdm.c index 72ea3f08f23b..52446103b1c9 100644 --- a/sound/soc/rockchip/rockchip_pdm.c +++ b/sound/soc/rockchip/rockchip_pdm.c @@ -29,6 +29,7 @@ #define PDM_DMA_BURST_SIZE (8) /* size * width: 8*4 = 32 bytes */ #define PDM_SIGNOFF_CLK_RATE (100000000) +#define PDM_PATH_MAX (4) enum rk_pdm_version { RK_PDM_RK3229, @@ -548,6 +549,33 @@ static const struct of_device_id rockchip_pdm_match[] = { }; MODULE_DEVICE_TABLE(of, rockchip_pdm_match); +static int rockchip_pdm_path_parse(struct rk_pdm_dev *pdm, struct device_node *node) +{ + unsigned int path[PDM_PATH_MAX]; + int cnt = 0, ret = 0, i = 0, val = 0, msk = 0; + + cnt = of_count_phandle_with_args(node, "rockchip,path-map", + NULL); + if (cnt != PDM_PATH_MAX) + return cnt; + + ret = of_property_read_u32_array(node, "rockchip,path-map", + path, cnt); + if (ret) + return ret; + + for (i = 0; i < cnt; i++) { + if (path[i] >= PDM_PATH_MAX) + return -EINVAL; + msk |= PDM_PATH_MASK(i); + val |= PDM_PATH(i, path[i]); + } + + regmap_update_bits(pdm->regmap, PDM_CLK_CTRL, msk, val); + + return 0; +} + static int rockchip_pdm_probe(struct platform_device *pdev) { struct device_node *node = pdev->dev.of_node; @@ -617,6 +645,11 @@ static int rockchip_pdm_probe(struct platform_device *pdev) } rockchip_pdm_rxctrl(pdm, 0); + + ret = rockchip_pdm_path_parse(pdm, node); + if (ret != -ENOENT) + goto err_suspend; + if (of_property_read_bool(node, "rockchip,no-dmaengine")) return ret; ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0); diff --git a/sound/soc/rockchip/rockchip_pdm.h b/sound/soc/rockchip/rockchip_pdm.h index 8cfa8f013ac1..f87a9f92e16f 100644 --- a/sound/soc/rockchip/rockchip_pdm.h +++ b/sound/soc/rockchip/rockchip_pdm.h @@ -62,6 +62,9 @@ #define PDM_FD_DENOMINATOR_MSK GENMASK(15, 0) /* PDM CLK CTRL */ +#define PDM_PATH_SHIFT(x) (8 + (x) * 2) +#define PDM_PATH_MASK(x) (0x3 << PDM_PATH_SHIFT(x)) +#define PDM_PATH(x, v) ((v) << PDM_PATH_SHIFT(x)) #define PDM_CLK_FD_RATIO_MSK BIT(6) #define PDM_CLK_FD_RATIO_40 (0X0 << 6) #define PDM_CLK_FD_RATIO_35 BIT(6)