From 93f3dd8031997e699f369f63c71497bb12263130 Mon Sep 17 00:00:00 2001 From: Finley Xiao Date: Mon, 7 Dec 2020 19:53:35 +0800 Subject: [PATCH] clk: rockchip: rk3568: Fix clk_tsadc_tsen mux width Signed-off-by: Finley Xiao Change-Id: I659b4e501e7fe8ad769bbd017f615d6ae359cf1c --- drivers/clk/rockchip/clk-rk3568.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/rockchip/clk-rk3568.c b/drivers/clk/rockchip/clk-rk3568.c index d3dbd5641fbc..179d7dab974a 100644 --- a/drivers/clk/rockchip/clk-rk3568.c +++ b/drivers/clk/rockchip/clk-rk3568.c @@ -1210,7 +1210,7 @@ static struct rockchip_clk_branch rk3568_clk_branches[] __initdata = { GATE(PCLK_TSADC, "pclk_tsadc", "pclk_bus", 0, RK3568_CLKGATE_CON(26), 4, GFLAGS), COMPOSITE(CLK_TSADC_TSEN, "clk_tsadc_tsen", xin24m_gpll100_cpll100_p, 0, - RK3568_CLKSEL_CON(51), 4, 1, MFLAGS, 0, 3, DFLAGS, + RK3568_CLKSEL_CON(51), 4, 2, MFLAGS, 0, 3, DFLAGS, RK3568_CLKGATE_CON(26), 5, GFLAGS), COMPOSITE_NOMUX(CLK_TSADC, "clk_tsadc", "clk_tsadc_tsen", 0, RK3568_CLKSEL_CON(51), 8, 7, DFLAGS,