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TrustZone: Add Support Trust OS
if Trust OS running ,
- disable ddr_freq
- disable fiq debug
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@@ -20,8 +20,8 @@ config ARCH_ROCKCHIP
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select DMADEVICES
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select PL330_DMA
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select FIQ_GLUE
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select ARM_ERRATA_818325
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select ARM_ERRATA_821420
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select ARM_ERRATA_818325 if !ARM_TRUSTZONE
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select ARM_ERRATA_821420 if !ARM_TRUSTZONE
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if ARCH_ROCKCHIP
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@@ -5,7 +5,7 @@ obj-y += rk312x.o
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obj-y += rk3126b.o
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obj-y += rk3188.o
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obj-y += rk3288.o
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obj-y += ddr_freq.o
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obj-$(!CONFIG_ARM_TRUSTZONE) += ddr_freq.o
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obj-y += efuse.o
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obj-y += pvtm.o
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obj-y += rk_system_status.o
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@@ -841,7 +841,9 @@ void fiq_glue_resume(void);
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static inline void rkpm_peri_resume(u32 power_mode)
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{
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rkpm_gic_dist_resume(&slp_gic_save[0]);
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#ifndef CONFIG_ARM_TRUSTZONE
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fiq_glue_resume();
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#endif
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}
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static void rkpm_save_setting_resume(void)
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@@ -146,7 +146,9 @@ static void __init rk3288_dt_map_io(void)
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writel_relaxed(0x00010001, RK_GRF_VIRT + RK3288_GRF_SOC_CON2);
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/* disable address remap */
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#ifndef CONFIG_ARM_TRUSTZONE
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writel_relaxed(0x08000000, RK_SGRF_VIRT + RK3288_SGRF_SOC_CON0);
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#endif
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/* enable timer7 for core */
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writel_relaxed(0, RK3288_TIMER7_VIRT + 0x10);
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@@ -162,7 +164,9 @@ static void __init rk3288_dt_map_io(void)
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writel_relaxed(24, RK_PMU_VIRT + RK3288_PMU_GPU_PWRUP_CNT);
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rk3288_boot_mode_init();
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#ifndef CONFIG_ARM_TRUSTZONE
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rockchip_efuse_init();
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#endif
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}
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static const u8 pmu_st_map[] = {
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@@ -667,7 +671,11 @@ static int __init rk3288_pm_dbg(void)
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static int __init rk3288_ddr_init(void)
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{
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if (cpu_is_rk3288())
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if (cpu_is_rk3288()
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#ifdef CONFIG_ARM_TRUSTZONE
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&& false
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#endif
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)
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{
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ddr_change_freq = _ddr_change_freq;
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ddr_round_rate = _ddr_round_rate;
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@@ -596,6 +596,16 @@ config IO_36
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comment "Processor Features"
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config ARM_TRUSTZONE
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bool "Support TrustZone-enabled Trusted Execution Environment"
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default n
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help
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Select if you want a kernel to be executed at non-secure world.
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This option should be used with related secure bootloader and
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TrustZone software.
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If you don't know about TrustZone, say 'N'.
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config ARM_LPAE
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bool "Support for the Large Physical Address Extension"
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depends on MMU && CPU_32v7 && !CPU_32v6 && !CPU_32v5 && \
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