diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
index b3caad36460c..dca295af0f6e 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
@@ -1600,7 +1600,7 @@ static void hdmi_config_vendor_specific_infoframe(struct dw_hdmi_qp *hdmi,
 	for (i = 0; i <= 7; i++)
 		hdmi_writel(hdmi, 0, PKT_VSI_CONTENTS0 + i * 4);
 
-	if (hdmi->allm_enable && (link_cfg->add_func & SUPPORT_HDMI_ALLM)) {
+	if (hdmi->allm_enable && link_cfg->allm_supported) {
 		buffer[0] = VSI_PKT_TYPE;
 		buffer[1] = VSI_PKT_VERSION;
 		buffer[2] = 5;
@@ -2771,8 +2771,8 @@ static int dw_hdmi_connector_get_modes(struct drm_connector *connector)
 		hdmi->sink_has_audio = drm_detect_monitor_audio(edid);
 		if (hdmi->cec_notifier)
 			cec_notifier_set_phys_addr_from_edid(hdmi->cec_notifier, edid);
-		if (hdmi->plat_data->get_edid_dsc_info)
-			hdmi->plat_data->get_edid_dsc_info(data, edid);
+		if (hdmi->plat_data->get_edid_hdmi21_info)
+			hdmi->plat_data->get_edid_hdmi21_info(data, edid);
 		memcpy(hdmi->vendor_info, &raw_edid[8], VENDOR_INFO_LEN);
 		ret = drm_edid_connector_update(connector, drm_edid);
 		if (hdmi->plat_data->get_dovi_data)
@@ -2805,8 +2805,8 @@ static int dw_hdmi_connector_get_modes(struct drm_connector *connector)
 			if (secondary->cec_notifier)
 				cec_notifier_set_phys_addr_from_edid(secondary->cec_notifier,
 								     edid);
-			if (secondary->plat_data->get_edid_dsc_info)
-				secondary->plat_data->get_edid_dsc_info(secondary_data, edid);
+			if (secondary->plat_data->get_edid_hdmi21_info)
+				secondary->plat_data->get_edid_hdmi21_info(secondary_data, edid);
 		}
 		kfree(edid);
 		kfree(drm_edid);
@@ -2875,7 +2875,7 @@ void dw_hdmi_qp_set_allm_enable(struct dw_hdmi_qp *hdmi, bool enable)
 
 	hdmi->allm_enable = enable;
 
-	if (enable && !(link_cfg->add_func & SUPPORT_HDMI_ALLM)) {
+	if (enable && !link_cfg->allm_supported) {
 		hdmi->allm_enable = false;
 		dev_err(hdmi->dev, "sink don't support allm, allm won't be enabled\n");
 		return;
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
index bfb36748821e..ae7d27beb698 100644
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
@@ -333,14 +333,10 @@ struct rockchip_hdmi {
 	struct rockchip_drm_sub_dev sub_dev;
 
 	u64 force_frl_rate;
-	u8 max_frl_rate_per_lane;
-	u8 max_lanes;
-	u8 add_func;
 	u8 edid_colorimetry;
 	u8 hdcp_status;
 	u8 dovi_vsdb[DOVI_VSDB_LEN];
 	struct hdr10_plus_vsdb hdr10_plus_data;
-	struct rockchip_drm_dsc_cap dsc_cap;
 	struct dw_hdmi_link_config link_cfg;
 	struct gpio_desc *enable_gpio;
 
@@ -353,6 +349,7 @@ struct rockchip_hdmi {
 	struct mode_color_caps *mode_color_caps;
 	bool timing_force_output;
 	struct drm_display_mode force_mode;
+	struct rockchip_drm_hdmi21_data hdmi21_data;
 	u32 force_bus_format;
 	u32 sda_falling_delay_ns;
 };
@@ -1071,14 +1068,14 @@ static void hdmi_select_link_config(struct rockchip_hdmi *hdmi,
 	if (hdmi->plat_data->split_mode || hdmi->plat_data->dual_connector_split)
 		drm_mode_convert_to_origin_mode(&mode);
 
-	max_lanes = hdmi->max_lanes;
-	max_rate_per_lane = hdmi->max_frl_rate_per_lane;
+	max_lanes = hdmi->hdmi21_data.max_lanes;
+	max_rate_per_lane = hdmi->hdmi21_data.max_frl_rate_per_lane;
 	max_frl_rate = max_lanes * max_rate_per_lane * 1000000;
 
 	hdmi->link_cfg.dsc_mode = false;
 	hdmi->link_cfg.frl_lanes = max_lanes;
 	hdmi->link_cfg.rate_per_lane = max_rate_per_lane;
-	hdmi->link_cfg.add_func = hdmi->add_func;
+	hdmi->link_cfg.allm_supported = hdmi->hdmi21_data.allm_supported;
 
 	if (!max_frl_rate || (tmdsclk < HDMI20_MAX_RATE && mode.clock < HDMI20_MAX_RATE)) {
 		dev_dbg(hdmi->dev, "use tmds mode\n");
@@ -1088,12 +1085,12 @@ static void hdmi_select_link_config(struct rockchip_hdmi *hdmi,
 
 	hdmi->link_cfg.frl_mode = true;
 
-	if (!hdmi->dsc_cap.v_1p2)
+	if (!hdmi->hdmi21_data.dsc_cap.v_1p2)
 		return;
 
-	max_dsc_lanes = hdmi->dsc_cap.max_lanes;
+	max_dsc_lanes = hdmi->hdmi21_data.dsc_cap.max_lanes;
 	max_dsc_rate_per_lane =
-		hdmi->dsc_cap.max_frl_rate_per_lane;
+		hdmi->hdmi21_data.dsc_cap.max_frl_rate_per_lane;
 
 	if (rockchip_hdmi_if_dsc_enable(hdmi, tmdsclk)) {
 		hdmi->link_cfg.dsc_mode = true;
@@ -1225,8 +1222,8 @@ static int hdmi_dsc_get_num_slices(struct rockchip_hdmi *hdmi,
 static int hdmi_dsc_slices(struct rockchip_hdmi *hdmi,
 			   struct drm_crtc_state *crtc_state)
 {
-	int hdmi_throughput = hdmi->dsc_cap.clk_per_slice;
-	int hdmi_max_slices = hdmi->dsc_cap.max_slices;
+	int hdmi_throughput = hdmi->hdmi21_data.dsc_cap.clk_per_slice;
+	int hdmi_max_slices = hdmi->hdmi21_data.dsc_cap.max_slices;
 	int rk_max_slices = 8;
 	int rk_max_slice_width = 2048;
 
@@ -1324,9 +1321,9 @@ static int
 dw_hdmi_dsc_bpp(struct rockchip_hdmi *hdmi,
 		int num_slices, int slice_width, u64 pixel_clk)
 {
-	bool hdmi_all_bpp = hdmi->dsc_cap.all_bpp;
+	bool hdmi_all_bpp = hdmi->hdmi21_data.dsc_cap.all_bpp;
 	int fractional_bpp = 0;
-	int hdmi_max_chunk_bytes = hdmi->dsc_cap.total_chunk_kbytes * 1024;
+	int hdmi_max_chunk_bytes = hdmi->hdmi21_data.dsc_cap.total_chunk_kbytes * 1024;
 
 	return hdmi_dsc_get_bpp(hdmi, fractional_bpp, slice_width,
 				num_slices, hdmi_all_bpp,
@@ -1383,7 +1380,7 @@ static void dw_hdmi_qp_dsc_configure(struct rockchip_hdmi *hdmi,
 	if (!crtc_state)
 		return;
 
-	hdmi_is_dsc_1_2 = hdmi->dsc_cap.v_1p2;
+	hdmi_is_dsc_1_2 = hdmi->hdmi21_data.dsc_cap.v_1p2;
 
 	if (!hdmi_is_dsc_1_2)
 		return;
@@ -2959,21 +2956,16 @@ dw_hdmi_rockchip_get_yuv422_format(struct drm_connector *connector,
 }
 
 static int
-dw_hdmi_rockchip_get_edid_dsc_info(void *data, const struct edid *edid)
+dw_hdmi_rockchip_get_edid_hdmi21_info(void *data, const struct edid *edid)
 {
 	struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data;
 
 	if (!edid)
 		return -EINVAL;
 
-	memset(&hdmi->dsc_cap, 0, sizeof(hdmi->dsc_cap));
-	hdmi->max_frl_rate_per_lane = 0;
-	hdmi->max_lanes = 0;
-	hdmi->add_func = 0;
+	memset(&hdmi->hdmi21_data, 0, sizeof(hdmi->hdmi21_data));
 
-	return rockchip_drm_parse_cea_ext(&hdmi->dsc_cap,
-					  &hdmi->max_frl_rate_per_lane,
-					  &hdmi->max_lanes, &hdmi->add_func, edid);
+	return rockchip_drm_parse_cea_ext(&hdmi->hdmi21_data, edid);
 }
 
 static int
@@ -3546,7 +3538,7 @@ dw_hdmi_rockchip_attach_properties(struct drm_connector *connector,
 		if (prop) {
 			hdmi->allm_capacity = prop;
 			drm_object_attach_property(&connector->base, prop,
-						   !!(hdmi->add_func & SUPPORT_HDMI_ALLM));
+						   hdmi->hdmi21_data.allm_supported);
 		}
 
 		prop = drm_property_create_enum(connector->dev, 0,
@@ -3878,7 +3870,7 @@ dw_hdmi_rockchip_get_property(struct drm_connector *connector,
 			*val = dw_hdmi_qp_get_output_type_cap(hdmi->hdmi_qp);
 		return 0;
 	} else if (property == hdmi->allm_capacity) {
-		*val = !!(hdmi->add_func & SUPPORT_HDMI_ALLM);
+		*val = hdmi->hdmi21_data.allm_supported;
 		return 0;
 	} else if (property == hdmi->allm_enable) {
 		*val = hdmi->enable_allm;
@@ -4596,8 +4588,8 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master,
 		dw_hdmi_rockchip_get_color_changed;
 	plat_data->get_yuv422_format =
 		dw_hdmi_rockchip_get_yuv422_format;
-	plat_data->get_edid_dsc_info =
-		dw_hdmi_rockchip_get_edid_dsc_info;
+	plat_data->get_edid_hdmi21_info =
+		dw_hdmi_rockchip_get_edid_hdmi21_info;
 	plat_data->get_dovi_data =
 		dw_hdmi_rockchip_get_dovi_data;
 	plat_data->get_colorimetry =
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
index 7778d8b161d8..f905aa36e19c 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
@@ -892,9 +892,7 @@ void get_max_frl_rate(int max_frl_rate, u8 *max_lanes, u8 *max_rate_per_lane)
 #define EDID_MAX_FRL_RATE_MASK		0xf0
 
 /* Sink Capability Data Structure, for compatibility with linux version < linux kernel 6.1 */
-static void parse_hdmi_forum_scds(struct rockchip_drm_dsc_cap *dsc_cap,
-				  u8 *max_frl_rate_per_lane, u8 *max_lanes,
-				  const u8 *hf_scds)
+static void parse_hdmi_forum_scds(struct rockchip_drm_hdmi21_data *hdmi21_data, const u8 *hf_scds)
 {
 	if (hf_scds[7]) {
 		u8 max_frl_rate;
@@ -903,63 +901,64 @@ static void parse_hdmi_forum_scds(struct rockchip_drm_dsc_cap *dsc_cap,
 
 		DRM_DEBUG_KMS("hdmi_21 sink detected. parsing edid\n");
 		max_frl_rate = (hf_scds[7] & DRM_EDID_MAX_FRL_RATE_MASK) >> 4;
-		get_max_frl_rate(max_frl_rate, max_lanes,
-				 max_frl_rate_per_lane);
-		dsc_cap->v_1p2 = hf_scds[11] & DRM_EDID_DSC_1P2;
+		get_max_frl_rate(max_frl_rate, &hdmi21_data->max_lanes,
+				 &hdmi21_data->max_frl_rate_per_lane);
+		hdmi21_data->dsc_cap.v_1p2 = hf_scds[11] & DRM_EDID_DSC_1P2;
 
-		if (dsc_cap->v_1p2) {
-			dsc_cap->native_420 = hf_scds[11] & DRM_EDID_DSC_NATIVE_420;
-			dsc_cap->all_bpp = hf_scds[11] & DRM_EDID_DSC_ALL_BPP;
+		if (hdmi21_data->dsc_cap.v_1p2) {
+			hdmi21_data->dsc_cap.native_420 = hf_scds[11] & DRM_EDID_DSC_NATIVE_420;
+			hdmi21_data->dsc_cap.all_bpp = hf_scds[11] & DRM_EDID_DSC_ALL_BPP;
 
 			if (hf_scds[11] & DRM_EDID_DSC_16BPC)
-				dsc_cap->bpc_supported = 16;
+				hdmi21_data->dsc_cap.bpc_supported = 16;
 			else if (hf_scds[11] & DRM_EDID_DSC_12BPC)
-				dsc_cap->bpc_supported = 12;
+				hdmi21_data->dsc_cap.bpc_supported = 12;
 			else if (hf_scds[11] & DRM_EDID_DSC_10BPC)
-				dsc_cap->bpc_supported = 10;
+				hdmi21_data->dsc_cap.bpc_supported = 10;
 			else
 				/* Supports min 8 BPC if DSC 1.2 is supported*/
-				dsc_cap->bpc_supported = 8;
+				hdmi21_data->dsc_cap.bpc_supported = 8;
 
 			dsc_max_frl_rate = (hf_scds[12] & DRM_EDID_DSC_MAX_FRL_RATE_MASK) >> 4;
-			get_max_frl_rate(dsc_max_frl_rate, &dsc_cap->max_lanes,
-					 &dsc_cap->max_frl_rate_per_lane);
-			dsc_cap->total_chunk_kbytes = hf_scds[13] & DRM_EDID_DSC_TOTAL_CHUNK_KBYTES;
+			get_max_frl_rate(dsc_max_frl_rate, &hdmi21_data->dsc_cap.max_lanes,
+					 &hdmi21_data->dsc_cap.max_frl_rate_per_lane);
+			hdmi21_data->dsc_cap.total_chunk_kbytes =
+				hf_scds[13] & DRM_EDID_DSC_TOTAL_CHUNK_KBYTES;
 
 			dsc_max_slices = hf_scds[12] & DRM_EDID_DSC_MAX_SLICES;
 			switch (dsc_max_slices) {
 			case 1:
-				dsc_cap->max_slices = 1;
-				dsc_cap->clk_per_slice = 340;
+				hdmi21_data->dsc_cap.max_slices = 1;
+				hdmi21_data->dsc_cap.clk_per_slice = 340;
 				break;
 			case 2:
-				dsc_cap->max_slices = 2;
-				dsc_cap->clk_per_slice = 340;
+				hdmi21_data->dsc_cap.max_slices = 2;
+				hdmi21_data->dsc_cap.clk_per_slice = 340;
 				break;
 			case 3:
-				dsc_cap->max_slices = 4;
-				dsc_cap->clk_per_slice = 340;
+				hdmi21_data->dsc_cap.max_slices = 4;
+				hdmi21_data->dsc_cap.clk_per_slice = 340;
 				break;
 			case 4:
-				dsc_cap->max_slices = 8;
-				dsc_cap->clk_per_slice = 340;
+				hdmi21_data->dsc_cap.max_slices = 8;
+				hdmi21_data->dsc_cap.clk_per_slice = 340;
 				break;
 			case 5:
-				dsc_cap->max_slices = 8;
-				dsc_cap->clk_per_slice = 400;
+				hdmi21_data->dsc_cap.max_slices = 8;
+				hdmi21_data->dsc_cap.clk_per_slice = 400;
 				break;
 			case 6:
-				dsc_cap->max_slices = 12;
-				dsc_cap->clk_per_slice = 400;
+				hdmi21_data->dsc_cap.max_slices = 12;
+				hdmi21_data->dsc_cap.clk_per_slice = 400;
 				break;
 			case 7:
-				dsc_cap->max_slices = 16;
-				dsc_cap->clk_per_slice = 400;
+				hdmi21_data->dsc_cap.max_slices = 16;
+				hdmi21_data->dsc_cap.clk_per_slice = 400;
 				break;
 			case 0:
 			default:
-				dsc_cap->max_slices = 0;
-				dsc_cap->clk_per_slice = 0;
+				hdmi21_data->dsc_cap.max_slices = 0;
+				hdmi21_data->dsc_cap.clk_per_slice = 0;
 			}
 		}
 	}
@@ -977,14 +976,13 @@ int parse_dovi_block(u8 *sink_data, const u8 *dovi_db)
 	return 0;
 }
 
-int rockchip_drm_parse_cea_ext(struct rockchip_drm_dsc_cap *dsc_cap,
-			       u8 *max_frl_rate_per_lane, u8 *max_lanes, u8 *add_func,
+int rockchip_drm_parse_cea_ext(struct rockchip_drm_hdmi21_data *hdmi21_data,
 			       const struct edid *edid)
 {
 	const u8 *edid_ext;
 	int i, start, end;
 
-	if (!dsc_cap || !max_frl_rate_per_lane || !max_lanes || !edid || !add_func)
+	if (!hdmi21_data || !edid)
 		return -EINVAL;
 
 	edid_ext = find_cea_extension(edid);
@@ -998,8 +996,7 @@ int rockchip_drm_parse_cea_ext(struct rockchip_drm_dsc_cap *dsc_cap,
 		const u8 *db = &edid_ext[i];
 
 		if (cea_db_is_hdmi_forum_vsdb(db) || cea_db_is_hdmi_forum_scdb(db))
-			parse_hdmi_forum_scds(dsc_cap, max_frl_rate_per_lane,
-					      max_lanes, db);
+			parse_hdmi_forum_scds(hdmi21_data, db);
 	}
 
 	return 0;
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
index 6a1e131b3f42..986e86139cbd 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
@@ -622,6 +622,13 @@ struct rockchip_encoder {
 	struct drm_encoder encoder;
 };
 
+struct rockchip_drm_hdmi21_data {
+	u8 max_frl_rate_per_lane;
+	u8 max_lanes;
+	bool allm_supported;
+	struct rockchip_drm_dsc_cap dsc_cap;
+};
+
 void rockchip_connector_update_vfp_for_vrr(struct drm_crtc *crtc, struct drm_display_mode *mode,
 					   int vfp);
 int rockchip_drm_dma_attach_device(struct drm_device *drm_dev,
@@ -673,8 +680,7 @@ uint32_t rockchip_drm_get_bpp(const struct drm_format_info *info);
 uint32_t rockchip_drm_get_cycles_per_pixel(uint32_t bus_format);
 int rockchip_drm_get_yuv422_format(struct drm_connector *connector,
 				   const struct edid *edid);
-int rockchip_drm_parse_cea_ext(struct rockchip_drm_dsc_cap *dsc_cap,
-			       u8 *max_frl_rate_per_lane, u8 *max_lanes, u8 *add_func,
+int rockchip_drm_parse_cea_ext(struct rockchip_drm_hdmi21_data *hdmi21_data,
 			       const struct edid *edid);
 int rockchip_drm_parse_dovi(u8 *sink_data, const struct edid *edid);
 int rockchip_drm_parse_colorimetry_data_block(u8 *colorimetry, const struct edid *edid);
diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h
index c674866b5ef8..baf9fab03ff3 100644
--- a/include/drm/bridge/dw_hdmi.h
+++ b/include/drm/bridge/dw_hdmi.h
@@ -139,7 +139,7 @@ struct dw_hdmi_link_config {
 	int frl_lanes;
 	int rate_per_lane;
 	int hcactive;
-	u8 add_func;
+	bool allm_supported;
 	u8 pps_payload[128];
 };
 
@@ -263,7 +263,7 @@ struct dw_hdmi_plat_data {
 	bool (*get_color_changed)(void *data);
 	int (*get_yuv422_format)(struct drm_connector *connector,
 				 const struct edid *edid);
-	int (*get_edid_dsc_info)(void *data, const struct edid *edid);
+	int (*get_edid_hdmi21_info)(void *data, const struct edid *edid);
 	int (*get_next_hdr_data)(void *data, struct edid *edid,
 				 struct drm_connector *connector);
 	int (*get_dovi_data)(void *data, const struct edid *edid,