From 95f651aba2d3759a92645c2070863a7796e7bf4d Mon Sep 17 00:00:00 2001
From: Shunqian Zheng <zhengsq@rock-chips.com>
Date: Tue, 29 May 2018 15:43:34 +0800
Subject: [PATCH] ARM: dts: px3se-evb: disable uart1

Because px3se evb board enables fiq-debugger on uart1,
this disables uart1 and set uart1 iomux in fiq-debugger.

Change-Id: I0432216ee2162699309605c72600ad56a1e6c7b9
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
---
 arch/arm/boot/dts/px3se-evb.dts | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/px3se-evb.dts b/arch/arm/boot/dts/px3se-evb.dts
index 120481842301..fe609cdfed01 100644
--- a/arch/arm/boot/dts/px3se-evb.dts
+++ b/arch/arm/boot/dts/px3se-evb.dts
@@ -84,6 +84,10 @@
 
 	fiq-debugger {
 		compatible = "rockchip,fiq-debugger";
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart1_xfer>;
+
 		rockchip,serial-id = <1>;
 		rockchip,wake-irq = <0>;
 		/* If enable uart uses irq instead of fiq */
@@ -514,7 +518,8 @@
 };
 
 &uart1 {
-	status = "okay";
+	/* disable uart1 explicitly since fiq-debugger is on uart1 */
+	status = "disabled";
 };
 
 &usb_host_ehci {