From 97811627ff0b4de80909a82cab562e16cbaf9d74 Mon Sep 17 00:00:00 2001 From: Algea Cao Date: Wed, 15 Feb 2023 11:31:04 +0800 Subject: [PATCH] phy: rockchip-samsung-hdptx-hdmi: Reduce ROPLL loop bandwidth 24M clock noise is carried into the PHY ROPLL loop filter. Due to the low noise frequency, it can pass through the low-pass loop filter of ROPLL, resulting in hdmi flash. Reduce ROPLL loop bandwidth can solve this problem. Signed-off-by: Algea Cao Change-Id: Ibea774bc26ea8c2b06cf79c84b6cd6456df66ea5 --- drivers/phy/rockchip/phy-rockchip-samsung-hdptx-hdmi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx-hdmi.c b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx-hdmi.c index aeb6bcf02102..c5095ff4f077 100644 --- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx-hdmi.c +++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx-hdmi.c @@ -1269,9 +1269,9 @@ static int hdptx_ropll_cmn_config(struct rockchip_hdptx_phy *hdptx, unsigned lon hdptx_write(hdptx, CMN_REG0043, 0x00); hdptx_write(hdptx, CMN_REG0044, 0x46); hdptx_write(hdptx, CMN_REG0045, 0x24); - hdptx_write(hdptx, CMN_REG0046, 0xff); + hdptx_write(hdptx, CMN_REG0046, 0xdd); hdptx_write(hdptx, CMN_REG0047, 0x00); - hdptx_write(hdptx, CMN_REG0048, 0x44); + hdptx_write(hdptx, CMN_REG0048, 0x11); hdptx_write(hdptx, CMN_REG0049, 0xfa); hdptx_write(hdptx, CMN_REG004A, 0x08); hdptx_write(hdptx, CMN_REG004B, 0x00);