From 97bf3e44dfad4b11c744031fbb310fd361e6dc71 Mon Sep 17 00:00:00 2001 From: Damon Ding Date: Tue, 11 Jun 2024 09:44:36 +0800 Subject: [PATCH] arm64: dts: rockchip: rk3576: fix apb clk to PCLK_HDPTX_APB for edp The parent clock of PCLK_HDPTX_APB is PCLK_PMUPHY_ROOT, which must be always on. In order to reduce power consumption, replace apb clock PCLK_PMUPHY_ROOT by controllable PCLK_HDPTX_APB in suspending and resuming. Change-Id: I1103b9bf542bacfd021de9a2553265fd6960e6d5 Signed-off-by: Damon Ding --- arch/arm64/boot/dts/rockchip/rk3576.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts/rockchip/rk3576.dtsi index 10fbfbeb5639..850d5fed2f70 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi @@ -5186,7 +5186,7 @@ hdptxphy: phy@2b000000 { compatible = "rockchip,rk3576-hdptx-phy", "rockchip,rk3588-hdptx-phy"; reg = <0x0 0x2b000000 0x0 0x2000>; - clocks = <&cru CLK_PHY_REF_SRC>, <&cru PCLK_PMUPHY_ROOT>; + clocks = <&cru CLK_PHY_REF_SRC>, <&cru PCLK_HDPTX_APB>; clock-names = "ref", "apb"; resets = <&cru SRST_P_HDPTX_APB>, <&cru SRST_HDPTX_INIT>, <&cru SRST_HDPTX_CMN>, <&cru SRST_HDPTX_LANE>;