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Revert "ANDROID: KVM: arm64: pkvm: Rework sysreg entry/exit handling"

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This reverts commit 103321bfc5.

Bug: 233587962
Signed-off-by: Will Deacon <willdeacon@google.com>
Change-Id: Ic7aa0f1cc86922e56361851e22b049d0b5fec751
This commit is contained in:
Will Deacon
2022-07-07 15:51:35 +01:00
parent 0f296c1c24
commit 98f15f3ecb
1 changed files with 11 additions and 32 deletions
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43
arch/arm64/kvm/hyp/nvhe/hyp-main.c
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@@ -23,8 +23,6 @@
#include <linux/irqchip/arm-gic-v3.h>
#include <uapi/linux/psci.h>
#include "../../sys_regs.h"
DEFINE_PER_CPU(struct kvm_nvhe_init_params, kvm_init_params);
struct kvm_iommu_ops kvm_iommu_ops;
@@ -46,33 +44,18 @@ static void handle_pvm_entry_hvc64(struct kvm_vcpu *host_vcpu, struct kvm_vcpu *
static void handle_pvm_entry_sys64(struct kvm_vcpu *host_vcpu, struct kvm_vcpu *shadow_vcpu)
{
unsigned long host_flags;
u32 esr_el2 = shadow_vcpu->arch.fault.esr_el2;
bool is_read = (esr_el2 & ESR_ELx_SYS64_ISS_DIR_MASK) == ESR_ELx_SYS64_ISS_DIR_READ;
host_flags = READ_ONCE(host_vcpu->arch.flags);
shadow_vcpu->arch.flags |= host_vcpu->arch.flags &
(KVM_ARM64_PENDING_EXCEPTION | KVM_ARM64_INCREMENT_PC);
/* Exceptions have priority on anything else */
if (host_flags & KVM_ARM64_PENDING_EXCEPTION) {
if (shadow_vcpu->arch.flags & KVM_ARM64_PENDING_EXCEPTION) {
/* Exceptions caused by this should be undef exceptions. */
u32 esr = (ESR_ELx_EC_UNKNOWN << ESR_ELx_EC_SHIFT);
u32 esr_el1 = (ESR_ELx_EC_UNKNOWN << ESR_ELx_EC_SHIFT);
__vcpu_sys_reg(shadow_vcpu, ESR_EL1) = esr;
shadow_vcpu->arch.flags &= ~(KVM_ARM64_PENDING_EXCEPTION |
KVM_ARM64_EXCEPT_MASK);
shadow_vcpu->arch.flags |= (KVM_ARM64_PENDING_EXCEPTION |
KVM_ARM64_EXCEPT_AA64_ELx_SYNC |
KVM_ARM64_EXCEPT_AA64_EL1);
return;
}
if (host_flags & KVM_ARM64_INCREMENT_PC) {
shadow_vcpu->arch.flags &= ~(KVM_ARM64_PENDING_EXCEPTION |
KVM_ARM64_EXCEPT_MASK);
shadow_vcpu->arch.flags |= KVM_ARM64_INCREMENT_PC;
}
if (!esr_sys64_to_params(shadow_vcpu->arch.fault.esr_el2).is_write) {
__vcpu_sys_reg(shadow_vcpu, ESR_EL1) = esr_el1;
} else if (is_read) {
/* r0 as transfer register between the guest and the host. */
u64 rt_val = vcpu_get_reg(host_vcpu, 0);
int rt = kvm_vcpu_sys_get_rt(shadow_vcpu);
@@ -128,16 +111,12 @@ static void handle_pvm_exit_wfx(struct kvm_vcpu *host_vcpu, struct kvm_vcpu *sha
static void handle_pvm_exit_sys64(struct kvm_vcpu *host_vcpu, struct kvm_vcpu *shadow_vcpu)
{
u32 esr_el2 = shadow_vcpu->arch.fault.esr_el2;
bool is_write = (esr_el2 & ESR_ELx_SYS64_ISS_DIR_MASK) == ESR_ELx_SYS64_ISS_DIR_WRITE;
/* r0 as transfer register between the guest and the host. */
WRITE_ONCE(host_vcpu->arch.fault.esr_el2,
esr_el2 & ~ESR_ELx_SYS64_ISS_RT_MASK);
host_vcpu->arch.fault.esr_el2 = esr_el2 & ~ESR_ELx_SYS64_ISS_RT_MASK;
/* The mode is required for the host to emulate some sysregs */
WRITE_ONCE(host_vcpu->arch.ctxt.regs.pstate,
shadow_vcpu->arch.ctxt.regs.pstate & PSR_MODE_MASK);
if (esr_sys64_to_params(esr_el2).is_write) {
if (is_write) {
int rt = kvm_vcpu_sys_get_rt(shadow_vcpu);
u64 rt_val = vcpu_get_reg(shadow_vcpu, rt);