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Merge 6.1.88 into android14-6.1-lts

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Changes in 6.1.88
	drm/vmwgfx: Enable DMA mappings with SEV
	drm/amdgpu: fix incorrect active rb bitmap for gfx11
	drm/amdgpu: fix incorrect number of active RBs for gfx11
	drm/amd/display: Do not recursively call manual trigger programming
	io_uring: Fix io_cqring_wait() not restoring sigmask on get_timespec64() failure
	SUNRPC: Fix rpcgss_context trace event acceptor field
	selftests/ftrace: Limit length in subsystem-enable tests
	random: handle creditable entropy from atomic process context
	net: usb: ax88179_178a: avoid writing the mac address before first reading
	drm/i915/vma: Fix UAF on destroy against retire race
	x86/efi: Drop EFI stub .bss from .data section
	x86/efi: Disregard setup header of loaded image
	x86/efistub: Reinstate soft limit for initrd loading
	x86/efi: Drop alignment flags from PE section headers
	x86/boot: Remove the 'bugger off' message
	x86/boot: Omit compression buffer from PE/COFF image memory footprint
	x86/boot: Drop redundant code setting the root device
	x86/boot: Drop references to startup_64
	x86/boot: Grab kernel_info offset from zoffset header directly
	x86/boot: Set EFI handover offset directly in header asm
	x86/boot: Define setup size in linker script
	x86/boot: Derive file size from _edata symbol
	x86/boot: Construct PE/COFF .text section from assembler
	x86/boot: Drop PE/COFF .reloc section
	x86/boot: Split off PE/COFF .data section
	x86/boot: Increase section and file alignment to 4k/512
	x86/efistub: Use 1:1 file:memory mapping for PE/COFF .compat section
	x86/mm: Remove P*D_PAGE_MASK and P*D_PAGE_SIZE macros
	x86/head/64: Add missing __head annotation to startup_64_load_idt()
	x86/head/64: Move the __head definition to <asm/init.h>
	x86/sme: Move early SME kernel encryption handling into .head.text
	x86/sev: Move early startup code into .head.text section
	x86/efistub: Remap kernel text read-only before dropping NX attribute
	netfilter: nf_tables: Fix potential data-race in __nft_expr_type_get()
	netfilter: nf_tables: Fix potential data-race in __nft_obj_type_get()
	netfilter: br_netfilter: skip conntrack input hook for promisc packets
	netfilter: nft_set_pipapo: do not free live element
	netfilter: flowtable: validate pppoe header
	netfilter: flowtable: incorrect pppoe tuple
	af_unix: Call manage_oob() for every skb in unix_stream_read_generic().
	af_unix: Don't peek OOB data without MSG_OOB.
	net/mlx5: Lag, restore buckets number to default after hash LAG deactivation
	net/mlx5e: Prevent deadlock while disabling aRFS
	ice: tc: allow zero flags in parsing tc flower
	tun: limit printing rate when illegal packet received by tun dev
	net: dsa: mt7530: fix mirroring frames received on local port
	net: ethernet: ti: am65-cpsw-nuss: cleanup DMA Channels before using them
	RDMA/rxe: Fix the problem "mutex_destroy missing"
	RDMA/cm: Print the old state when cm_destroy_id gets timeout
	RDMA/mlx5: Fix port number for counter query in multi-port configuration
	s390/qdio: handle deferred cc1
	s390/cio: fix race condition during online processing
	drm: nv04: Fix out of bounds access
	drm/panel: visionox-rm69299: don't unregister DSI device
	ARM: omap2: n8x0: stop instantiating codec platform data
	PCI: Avoid FLR for SolidRun SNET DPU rev 1
	HID: kye: Sort kye devices
	usb: pci-quirks: Reduce the length of a spinlock section in usb_amd_find_chipset_info()
	PCI: Delay after FLR of Solidigm P44 Pro NVMe
	x86/quirks: Include linux/pnp.h for arch_pnpbios_disabled()
	thunderbolt: Log function name of the called quirk
	thunderbolt: Add debug log for link controller power quirk
	PCI: Execute quirk_enable_clear_retrain_link() earlier
	PCI: switchtec: Use normal comment style
	PCI: switchtec: Add support for PCIe Gen5 devices
	ALSA: scarlett2: Move USB IDs out from device_info struct
	ALSA: scarlett2: Add support for Clarett 8Pre USB
	ASoC: ti: Convert Pandora ASoC to GPIO descriptors
	ALSA: scarlett2: Default mixer driver to enabled
	ALSA: scarlett2: Add correct product series name to messages
	ALSA: scarlett2: Add Focusrite Clarett+ 2Pre and 4Pre support
	ALSA: scarlett2: Add Focusrite Clarett 2Pre and 4Pre USB support
	PCI/DPC: Use FIELD_GET()
	PCI: Simplify pcie_capability_clear_and_set_word() to ..._clear_word()
	ALSA: scarlett2: Rename scarlett_gen2 to scarlett2
	drm: panel-orientation-quirks: Add quirk for Lenovo Legion Go
	usb: xhci: Add timeout argument in address_device USB HCD callback
	usb: new quirk to reduce the SET_ADDRESS request timeout
	clk: Remove prepare_lock hold assertion in __clk_release()
	clk: Print an info line before disabling unused clocks
	clk: Initialize struct clk_core kref earlier
	clk: Get runtime PM before walking tree during disable_unused
	clk: remove unnecessary (void*) conversions
	clk: Show active consumers of clocks in debugfs
	clk: Get runtime PM before walking tree for clk_summary
	clk: mediatek: mt8192: Correctly unregister and free clocks on failure
	clk: mediatek: mt8192: Propagate struct device for gate clocks
	clk: mediatek: clk-gate: Propagate struct device with mtk_clk_register_gates()
	clk: mediatek: clk-mtk: Propagate struct device for composites
	clk: mediatek: clk-mux: Propagate struct device for mtk-mux
	clk: mediatek: clk-mtk: Extend mtk_clk_simple_probe()
	clk: mediatek: Do a runtime PM get on controllers during probe
	x86/bugs: Fix BHI retpoline check
	x86/cpufeatures: Fix dependencies for GFNI, VAES, and VPCLMULQDQ
	ALSA: hda/realtek - Enable audio jacks of Haier Boyue G42 with ALC269VC
	binder: check offset alignment in binder_get_object()
	thunderbolt: Avoid notify PM core about runtime PM resume
	thunderbolt: Fix wake configurations after device unplug
	comedi: vmk80xx: fix incomplete endpoint checking
	serial: mxs-auart: add spinlock around changing cts state
	serial/pmac_zilog: Remove flawed mitigation for rx irq flood
	serial: stm32: Return IRQ_NONE in the ISR if no handling happend
	serial: stm32: Reset .throttled state in .startup()
	USB: serial: option: add Fibocom FM135-GL variants
	USB: serial: option: add support for Fibocom FM650/FG650
	USB: serial: option: add Lonsung U8300/U9300 product
	USB: serial: option: support Quectel EM060K sub-models
	USB: serial: option: add Rolling RW101-GL and RW135-GL support
	USB: serial: option: add Telit FN920C04 rmnet compositions
	Revert "usb: cdc-wdm: close race between read and workqueue"
	usb: dwc2: host: Fix dereference issue in DDMA completion flow.
	usb: Disable USB3 LPM at shutdown
	usb: gadget: f_ncm: Fix UAF ncm object at re-bind after usb ep transport error
	mei: me: disable RPL-S on SPS and IGN firmwares
	speakup: Avoid crash on very long word
	fs: sysfs: Fix reference leak in sysfs_break_active_protection()
	KVM: x86: Snapshot if a vCPU's vendor model is AMD vs. Intel compatible
	KVM: x86/pmu: Disable support for adaptive PEBS
	KVM: x86/pmu: Do not mask LVTPC when handling a PMI on AMD platforms
	arm64: hibernate: Fix level3 translation fault in swsusp_save()
	init/main.c: Fix potential static_command_line memory overflow
	mm/memory-failure: fix deadlock when hugetlb_optimize_vmemmap is enabled
	drm/amdgpu: validate the parameters of bo mapping operations more clearly
	drm/vmwgfx: Sort primary plane formats by order of preference
	drm/vmwgfx: Fix crtc's atomic check conditional
	nouveau: fix instmem race condition around ptr stores
	bootconfig: use memblock_free_late to free xbc memory to buddy
	nilfs2: fix OOB in nilfs_set_de_type
	net: dsa: mt7530: set all CPU ports in MT7531_CPU_PMAP
	net: dsa: introduce preferred_default_local_cpu_port and use on MT7530
	net: dsa: mt7530: fix improper frames on all 25MHz and 40MHz XTAL MT7530
	net: dsa: mt7530: fix enabling EEE on MT7531 switch on all boards
	ksmbd: fix slab-out-of-bounds in smb2_allocate_rsp_buf
	ksmbd: validate request buffer size in smb2_allocate_rsp_buf()
	ksmbd: clear RENAME_NOREPLACE before calling vfs_rename
	ksmbd: common: use struct_group_attr instead of struct_group for network_open_info
	PCI/ASPM: Fix deadlock when enabling ASPM
	Linux 6.1.88

Change-Id: If2755c815fcd2d20cb858a547d2698b8dffe9016
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
Greg Kroah-Hartman
2024-05-23 16:54:15 +00:00
parent af0a15ff84 f2295faba5
commit 992f4a2013
195 changed files with 2064 additions and 1423 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
Documentation/admin-guide/kernel-parameters.txt
View File

@@ -6671,6 +6671,9 @@
pause after every control message); pause after every control message);
o = USB_QUIRK_HUB_SLOW_RESET (Hub needs extra o = USB_QUIRK_HUB_SLOW_RESET (Hub needs extra
delay after resetting its port); delay after resetting its port);
p = USB_QUIRK_SHORT_SET_ADDRESS_REQ_TIMEOUT
(Reduce timeout of the SET_ADDRESS
request from 5000 ms to 500 ms);
Example: quirks=0781:5580:bk,0a5c:5834:gij Example: quirks=0781:5580:bk,0a5c:5834:gij
usbhid.mousepoll= usbhid.mousepoll=

2
MAINTAINERS
View File

@@ -8040,7 +8040,7 @@ M: Geoffrey D. Bennett <g@b4.vu>
L: alsa-devel@alsa-project.org (moderated for non-subscribers) L: alsa-devel@alsa-project.org (moderated for non-subscribers)
S: Maintained S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound.git T: git git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound.git
F: sound/usb/mixer_scarlett_gen2.c F: sound/usb/mixer_scarlett2.c
FORCEDETH GIGABIT ETHERNET DRIVER FORCEDETH GIGABIT ETHERNET DRIVER
M: Rain River <rain.1986.08.12@gmail.com> M: Rain River <rain.1986.08.12@gmail.com>

2
Makefile
View File

@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0 # SPDX-License-Identifier: GPL-2.0
VERSION = 6 VERSION = 6
PATCHLEVEL = 1 PATCHLEVEL = 1
SUBLEVEL = 87 SUBLEVEL = 88
EXTRAVERSION = EXTRAVERSION =
NAME = Curry Ramen NAME = Curry Ramen

5
arch/arm/mach-omap2/board-n8x0.c
View File

@@ -22,7 +22,6 @@
#include <linux/platform_data/spi-omap2-mcspi.h> #include <linux/platform_data/spi-omap2-mcspi.h>
#include <linux/platform_data/mmc-omap.h> #include <linux/platform_data/mmc-omap.h>
#include <linux/mfd/menelaus.h> #include <linux/mfd/menelaus.h>
#include <sound/tlv320aic3x.h>
#include <asm/mach/arch.h> #include <asm/mach/arch.h>
#include <asm/mach-types.h> #include <asm/mach-types.h>
@@ -567,10 +566,6 @@ struct menelaus_platform_data n8x0_menelaus_platform_data = {
.late_init = n8x0_menelaus_late_init, .late_init = n8x0_menelaus_late_init,
}; };
struct aic3x_pdata n810_aic33_data = {
.gpio_reset = 118,
};
static int __init n8x0_late_initcall(void) static int __init n8x0_late_initcall(void)
{ {
if (!board_caps) if (!board_caps)

2
arch/arm/mach-omap2/common-board-devices.h
View File

@@ -2,12 +2,10 @@
#ifndef __OMAP_COMMON_BOARD_DEVICES__ #ifndef __OMAP_COMMON_BOARD_DEVICES__
#define __OMAP_COMMON_BOARD_DEVICES__ #define __OMAP_COMMON_BOARD_DEVICES__
#include <sound/tlv320aic3x.h>
#include <linux/mfd/menelaus.h> #include <linux/mfd/menelaus.h>
void *n8x0_legacy_init(void); void *n8x0_legacy_init(void);
extern struct menelaus_platform_data n8x0_menelaus_platform_data; extern struct menelaus_platform_data n8x0_menelaus_platform_data;
extern struct aic3x_pdata n810_aic33_data;
#endif /* __OMAP_COMMON_BOARD_DEVICES__ */ #endif /* __OMAP_COMMON_BOARD_DEVICES__ */

11
arch/arm/mach-omap2/pdata-quirks.c
View File

@@ -257,9 +257,19 @@ static struct platform_device pandora_backlight = {
.id = -1, .id = -1,
}; };
static struct gpiod_lookup_table pandora_soc_audio_gpios = {
.dev_id = "soc-audio",
.table = {
GPIO_LOOKUP("gpio-112-127", 6, "dac", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("gpio-0-15", 14, "amp", GPIO_ACTIVE_HIGH),
{ }
},
};
static void __init omap3_pandora_legacy_init(void) static void __init omap3_pandora_legacy_init(void)
{ {
platform_device_register(&pandora_backlight); platform_device_register(&pandora_backlight);
gpiod_add_lookup_table(&pandora_soc_audio_gpios);
} }
#endif /* CONFIG_ARCH_OMAP3 */ #endif /* CONFIG_ARCH_OMAP3 */
@@ -440,7 +450,6 @@ static struct of_dev_auxdata omap_auxdata_lookup[] = {
#ifdef CONFIG_MACH_NOKIA_N8X0 #ifdef CONFIG_MACH_NOKIA_N8X0
OF_DEV_AUXDATA("ti,omap2420-mmc", 0x4809c000, "mmci-omap.0", NULL), OF_DEV_AUXDATA("ti,omap2420-mmc", 0x4809c000, "mmci-omap.0", NULL),
OF_DEV_AUXDATA("menelaus", 0x72, "1-0072", &n8x0_menelaus_platform_data), OF_DEV_AUXDATA("menelaus", 0x72, "1-0072", &n8x0_menelaus_platform_data),
OF_DEV_AUXDATA("tlv320aic3x", 0x18, "2-0018", &n810_aic33_data),
#endif #endif
#ifdef CONFIG_ARCH_OMAP3 #ifdef CONFIG_ARCH_OMAP3
OF_DEV_AUXDATA("ti,omap2-iommu", 0x5d000000, "5d000000.mmu", OF_DEV_AUXDATA("ti,omap2-iommu", 0x5d000000, "5d000000.mmu",

3
arch/arm64/mm/pageattr.c
View File

@@ -237,9 +237,6 @@ bool kernel_page_present(struct page *page)
pte_t *ptep; pte_t *ptep;
unsigned long addr = (unsigned long)page_address(page); unsigned long addr = (unsigned long)page_address(page);
if (!can_set_direct_map())
return true;
pgdp = pgd_offset_k(addr); pgdp = pgd_offset_k(addr);
if (pgd_none(READ_ONCE(*pgdp))) if (pgd_none(READ_ONCE(*pgdp)))
return false; return false;

2
arch/x86/boot/Makefile
View File

@@ -91,7 +91,7 @@ $(obj)/vmlinux.bin: $(obj)/compressed/vmlinux FORCE
SETUP_OBJS = $(addprefix $(obj)/,$(setup-y)) SETUP_OBJS = $(addprefix $(obj)/,$(setup-y))
sed-zoffset := -e 's/^\([0-9a-fA-F]*\) [a-zA-Z] \(startup_32\|startup_64\|efi32_stub_entry\|efi64_stub_entry\|efi_pe_entry\|efi32_pe_entry\|input_data\|kernel_info\|_end\|_ehead\|_text\|z_.*\)$$/\#define ZO_\2 0x\1/p' sed-zoffset := -e 's/^\([0-9a-fA-F]*\) [a-zA-Z] \(startup_32\|efi.._stub_entry\|efi\(32\)\?_pe_entry\|input_data\|kernel_info\|_end\|_ehead\|_text\|_e\?data\|z_.*\)$$/\#define ZO_\2 0x\1/p'
quiet_cmd_zoffset = ZOFFSET $@ quiet_cmd_zoffset = ZOFFSET $@
cmd_zoffset = $(NM) $< | sed -n $(sed-zoffset) > $@ cmd_zoffset = $(NM) $< | sed -n $(sed-zoffset) > $@

2
arch/x86/boot/compressed/Makefile
View File

@@ -84,7 +84,7 @@ LDFLAGS_vmlinux += -T
hostprogs := mkpiggy hostprogs := mkpiggy
HOST_EXTRACFLAGS += -I$(srctree)/tools/include HOST_EXTRACFLAGS += -I$(srctree)/tools/include
sed-voffset := -e 's/^\([0-9a-fA-F]*\) [ABCDGRSTVW] \(_text\|__bss_start\|_end\)$$/\#define VO_\2 _AC(0x\1,UL)/p' sed-voffset := -e 's/^\([0-9a-fA-F]*\) [ABCDGRSTVW] \(_text\|__start_rodata\|__bss_start\|_end\)$$/\#define VO_\2 _AC(0x\1,UL)/p'
quiet_cmd_voffset = VOFFSET $@ quiet_cmd_voffset = VOFFSET $@
cmd_voffset = $(NM) $< | sed -n $(sed-voffset) > $@ cmd_voffset = $(NM) $< | sed -n $(sed-voffset) > $@

1
arch/x86/boot/compressed/misc.c
View File

@@ -330,6 +330,7 @@ static size_t parse_elf(void *output)
return ehdr.e_entry - LOAD_PHYSICAL_ADDR; return ehdr.e_entry - LOAD_PHYSICAL_ADDR;
} }
const unsigned long kernel_text_size = VO___start_rodata - VO__text;
const unsigned long kernel_total_size = VO__end - VO__text; const unsigned long kernel_total_size = VO__end - VO__text;
static u8 boot_heap[BOOT_HEAP_SIZE] __aligned(4); static u8 boot_heap[BOOT_HEAP_SIZE] __aligned(4);

3
arch/x86/boot/compressed/sev.c
View File

@@ -118,6 +118,9 @@ static bool fault_in_kernel_space(unsigned long address)
#define __init #define __init
#define __pa(x) ((unsigned long)(x)) #define __pa(x) ((unsigned long)(x))
#undef __head
#define __head
#define __BOOT_COMPRESSED #define __BOOT_COMPRESSED
/* Basic instruction decoding support needed */ /* Basic instruction decoding support needed */

6
arch/x86/boot/compressed/vmlinux.lds.S
View File

@@ -42,11 +42,13 @@ SECTIONS
*(.rodata.*) *(.rodata.*)
_erodata = . ; _erodata = . ;
} }
.data : { .data : ALIGN(0x1000) {
_data = . ; _data = . ;
*(.data) *(.data)
*(.data.*) *(.data.*)
*(.bss.efistub)
/* Add 4 bytes of extra space for a CRC-32 checksum */
. = ALIGN(. + 4, 0x200);
_edata = . ; _edata = . ;
} }
. = ALIGN(L1_CACHE_BYTES); . = ALIGN(L1_CACHE_BYTES);

211
arch/x86/boot/header.S
View File

@@ -36,65 +36,19 @@ SYSSEG = 0x1000 /* historical load address >> 4 */
#define ROOT_RDONLY 1 #define ROOT_RDONLY 1
#endif #endif
.set salign, 0x1000
.set falign, 0x200
.code16 .code16
.section ".bstext", "ax" .section ".bstext", "ax"
.global bootsect_start
bootsect_start:
#ifdef CONFIG_EFI_STUB #ifdef CONFIG_EFI_STUB
# "MZ", MS-DOS header # "MZ", MS-DOS header
.word MZ_MAGIC .word MZ_MAGIC
#endif
# Normalize the start address
ljmp $BOOTSEG, $start2
start2:
movw %cs, %ax
movw %ax, %ds
movw %ax, %es
movw %ax, %ss
xorw %sp, %sp
sti
cld
movw $bugger_off_msg, %si
msg_loop:
lodsb
andb %al, %al
jz bs_die
movb $0xe, %ah
movw $7, %bx
int $0x10
jmp msg_loop
bs_die:
# Allow the user to press a key, then reboot
xorw %ax, %ax
int $0x16
int $0x19
# int 0x19 should never return. In case it does anyway,
# invoke the BIOS reset code...
ljmp $0xf000,$0xfff0
#ifdef CONFIG_EFI_STUB
.org 0x3c .org 0x3c
# #
# Offset to the PE header. # Offset to the PE header.
# #
.long pe_header .long pe_header
#endif /* CONFIG_EFI_STUB */
.section ".bsdata", "a"
bugger_off_msg:
.ascii "Use a boot loader.\r\n"
.ascii "\n"
.ascii "Remove disk and press any key to reboot...\r\n"
.byte 0
#ifdef CONFIG_EFI_STUB
pe_header: pe_header:
.long PE_MAGIC .long PE_MAGIC
@@ -123,30 +77,26 @@ optional_header:
.byte 0x02 # MajorLinkerVersion .byte 0x02 # MajorLinkerVersion
.byte 0x14 # MinorLinkerVersion .byte 0x14 # MinorLinkerVersion
# Filled in by build.c .long ZO__data # SizeOfCode
.long 0 # SizeOfCode
.long 0 # SizeOfInitializedData .long ZO__end - ZO__data # SizeOfInitializedData
.long 0 # SizeOfUninitializedData .long 0 # SizeOfUninitializedData
# Filled in by build.c .long setup_size + ZO_efi_pe_entry # AddressOfEntryPoint
.long 0x0000 # AddressOfEntryPoint
.long 0x0200 # BaseOfCode .long setup_size # BaseOfCode
#ifdef CONFIG_X86_32 #ifdef CONFIG_X86_32
.long 0 # data .long 0 # data
#endif #endif
extra_header_fields: extra_header_fields:
# PE specification requires ImageBase to be 64k aligned
.set image_base, (LOAD_PHYSICAL_ADDR + 0xffff) & ~0xffff
#ifdef CONFIG_X86_32 #ifdef CONFIG_X86_32
.long image_base # ImageBase .long 0 # ImageBase
#else #else
.quad image_base # ImageBase .quad 0 # ImageBase
#endif #endif
.long 0x20 # SectionAlignment .long salign # SectionAlignment
.long 0x20 # FileAlignment .long falign # FileAlignment
.word 0 # MajorOperatingSystemVersion .word 0 # MajorOperatingSystemVersion
.word 0 # MinorOperatingSystemVersion .word 0 # MinorOperatingSystemVersion
.word LINUX_EFISTUB_MAJOR_VERSION # MajorImageVersion .word LINUX_EFISTUB_MAJOR_VERSION # MajorImageVersion
@@ -155,12 +105,9 @@ extra_header_fields:
.word 0 # MinorSubsystemVersion .word 0 # MinorSubsystemVersion
.long 0 # Win32VersionValue .long 0 # Win32VersionValue
# .long setup_size + ZO__end # SizeOfImage
# The size of the bzImage is written in tools/build.c
#
.long 0 # SizeOfImage
.long 0x200 # SizeOfHeaders .long salign # SizeOfHeaders
.long 0 # CheckSum .long 0 # CheckSum
.word IMAGE_SUBSYSTEM_EFI_APPLICATION # Subsystem (EFI application) .word IMAGE_SUBSYSTEM_EFI_APPLICATION # Subsystem (EFI application)
#ifdef CONFIG_EFI_DXE_MEM_ATTRIBUTES #ifdef CONFIG_EFI_DXE_MEM_ATTRIBUTES
@@ -191,87 +138,77 @@ extra_header_fields:
# Section table # Section table
section_table: section_table:
#
# The offset & size fields are filled in by build.c.
#
.ascii ".setup" .ascii ".setup"
.byte 0 .byte 0
.byte 0 .byte 0
.long 0 .long pecompat_fstart - salign # VirtualSize
.long 0x0 # startup_{32,64} .long salign # VirtualAddress
.long 0 # Size of initialized data .long pecompat_fstart - salign # SizeOfRawData
# on disk .long salign # PointerToRawData
.long 0x0 # startup_{32,64}
.long 0 # PointerToRelocations
.long 0 # PointerToLineNumbers
.word 0 # NumberOfRelocations
.word 0 # NumberOfLineNumbers
.long IMAGE_SCN_CNT_CODE | \
IMAGE_SCN_MEM_READ | \
IMAGE_SCN_MEM_EXECUTE | \
IMAGE_SCN_ALIGN_16BYTES # Characteristics
# .long 0, 0, 0
# The EFI application loader requires a relocation section
# because EFI applications must be relocatable. The .reloc
# offset & size fields are filled in by build.c.
#
.ascii ".reloc"
.byte 0
.byte 0
.long 0
.long 0
.long 0 # SizeOfRawData
.long 0 # PointerToRawData
.long 0 # PointerToRelocations
.long 0 # PointerToLineNumbers
.word 0 # NumberOfRelocations
.word 0 # NumberOfLineNumbers
.long IMAGE_SCN_CNT_INITIALIZED_DATA | \ .long IMAGE_SCN_CNT_INITIALIZED_DATA | \
IMAGE_SCN_MEM_READ | \ IMAGE_SCN_MEM_READ | \
IMAGE_SCN_MEM_DISCARDABLE | \ IMAGE_SCN_MEM_DISCARDABLE # Characteristics
IMAGE_SCN_ALIGN_1BYTES # Characteristics
#ifdef CONFIG_EFI_MIXED #ifdef CONFIG_EFI_MIXED
#
# The offset & size fields are filled in by build.c.
#
.asciz ".compat" .asciz ".compat"
.long 0
.long 0x0 .long pecompat_fsize # VirtualSize
.long 0 # Size of initialized data .long pecompat_fstart # VirtualAddress
# on disk .long pecompat_fsize # SizeOfRawData
.long 0x0 .long pecompat_fstart # PointerToRawData
.long 0 # PointerToRelocations
.long 0 # PointerToLineNumbers .long 0, 0, 0
.word 0 # NumberOfRelocations
.word 0 # NumberOfLineNumbers
.long IMAGE_SCN_CNT_INITIALIZED_DATA | \ .long IMAGE_SCN_CNT_INITIALIZED_DATA | \
IMAGE_SCN_MEM_READ | \ IMAGE_SCN_MEM_READ | \
IMAGE_SCN_MEM_DISCARDABLE | \ IMAGE_SCN_MEM_DISCARDABLE # Characteristics
IMAGE_SCN_ALIGN_1BYTES # Characteristics
#endif
# /*
# The offset & size fields are filled in by build.c. * Put the IA-32 machine type and the associated entry point address in
# * the .compat section, so loaders can figure out which other execution
* modes this image supports.
*/
.pushsection ".pecompat", "a", @progbits
.balign salign
.globl pecompat_fstart
pecompat_fstart:
.byte 0x1 # Version
.byte 8 # Size
.word IMAGE_FILE_MACHINE_I386 # PE machine type
.long setup_size + ZO_efi32_pe_entry # Entrypoint
.byte 0x0 # Sentinel
.popsection
#else
.set pecompat_fstart, setup_size
#endif
.ascii ".text" .ascii ".text"
.byte 0 .byte 0
.byte 0 .byte 0
.byte 0 .byte 0
.long 0 .long ZO__data
.long 0x0 # startup_{32,64} .long setup_size
.long 0 # Size of initialized data .long ZO__data # Size of initialized data
# on disk # on disk
.long 0x0 # startup_{32,64} .long setup_size
.long 0 # PointerToRelocations .long 0 # PointerToRelocations
.long 0 # PointerToLineNumbers .long 0 # PointerToLineNumbers
.word 0 # NumberOfRelocations .word 0 # NumberOfRelocations
.word 0 # NumberOfLineNumbers .word 0 # NumberOfLineNumbers
.long IMAGE_SCN_CNT_CODE | \ .long IMAGE_SCN_CNT_CODE | \
IMAGE_SCN_MEM_READ | \ IMAGE_SCN_MEM_READ | \
IMAGE_SCN_MEM_EXECUTE | \ IMAGE_SCN_MEM_EXECUTE # Characteristics
IMAGE_SCN_ALIGN_16BYTES # Characteristics
.ascii ".data\0\0\0"
.long ZO__end - ZO__data # VirtualSize
.long setup_size + ZO__data # VirtualAddress
.long ZO__edata - ZO__data # SizeOfRawData
.long setup_size + ZO__data # PointerToRawData
.long 0, 0, 0
.long IMAGE_SCN_CNT_INITIALIZED_DATA | \
IMAGE_SCN_MEM_READ | \
IMAGE_SCN_MEM_WRITE # Characteristics
.set section_count, (. - section_table) / 40 .set section_count, (. - section_table) / 40
#endif /* CONFIG_EFI_STUB */ #endif /* CONFIG_EFI_STUB */
@@ -285,12 +222,12 @@ sentinel: .byte 0xff, 0xff /* Used to detect broken loaders */
.globl hdr .globl hdr
hdr: hdr:
setup_sects: .byte 0 /* Filled in by build.c */ .byte setup_sects - 1
root_flags: .word ROOT_RDONLY root_flags: .word ROOT_RDONLY
syssize: .long 0 /* Filled in by build.c */ syssize: .long ZO__edata / 16
ram_size: .word 0 /* Obsolete */ ram_size: .word 0 /* Obsolete */
vid_mode: .word SVGA_MODE vid_mode: .word SVGA_MODE
root_dev: .word 0 /* Filled in by build.c */ root_dev: .word 0 /* Default to major/minor 0/0 */
boot_flag: .word 0xAA55 boot_flag: .word 0xAA55
# offset 512, entry point # offset 512, entry point
@@ -578,9 +515,25 @@ pref_address: .quad LOAD_PHYSICAL_ADDR # preferred load addr
# define INIT_SIZE VO_INIT_SIZE # define INIT_SIZE VO_INIT_SIZE
#endif #endif
.macro __handover_offset
#ifndef CONFIG_EFI_HANDOVER_PROTOCOL
.long 0
#elif !defined(CONFIG_X86_64)
.long ZO_efi32_stub_entry
#else
/* Yes, this is really how we defined it :( */
.long ZO_efi64_stub_entry - 0x200
#ifdef CONFIG_EFI_MIXED
.if ZO_efi32_stub_entry != ZO_efi64_stub_entry - 0x200
.error "32-bit and 64-bit EFI entry points do not match"
.endif
#endif
#endif
.endm
init_size: .long INIT_SIZE # kernel initialization size init_size: .long INIT_SIZE # kernel initialization size
handover_offset: .long 0 # Filled in by build.c handover_offset: __handover_offset
kernel_info_offset: .long 0 # Filled in by build.c kernel_info_offset: .long ZO_kernel_info
# End of setup header ##################################################### # End of setup header #####################################################

14
arch/x86/boot/setup.ld
View File

@@ -10,10 +10,11 @@ ENTRY(_start)
SECTIONS SECTIONS
{ {
. = 0; . = 0;
.bstext : { *(.bstext) } .bstext : {
.bsdata : { *(.bsdata) } *(.bstext)
. = 495;
} =0xffffffff
. = 495;
.header : { *(.header) } .header : { *(.header) }
.entrytext : { *(.entrytext) } .entrytext : { *(.entrytext) }
.inittext : { *(.inittext) } .inittext : { *(.inittext) }
@@ -23,6 +24,9 @@ SECTIONS
.text : { *(.text .text.*) } .text : { *(.text .text.*) }
.text32 : { *(.text32) } .text32 : { *(.text32) }
.pecompat : { *(.pecompat) }
PROVIDE(pecompat_fsize = setup_size - pecompat_fstart);
. = ALIGN(16); . = ALIGN(16);
.rodata : { *(.rodata*) } .rodata : { *(.rodata*) }
@@ -38,8 +42,10 @@ SECTIONS
.signature : { .signature : {
setup_sig = .; setup_sig = .;
LONG(0x5a5aaa55) LONG(0x5a5aaa55)
}
setup_size = ALIGN(ABSOLUTE(.), 4096);
setup_sects = ABSOLUTE(setup_size / 512);
}
. = ALIGN(16); . = ALIGN(16);
.bss : .bss :

273
arch/x86/boot/tools/build.c
View File

@@ -40,10 +40,6 @@ typedef unsigned char u8;
typedef unsigned short u16; typedef unsigned short u16;
typedef unsigned int u32; typedef unsigned int u32;
#define DEFAULT_MAJOR_ROOT 0
#define DEFAULT_MINOR_ROOT 0
#define DEFAULT_ROOT_DEV (DEFAULT_MAJOR_ROOT << 8 | DEFAULT_MINOR_ROOT)
/* Minimal number of setup sectors */ /* Minimal number of setup sectors */
#define SETUP_SECT_MIN 5 #define SETUP_SECT_MIN 5
#define SETUP_SECT_MAX 64 #define SETUP_SECT_MAX 64
@@ -51,22 +47,7 @@ typedef unsigned int u32;
/* This must be large enough to hold the entire setup */ /* This must be large enough to hold the entire setup */
u8 buf[SETUP_SECT_MAX*512]; u8 buf[SETUP_SECT_MAX*512];
#define PECOFF_RELOC_RESERVE 0x20 static unsigned long _edata;
#ifdef CONFIG_EFI_MIXED
#define PECOFF_COMPAT_RESERVE 0x20
#else
#define PECOFF_COMPAT_RESERVE 0x0
#endif
static unsigned long efi32_stub_entry;
static unsigned long efi64_stub_entry;
static unsigned long efi_pe_entry;
static unsigned long efi32_pe_entry;
static unsigned long kernel_info;
static unsigned long startup_64;
static unsigned long _ehead;
static unsigned long _end;
/*----------------------------------------------------------------------*/ /*----------------------------------------------------------------------*/
@@ -152,180 +133,6 @@ static void usage(void)
die("Usage: build setup system zoffset.h image"); die("Usage: build setup system zoffset.h image");
} }
#ifdef CONFIG_EFI_STUB
static void update_pecoff_section_header_fields(char *section_name, u32 vma, u32 size, u32 datasz, u32 offset)
{
unsigned int pe_header;
unsigned short num_sections;
u8 *section;
pe_header = get_unaligned_le32(&buf[0x3c]);
num_sections = get_unaligned_le16(&buf[pe_header + 6]);
#ifdef CONFIG_X86_32
section = &buf[pe_header + 0xa8];
#else
section = &buf[pe_header + 0xb8];
#endif
while (num_sections > 0) {
if (strncmp((char*)section, section_name, 8) == 0) {
/* section header size field */
put_unaligned_le32(size, section + 0x8);
/* section header vma field */
put_unaligned_le32(vma, section + 0xc);
/* section header 'size of initialised data' field */
put_unaligned_le32(datasz, section + 0x10);
/* section header 'file offset' field */
put_unaligned_le32(offset, section + 0x14);
break;
}
section += 0x28;
num_sections--;
}
}
static void update_pecoff_section_header(char *section_name, u32 offset, u32 size)
{
update_pecoff_section_header_fields(section_name, offset, size, size, offset);
}
static void update_pecoff_setup_and_reloc(unsigned int size)
{
u32 setup_offset = 0x200;
u32 reloc_offset = size - PECOFF_RELOC_RESERVE - PECOFF_COMPAT_RESERVE;
#ifdef CONFIG_EFI_MIXED
u32 compat_offset = reloc_offset + PECOFF_RELOC_RESERVE;
#endif
u32 setup_size = reloc_offset - setup_offset;
update_pecoff_section_header(".setup", setup_offset, setup_size);
update_pecoff_section_header(".reloc", reloc_offset, PECOFF_RELOC_RESERVE);
/*
* Modify .reloc section contents with a single entry. The
* relocation is applied to offset 10 of the relocation section.
*/
put_unaligned_le32(reloc_offset + 10, &buf[reloc_offset]);
put_unaligned_le32(10, &buf[reloc_offset + 4]);
#ifdef CONFIG_EFI_MIXED
update_pecoff_section_header(".compat", compat_offset, PECOFF_COMPAT_RESERVE);
/*
* Put the IA-32 machine type (0x14c) and the associated entry point
* address in the .compat section, so loaders can figure out which other
* execution modes this image supports.
*/
buf[compat_offset] = 0x1;
buf[compat_offset + 1] = 0x8;
put_unaligned_le16(0x14c, &buf[compat_offset + 2]);
put_unaligned_le32(efi32_pe_entry + size, &buf[compat_offset + 4]);
#endif
}
static void update_pecoff_text(unsigned int text_start, unsigned int file_sz,
unsigned int init_sz)
{
unsigned int pe_header;
unsigned int text_sz = file_sz - text_start;
unsigned int bss_sz = init_sz - file_sz;
pe_header = get_unaligned_le32(&buf[0x3c]);
/*
* The PE/COFF loader may load the image at an address which is
* misaligned with respect to the kernel_alignment field in the setup
* header.
*
* In order to avoid relocating the kernel to correct the misalignment,
* add slack to allow the buffer to be aligned within the declared size
* of the image.
*/
bss_sz += CONFIG_PHYSICAL_ALIGN;
init_sz += CONFIG_PHYSICAL_ALIGN;
/*
* Size of code: Subtract the size of the first sector (512 bytes)
* which includes the header.
*/
put_unaligned_le32(file_sz - 512 + bss_sz, &buf[pe_header + 0x1c]);
/* Size of image */
put_unaligned_le32(init_sz, &buf[pe_header + 0x50]);
/*
* Address of entry point for PE/COFF executable
*/
put_unaligned_le32(text_start + efi_pe_entry, &buf[pe_header + 0x28]);
update_pecoff_section_header_fields(".text", text_start, text_sz + bss_sz,
text_sz, text_start);
}
static int reserve_pecoff_reloc_section(int c)
{
/* Reserve 0x20 bytes for .reloc section */
memset(buf+c, 0, PECOFF_RELOC_RESERVE);
return PECOFF_RELOC_RESERVE;
}
static void efi_stub_defaults(void)
{
/* Defaults for old kernel */
#ifdef CONFIG_X86_32
efi_pe_entry = 0x10;
#else
efi_pe_entry = 0x210;
startup_64 = 0x200;
#endif
}
static void efi_stub_entry_update(void)
{
unsigned long addr = efi32_stub_entry;
#ifdef CONFIG_EFI_HANDOVER_PROTOCOL
#ifdef CONFIG_X86_64
/* Yes, this is really how we defined it :( */
addr = efi64_stub_entry - 0x200;
#endif
#ifdef CONFIG_EFI_MIXED
if (efi32_stub_entry != addr)
die("32-bit and 64-bit EFI entry points do not match\n");
#endif
#endif
put_unaligned_le32(addr, &buf[0x264]);
}
#else
static inline void update_pecoff_setup_and_reloc(unsigned int size) {}
static inline void update_pecoff_text(unsigned int text_start,
unsigned int file_sz,
unsigned int init_sz) {}
static inline void efi_stub_defaults(void) {}
static inline void efi_stub_entry_update(void) {}
static inline int reserve_pecoff_reloc_section(int c)
{
return 0;
}
#endif /* CONFIG_EFI_STUB */
static int reserve_pecoff_compat_section(int c)
{
/* Reserve 0x20 bytes for .compat section */
memset(buf+c, 0, PECOFF_COMPAT_RESERVE);
return PECOFF_COMPAT_RESERVE;
}
/* /*
* Parse zoffset.h and find the entry points. We could just #include zoffset.h * Parse zoffset.h and find the entry points. We could just #include zoffset.h
* but that would mean tools/build would have to be rebuilt every time. It's * but that would mean tools/build would have to be rebuilt every time. It's
@@ -354,14 +161,7 @@ static void parse_zoffset(char *fname)
p = (char *)buf; p = (char *)buf;
while (p && *p) { while (p && *p) {
PARSE_ZOFS(p, efi32_stub_entry); PARSE_ZOFS(p, _edata);
PARSE_ZOFS(p, efi64_stub_entry);
PARSE_ZOFS(p, efi_pe_entry);
PARSE_ZOFS(p, efi32_pe_entry);
PARSE_ZOFS(p, kernel_info);
PARSE_ZOFS(p, startup_64);
PARSE_ZOFS(p, _ehead);
PARSE_ZOFS(p, _end);
p = strchr(p, '\n'); p = strchr(p, '\n');
while (p && (*p == '\r' || *p == '\n')) while (p && (*p == '\r' || *p == '\n'))
@@ -371,17 +171,14 @@ static void parse_zoffset(char *fname)
int main(int argc, char ** argv) int main(int argc, char ** argv)
{ {
unsigned int i, sz, setup_sectors, init_sz; unsigned int i, sz, setup_sectors;
int c; int c;
u32 sys_size;
struct stat sb; struct stat sb;
FILE *file, *dest; FILE *file, *dest;
int fd; int fd;
void *kernel; void *kernel;
u32 crc = 0xffffffffUL; u32 crc = 0xffffffffUL;
efi_stub_defaults();
if (argc != 5) if (argc != 5)
usage(); usage();
parse_zoffset(argv[3]); parse_zoffset(argv[3]);
@@ -403,72 +200,27 @@ int main(int argc, char ** argv)
die("Boot block hasn't got boot flag (0xAA55)"); die("Boot block hasn't got boot flag (0xAA55)");
fclose(file); fclose(file);
c += reserve_pecoff_compat_section(c);
c += reserve_pecoff_reloc_section(c);
/* Pad unused space with zeros */ /* Pad unused space with zeros */
setup_sectors = (c + 511) / 512; setup_sectors = (c + 4095) / 4096;
setup_sectors *= 8;
if (setup_sectors < SETUP_SECT_MIN) if (setup_sectors < SETUP_SECT_MIN)
setup_sectors = SETUP_SECT_MIN; setup_sectors = SETUP_SECT_MIN;
i = setup_sectors*512; i = setup_sectors*512;
memset(buf+c, 0, i-c); memset(buf+c, 0, i-c);
update_pecoff_setup_and_reloc(i);
/* Set the default root device */
put_unaligned_le16(DEFAULT_ROOT_DEV, &buf[508]);
/* Open and stat the kernel file */ /* Open and stat the kernel file */
fd = open(argv[2], O_RDONLY); fd = open(argv[2], O_RDONLY);
if (fd < 0) if (fd < 0)
die("Unable to open `%s': %m", argv[2]); die("Unable to open `%s': %m", argv[2]);
if (fstat(fd, &sb)) if (fstat(fd, &sb))
die("Unable to stat `%s': %m", argv[2]); die("Unable to stat `%s': %m", argv[2]);
sz = sb.st_size; if (_edata != sb.st_size)
die("Unexpected file size `%s': %u != %u", argv[2], _edata,
sb.st_size);
sz = _edata - 4;
kernel = mmap(NULL, sz, PROT_READ, MAP_SHARED, fd, 0); kernel = mmap(NULL, sz, PROT_READ, MAP_SHARED, fd, 0);
if (kernel == MAP_FAILED) if (kernel == MAP_FAILED)
die("Unable to mmap '%s': %m", argv[2]); die("Unable to mmap '%s': %m", argv[2]);
/* Number of 16-byte paragraphs, including space for a 4-byte CRC */
sys_size = (sz + 15 + 4) / 16;
#ifdef CONFIG_EFI_STUB
/*
* COFF requires minimum 32-byte alignment of sections, and
* adding a signature is problematic without that alignment.
*/
sys_size = (sys_size + 1) & ~1;
#endif
/* Patch the setup code with the appropriate size parameters */
buf[0x1f1] = setup_sectors-1;
put_unaligned_le32(sys_size, &buf[0x1f4]);
init_sz = get_unaligned_le32(&buf[0x260]);
#ifdef CONFIG_EFI_STUB
/*
* The decompression buffer will start at ImageBase. When relocating
* the compressed kernel to its end, we must ensure that the head
* section does not get overwritten. The head section occupies
* [i, i + _ehead), and the destination is [init_sz - _end, init_sz).
*
* At present these should never overlap, because 'i' is at most 32k
* because of SETUP_SECT_MAX, '_ehead' is less than 1k, and the
* calculation of INIT_SIZE in boot/header.S ensures that
* 'init_sz - _end' is at least 64k.
*
* For future-proofing, increase init_sz if necessary.
*/
if (init_sz - _end < i + _ehead) {
init_sz = (i + _ehead + _end + 4095) & ~4095;
put_unaligned_le32(init_sz, &buf[0x260]);
}
#endif
update_pecoff_text(setup_sectors * 512, i + (sys_size * 16), init_sz);
efi_stub_entry_update();
/* Update kernel_info offset. */
put_unaligned_le32(kernel_info, &buf[0x268]);
crc = partial_crc32(buf, i, crc); crc = partial_crc32(buf, i, crc);
if (fwrite(buf, 1, i, dest) != i) if (fwrite(buf, 1, i, dest) != i)
@@ -479,13 +231,6 @@ int main(int argc, char ** argv)
if (fwrite(kernel, 1, sz, dest) != sz) if (fwrite(kernel, 1, sz, dest) != sz)
die("Writing kernel failed"); die("Writing kernel failed");
/* Add padding leaving 4 bytes for the checksum */
while (sz++ < (sys_size*16) - 4) {
crc = partial_crc32_one('\0', crc);
if (fwrite("\0", 1, 1, dest) != 1)
die("Writing padding failed");
}
/* Write the CRC */ /* Write the CRC */
put_unaligned_le32(crc, buf); put_unaligned_le32(crc, buf);
if (fwrite(buf, 1, 4, dest) != 4) if (fwrite(buf, 1, 4, dest) != 4)

1
arch/x86/include/asm/boot.h
View File

@@ -81,6 +81,7 @@
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
extern unsigned int output_len; extern unsigned int output_len;
extern const unsigned long kernel_text_size;
extern const unsigned long kernel_total_size; extern const unsigned long kernel_total_size;
unsigned long decompress_kernel(unsigned char *outbuf, unsigned long virt_addr, unsigned long decompress_kernel(unsigned char *outbuf, unsigned long virt_addr,

2
arch/x86/include/asm/init.h
View File

@@ -2,6 +2,8 @@
#ifndef _ASM_X86_INIT_H #ifndef _ASM_X86_INIT_H
#define _ASM_X86_INIT_H #define _ASM_X86_INIT_H
#define __head __section(".head.text")
struct x86_mapping_info { struct x86_mapping_info {
void *(*alloc_pgt_page)(void *); /* allocate buf for page table */ void *(*alloc_pgt_page)(void *); /* allocate buf for page table */
void *context; /* context for alloc_pgt_page */ void *context; /* context for alloc_pgt_page */

1
arch/x86/include/asm/kvm_host.h
View File

@@ -773,6 +773,7 @@ struct kvm_vcpu_arch {
int cpuid_nent; int cpuid_nent;
struct kvm_cpuid_entry2 *cpuid_entries; struct kvm_cpuid_entry2 *cpuid_entries;
u32 kvm_cpuid_base; u32 kvm_cpuid_base;
bool is_amd_compatible;
u64 reserved_gpa_bits; u64 reserved_gpa_bits;
int maxphyaddr; int maxphyaddr;

8
arch/x86/include/asm/mem_encrypt.h
View File

@@ -46,8 +46,8 @@ void __init sme_unmap_bootdata(char *real_mode_data);
void __init sme_early_init(void); void __init sme_early_init(void);
void __init sev_setup_arch(void); void __init sev_setup_arch(void);
void __init sme_encrypt_kernel(struct boot_params *bp); void sme_encrypt_kernel(struct boot_params *bp);
void __init sme_enable(struct boot_params *bp); void sme_enable(struct boot_params *bp);
int __init early_set_memory_decrypted(unsigned long vaddr, unsigned long size); int __init early_set_memory_decrypted(unsigned long vaddr, unsigned long size);
int __init early_set_memory_encrypted(unsigned long vaddr, unsigned long size); int __init early_set_memory_encrypted(unsigned long vaddr, unsigned long size);
@@ -80,8 +80,8 @@ static inline void __init sme_unmap_bootdata(char *real_mode_data) { }
static inline void __init sme_early_init(void) { } static inline void __init sme_early_init(void) { }
static inline void __init sev_setup_arch(void) { } static inline void __init sev_setup_arch(void) { }
static inline void __init sme_encrypt_kernel(struct boot_params *bp) { } static inline void sme_encrypt_kernel(struct boot_params *bp) { }
static inline void __init sme_enable(struct boot_params *bp) { } static inline void sme_enable(struct boot_params *bp) { }
static inline void sev_es_init_vc_handling(void) { } static inline void sev_es_init_vc_handling(void) { }

12
arch/x86/include/asm/page_types.h
View File

@@ -11,20 +11,14 @@
#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT) #define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
#define PAGE_MASK (~(PAGE_SIZE-1)) #define PAGE_MASK (~(PAGE_SIZE-1))
#define PMD_PAGE_SIZE (_AC(1, UL) << PMD_SHIFT)
#define PMD_PAGE_MASK (~(PMD_PAGE_SIZE-1))
#define PUD_PAGE_SIZE (_AC(1, UL) << PUD_SHIFT)
#define PUD_PAGE_MASK (~(PUD_PAGE_SIZE-1))
#define __VIRTUAL_MASK ((1UL << __VIRTUAL_MASK_SHIFT) - 1) #define __VIRTUAL_MASK ((1UL << __VIRTUAL_MASK_SHIFT) - 1)
/* Cast *PAGE_MASK to a signed type so that it is sign-extended if /* Cast P*D_MASK to a signed type so that it is sign-extended if
virtual addresses are 32-bits but physical addresses are larger virtual addresses are 32-bits but physical addresses are larger
(ie, 32-bit PAE). */ (ie, 32-bit PAE). */
#define PHYSICAL_PAGE_MASK (((signed long)PAGE_MASK) & __PHYSICAL_MASK) #define PHYSICAL_PAGE_MASK (((signed long)PAGE_MASK) & __PHYSICAL_MASK)
#define PHYSICAL_PMD_PAGE_MASK (((signed long)PMD_PAGE_MASK) & __PHYSICAL_MASK) #define PHYSICAL_PMD_PAGE_MASK (((signed long)PMD_MASK) & __PHYSICAL_MASK)
#define PHYSICAL_PUD_PAGE_MASK (((signed long)PUD_PAGE_MASK) & __PHYSICAL_MASK) #define PHYSICAL_PUD_PAGE_MASK (((signed long)PUD_MASK) & __PHYSICAL_MASK)
#define HPAGE_SHIFT PMD_SHIFT #define HPAGE_SHIFT PMD_SHIFT
#define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT) #define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT)

10
arch/x86/include/asm/sev.h
View File

@@ -192,15 +192,15 @@ static inline int pvalidate(unsigned long vaddr, bool rmp_psize, bool validate)
struct snp_guest_request_ioctl; struct snp_guest_request_ioctl;
void setup_ghcb(void); void setup_ghcb(void);
void __init early_snp_set_memory_private(unsigned long vaddr, unsigned long paddr, void early_snp_set_memory_private(unsigned long vaddr, unsigned long paddr,
unsigned long npages); unsigned long npages);
void __init early_snp_set_memory_shared(unsigned long vaddr, unsigned long paddr, void early_snp_set_memory_shared(unsigned long vaddr, unsigned long paddr,
unsigned long npages); unsigned long npages);
void snp_set_memory_shared(unsigned long vaddr, unsigned long npages); void snp_set_memory_shared(unsigned long vaddr, unsigned long npages);
void snp_set_memory_private(unsigned long vaddr, unsigned long npages); void snp_set_memory_private(unsigned long vaddr, unsigned long npages);
void snp_set_wakeup_secondary_cpu(void); void snp_set_wakeup_secondary_cpu(void);
bool snp_init(struct boot_params *bp); bool snp_init(struct boot_params *bp);
void __init __noreturn snp_abort(void); void __noreturn snp_abort(void);
void snp_dmi_setup(void); void snp_dmi_setup(void);
int snp_issue_guest_request(u64 exit_code, struct snp_req_data *input, struct snp_guest_request_ioctl *rio); int snp_issue_guest_request(u64 exit_code, struct snp_req_data *input, struct snp_guest_request_ioctl *rio);
u64 snp_get_unsupported_features(u64 status); u64 snp_get_unsupported_features(u64 status);

2
arch/x86/kernel/amd_gart_64.c
View File

@@ -504,7 +504,7 @@ static __init unsigned long check_iommu_size(unsigned long aper, u64 aper_size)
} }
a = aper + iommu_size; a = aper + iommu_size;
iommu_size -= round_up(a, PMD_PAGE_SIZE) - a; iommu_size -= round_up(a, PMD_SIZE) - a;
if (iommu_size < 64*1024*1024) { if (iommu_size < 64*1024*1024) {
pr_warn("PCI-DMA: Warning: Small IOMMU %luMB." pr_warn("PCI-DMA: Warning: Small IOMMU %luMB."

11
arch/x86/kernel/cpu/bugs.c
View File

@@ -1629,7 +1629,8 @@ static void __init bhi_select_mitigation(void)
return; return;
/* Retpoline mitigates against BHI unless the CPU has RRSBA behavior */ /* Retpoline mitigates against BHI unless the CPU has RRSBA behavior */
if (cpu_feature_enabled(X86_FEATURE_RETPOLINE)) { if (boot_cpu_has(X86_FEATURE_RETPOLINE) &&
!boot_cpu_has(X86_FEATURE_RETPOLINE_LFENCE)) {
spec_ctrl_disable_kernel_rrsba(); spec_ctrl_disable_kernel_rrsba();
if (rrsba_disabled) if (rrsba_disabled)
return; return;
@@ -2783,11 +2784,13 @@ static const char *spectre_bhi_state(void)
{ {
if (!boot_cpu_has_bug(X86_BUG_BHI)) if (!boot_cpu_has_bug(X86_BUG_BHI))
return "; BHI: Not affected"; return "; BHI: Not affected";
else if (boot_cpu_has(X86_FEATURE_CLEAR_BHB_HW)) else if (boot_cpu_has(X86_FEATURE_CLEAR_BHB_HW))
return "; BHI: BHI_DIS_S"; return "; BHI: BHI_DIS_S";
else if (boot_cpu_has(X86_FEATURE_CLEAR_BHB_LOOP)) else if (boot_cpu_has(X86_FEATURE_CLEAR_BHB_LOOP))
return "; BHI: SW loop, KVM: SW loop"; return "; BHI: SW loop, KVM: SW loop";
else if (boot_cpu_has(X86_FEATURE_RETPOLINE) && rrsba_disabled) else if (boot_cpu_has(X86_FEATURE_RETPOLINE) &&
!boot_cpu_has(X86_FEATURE_RETPOLINE_LFENCE) &&
rrsba_disabled)
return "; BHI: Retpoline"; return "; BHI: Retpoline";
else if (boot_cpu_has(X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT)) else if (boot_cpu_has(X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT))
return "; BHI: Vulnerable, KVM: SW loop"; return "; BHI: Vulnerable, KVM: SW loop";

6
arch/x86/kernel/cpu/cpuid-deps.c
View File

@@ -44,7 +44,10 @@ static const struct cpuid_dep cpuid_deps[] = {
{ X86_FEATURE_F16C, X86_FEATURE_XMM2, }, { X86_FEATURE_F16C, X86_FEATURE_XMM2, },
{ X86_FEATURE_AES, X86_FEATURE_XMM2 }, { X86_FEATURE_AES, X86_FEATURE_XMM2 },
{ X86_FEATURE_SHA_NI, X86_FEATURE_XMM2 }, { X86_FEATURE_SHA_NI, X86_FEATURE_XMM2 },
{ X86_FEATURE_GFNI, X86_FEATURE_XMM2 },
{ X86_FEATURE_FMA, X86_FEATURE_AVX }, { X86_FEATURE_FMA, X86_FEATURE_AVX },
{ X86_FEATURE_VAES, X86_FEATURE_AVX },
{ X86_FEATURE_VPCLMULQDQ, X86_FEATURE_AVX },
{ X86_FEATURE_AVX2, X86_FEATURE_AVX, }, { X86_FEATURE_AVX2, X86_FEATURE_AVX, },
{ X86_FEATURE_AVX512F, X86_FEATURE_AVX, }, { X86_FEATURE_AVX512F, X86_FEATURE_AVX, },
{ X86_FEATURE_AVX512IFMA, X86_FEATURE_AVX512F }, { X86_FEATURE_AVX512IFMA, X86_FEATURE_AVX512F },
@@ -56,9 +59,6 @@ static const struct cpuid_dep cpuid_deps[] = {
{ X86_FEATURE_AVX512VL, X86_FEATURE_AVX512F }, { X86_FEATURE_AVX512VL, X86_FEATURE_AVX512F },
{ X86_FEATURE_AVX512VBMI, X86_FEATURE_AVX512F }, { X86_FEATURE_AVX512VBMI, X86_FEATURE_AVX512F },
{ X86_FEATURE_AVX512_VBMI2, X86_FEATURE_AVX512VL }, { X86_FEATURE_AVX512_VBMI2, X86_FEATURE_AVX512VL },
{ X86_FEATURE_GFNI, X86_FEATURE_AVX512VL },
{ X86_FEATURE_VAES, X86_FEATURE_AVX512VL },
{ X86_FEATURE_VPCLMULQDQ, X86_FEATURE_AVX512VL },
{ X86_FEATURE_AVX512_VNNI, X86_FEATURE_AVX512VL }, { X86_FEATURE_AVX512_VNNI, X86_FEATURE_AVX512VL },
{ X86_FEATURE_AVX512_BITALG, X86_FEATURE_AVX512VL }, { X86_FEATURE_AVX512_BITALG, X86_FEATURE_AVX512VL },
{ X86_FEATURE_AVX512_4VNNIW, X86_FEATURE_AVX512F }, { X86_FEATURE_AVX512_4VNNIW, X86_FEATURE_AVX512F },

7
arch/x86/kernel/head64.c
View File

@@ -41,6 +41,7 @@
#include <asm/trapnr.h> #include <asm/trapnr.h>
#include <asm/sev.h> #include <asm/sev.h>
#include <asm/tdx.h> #include <asm/tdx.h>
#include <asm/init.h>
/* /*
* Manage page tables very early on. * Manage page tables very early on.
@@ -84,8 +85,6 @@ static struct desc_ptr startup_gdt_descr = {
.address = 0, .address = 0,
}; };
#define __head __section(".head.text")
static void __head *fixup_pointer(void *ptr, unsigned long physaddr) static void __head *fixup_pointer(void *ptr, unsigned long physaddr)
{ {
return ptr - (void *)_text + (void *)physaddr; return ptr - (void *)_text + (void *)physaddr;
@@ -203,7 +202,7 @@ unsigned long __head __startup_64(unsigned long physaddr,
load_delta = physaddr - (unsigned long)(_text - __START_KERNEL_map); load_delta = physaddr - (unsigned long)(_text - __START_KERNEL_map);
/* Is the address not 2M aligned? */ /* Is the address not 2M aligned? */
if (load_delta & ~PMD_PAGE_MASK) if (load_delta & ~PMD_MASK)
for (;;); for (;;);
/* Include the SME encryption mask in the fixup value */ /* Include the SME encryption mask in the fixup value */
@@ -588,7 +587,7 @@ static void set_bringup_idt_handler(gate_desc *idt, int n, void *handler)
} }
/* This runs while still in the direct mapping */ /* This runs while still in the direct mapping */
static void startup_64_load_idt(unsigned long physbase) static void __head startup_64_load_idt(unsigned long physbase)
{ {
struct desc_ptr *desc = fixup_pointer(&bringup_idt_descr, physbase); struct desc_ptr *desc = fixup_pointer(&bringup_idt_descr, physbase);
gate_desc *idt = fixup_pointer(bringup_idt_table, physbase); gate_desc *idt = fixup_pointer(bringup_idt_table, physbase);

1
arch/x86/kernel/platform-quirks.c
View File

@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0 // SPDX-License-Identifier: GPL-2.0
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/pnp.h>
#include <asm/setup.h> #include <asm/setup.h>
#include <asm/bios_ebda.h> #include <asm/bios_ebda.h>

23
arch/x86/kernel/sev-shared.c
View File

@@ -86,7 +86,8 @@ static bool __init sev_es_check_cpu_features(void)
return true; return true;
} }
static void __noreturn sev_es_terminate(unsigned int set, unsigned int reason) static void __head __noreturn
sev_es_terminate(unsigned int set, unsigned int reason)
{ {
u64 val = GHCB_MSR_TERM_REQ; u64 val = GHCB_MSR_TERM_REQ;
@@ -323,13 +324,7 @@ static int sev_cpuid_hv(struct ghcb *ghcb, struct es_em_ctxt *ctxt, struct cpuid
*/ */
static const struct snp_cpuid_table *snp_cpuid_get_table(void) static const struct snp_cpuid_table *snp_cpuid_get_table(void)
{ {
void *ptr; return &RIP_REL_REF(cpuid_table_copy);
asm ("lea cpuid_table_copy(%%rip), %0"
: "=r" (ptr)
: "p" (&cpuid_table_copy));
return ptr;
} }
/* /*
@@ -388,7 +383,7 @@ static u32 snp_cpuid_calc_xsave_size(u64 xfeatures_en, bool compacted)
return xsave_size; return xsave_size;
} }
static bool static bool __head
snp_cpuid_get_validated_func(struct cpuid_leaf *leaf) snp_cpuid_get_validated_func(struct cpuid_leaf *leaf)
{ {
const struct snp_cpuid_table *cpuid_table = snp_cpuid_get_table(); const struct snp_cpuid_table *cpuid_table = snp_cpuid_get_table();
@@ -525,7 +520,8 @@ static int snp_cpuid_postprocess(struct ghcb *ghcb, struct es_em_ctxt *ctxt,
* Returns -EOPNOTSUPP if feature not enabled. Any other non-zero return value * Returns -EOPNOTSUPP if feature not enabled. Any other non-zero return value
* should be treated as fatal by caller. * should be treated as fatal by caller.
*/ */
static int snp_cpuid(struct ghcb *ghcb, struct es_em_ctxt *ctxt, struct cpuid_leaf *leaf) static int __head
snp_cpuid(struct ghcb *ghcb, struct es_em_ctxt *ctxt, struct cpuid_leaf *leaf)
{ {
const struct snp_cpuid_table *cpuid_table = snp_cpuid_get_table(); const struct snp_cpuid_table *cpuid_table = snp_cpuid_get_table();
@@ -567,7 +563,7 @@ static int snp_cpuid(struct ghcb *ghcb, struct es_em_ctxt *ctxt, struct cpuid_le
* page yet, so it only supports the MSR based communication with the * page yet, so it only supports the MSR based communication with the
* hypervisor and only the CPUID exit-code. * hypervisor and only the CPUID exit-code.
*/ */
void __init do_vc_no_ghcb(struct pt_regs *regs, unsigned long exit_code) void __head do_vc_no_ghcb(struct pt_regs *regs, unsigned long exit_code)
{ {
unsigned int subfn = lower_bits(regs->cx, 32); unsigned int subfn = lower_bits(regs->cx, 32);
unsigned int fn = lower_bits(regs->ax, 32); unsigned int fn = lower_bits(regs->ax, 32);
@@ -1013,7 +1009,8 @@ struct cc_setup_data {
* Search for a Confidential Computing blob passed in as a setup_data entry * Search for a Confidential Computing blob passed in as a setup_data entry
* via the Linux Boot Protocol. * via the Linux Boot Protocol.
*/ */
static struct cc_blob_sev_info *find_cc_blob_setup_data(struct boot_params *bp) static __head
struct cc_blob_sev_info *find_cc_blob_setup_data(struct boot_params *bp)
{ {
struct cc_setup_data *sd = NULL; struct cc_setup_data *sd = NULL;
struct setup_data *hdr; struct setup_data *hdr;
@@ -1040,7 +1037,7 @@ static struct cc_blob_sev_info *find_cc_blob_setup_data(struct boot_params *bp)
* mapping needs to be updated in sync with all the changes to virtual memory * mapping needs to be updated in sync with all the changes to virtual memory
* layout and related mapping facilities throughout the boot process. * layout and related mapping facilities throughout the boot process.
*/ */
static void __init setup_cpuid_table(const struct cc_blob_sev_info *cc_info) static void __head setup_cpuid_table(const struct cc_blob_sev_info *cc_info)
{ {
const struct snp_cpuid_table *cpuid_table_fw, *cpuid_table; const struct snp_cpuid_table *cpuid_table_fw, *cpuid_table;
int i; int i;

11
arch/x86/kernel/sev.c
View File

@@ -26,6 +26,7 @@
#include <linux/dmi.h> #include <linux/dmi.h>
#include <uapi/linux/sev-guest.h> #include <uapi/linux/sev-guest.h>
#include <asm/init.h>
#include <asm/cpu_entry_area.h> #include <asm/cpu_entry_area.h>
#include <asm/stacktrace.h> #include <asm/stacktrace.h>
#include <asm/sev.h> #include <asm/sev.h>
@@ -690,7 +691,7 @@ static void pvalidate_pages(unsigned long vaddr, unsigned long npages, bool vali
} }
} }
static void __init early_set_pages_state(unsigned long paddr, unsigned long npages, enum psc_op op) static void __head early_set_pages_state(unsigned long paddr, unsigned long npages, enum psc_op op)
{ {
unsigned long paddr_end; unsigned long paddr_end;
u64 val; u64 val;
@@ -728,7 +729,7 @@ e_term:
sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_PSC); sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_PSC);
} }
void __init early_snp_set_memory_private(unsigned long vaddr, unsigned long paddr, void __head early_snp_set_memory_private(unsigned long vaddr, unsigned long paddr,
unsigned long npages) unsigned long npages)
{ {
/* /*
@@ -2085,7 +2086,7 @@ fail:
* *
* Scan for the blob in that order. * Scan for the blob in that order.
*/ */
static __init struct cc_blob_sev_info *find_cc_blob(struct boot_params *bp) static __head struct cc_blob_sev_info *find_cc_blob(struct boot_params *bp)
{ {
struct cc_blob_sev_info *cc_info; struct cc_blob_sev_info *cc_info;
@@ -2111,7 +2112,7 @@ found_cc_info:
return cc_info; return cc_info;
} }
bool __init snp_init(struct boot_params *bp) bool __head snp_init(struct boot_params *bp)
{ {
struct cc_blob_sev_info *cc_info; struct cc_blob_sev_info *cc_info;
@@ -2133,7 +2134,7 @@ bool __init snp_init(struct boot_params *bp)
return true; return true;
} }
void __init __noreturn snp_abort(void) void __head __noreturn snp_abort(void)
{ {
sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SNP_UNSUPPORTED); sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SNP_UNSUPPORTED);
} }

1
arch/x86/kvm/cpuid.c
View File

@@ -340,6 +340,7 @@ static void kvm_vcpu_after_set_cpuid(struct kvm_vcpu *vcpu)
kvm_update_pv_runtime(vcpu); kvm_update_pv_runtime(vcpu);
vcpu->arch.is_amd_compatible = guest_cpuid_is_amd_or_hygon(vcpu);
vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu); vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu); vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);

10
arch/x86/kvm/cpuid.h
View File

@@ -125,6 +125,16 @@ static inline bool guest_cpuid_is_intel(struct kvm_vcpu *vcpu)
return best && is_guest_vendor_intel(best->ebx, best->ecx, best->edx); return best && is_guest_vendor_intel(best->ebx, best->ecx, best->edx);
} }
static inline bool guest_cpuid_is_amd_compatible(struct kvm_vcpu *vcpu)
{
return vcpu->arch.is_amd_compatible;
}
static inline bool guest_cpuid_is_intel_compatible(struct kvm_vcpu *vcpu)
{
return !guest_cpuid_is_amd_compatible(vcpu);
}
static inline int guest_cpuid_family(struct kvm_vcpu *vcpu) static inline int guest_cpuid_family(struct kvm_vcpu *vcpu)
{ {
struct kvm_cpuid_entry2 *best; struct kvm_cpuid_entry2 *best;

3
arch/x86/kvm/lapic.c
View File

@@ -2548,7 +2548,8 @@ int kvm_apic_local_deliver(struct kvm_lapic *apic, int lvt_type)
trig_mode = reg & APIC_LVT_LEVEL_TRIGGER; trig_mode = reg & APIC_LVT_LEVEL_TRIGGER;
r = __apic_accept_irq(apic, mode, vector, 1, trig_mode, NULL); r = __apic_accept_irq(apic, mode, vector, 1, trig_mode, NULL);
if (r && lvt_type == APIC_LVTPC) if (r && lvt_type == APIC_LVTPC &&
guest_cpuid_is_intel_compatible(apic->vcpu))
kvm_lapic_set_reg(apic, APIC_LVTPC, reg | APIC_LVT_MASKED); kvm_lapic_set_reg(apic, APIC_LVTPC, reg | APIC_LVT_MASKED);
return r; return r;
} }

2
arch/x86/kvm/mmu/mmu.c
View File

@@ -4649,7 +4649,7 @@ static void reset_guest_rsvds_bits_mask(struct kvm_vcpu *vcpu,
context->cpu_role.base.level, is_efer_nx(context), context->cpu_role.base.level, is_efer_nx(context),
guest_can_use_gbpages(vcpu), guest_can_use_gbpages(vcpu),
is_cr4_pse(context), is_cr4_pse(context),
guest_cpuid_is_amd_or_hygon(vcpu)); guest_cpuid_is_amd_compatible(vcpu));
} }
static void static void

24
arch/x86/kvm/vmx/vmx.c
View File

@@ -7742,8 +7742,28 @@ static u64 vmx_get_perf_capabilities(void)
if (vmx_pebs_supported()) { if (vmx_pebs_supported()) {
perf_cap |= host_perf_cap & PERF_CAP_PEBS_MASK; perf_cap |= host_perf_cap & PERF_CAP_PEBS_MASK;
if ((perf_cap & PERF_CAP_PEBS_FORMAT) < 4)
perf_cap &= ~PERF_CAP_PEBS_BASELINE; /*
* Disallow adaptive PEBS as it is functionally broken, can be
* used by the guest to read *host* LBRs, and can be used to
* bypass userspace event filters. To correctly and safely
* support adaptive PEBS, KVM needs to:
*
* 1. Account for the ADAPTIVE flag when (re)programming fixed
* counters.
*
* 2. Gain support from perf (or take direct control of counter
* programming) to support events without adaptive PEBS
* enabled for the hardware counter.
*
* 3. Ensure LBR MSRs cannot hold host data on VM-Entry with
* adaptive PEBS enabled and MSR_PEBS_DATA_CFG.LBRS=1.
*
* 4. Document which PMU events are effectively exposed to the
* guest via adaptive PEBS, and make adaptive PEBS mutually
* exclusive with KVM_SET_PMU_EVENT_FILTER if necessary.
*/
perf_cap &= ~PERF_CAP_PEBS_BASELINE;
} }
return perf_cap; return perf_cap;

2
arch/x86/kvm/x86.c
View File

@@ -3278,7 +3278,7 @@ static bool is_mci_status_msr(u32 msr)
static bool can_set_mci_status(struct kvm_vcpu *vcpu) static bool can_set_mci_status(struct kvm_vcpu *vcpu)
{ {
/* McStatusWrEn enabled? */ /* McStatusWrEn enabled? */
if (guest_cpuid_is_amd_or_hygon(vcpu)) if (guest_cpuid_is_amd_compatible(vcpu))
return !!(vcpu->arch.msr_hwcr & BIT_ULL(18)); return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
return false; return false;

4
arch/x86/mm/mem_encrypt_boot.S
View File

@@ -26,7 +26,7 @@ SYM_FUNC_START(sme_encrypt_execute)
* RCX - virtual address of the encryption workarea, including: * RCX - virtual address of the encryption workarea, including:
* - stack page (PAGE_SIZE) * - stack page (PAGE_SIZE)
* - encryption routine page (PAGE_SIZE) * - encryption routine page (PAGE_SIZE)
* - intermediate copy buffer (PMD_PAGE_SIZE) * - intermediate copy buffer (PMD_SIZE)
* R8 - physical address of the pagetables to use for encryption * R8 - physical address of the pagetables to use for encryption
*/ */
@@ -123,7 +123,7 @@ SYM_FUNC_START(__enc_copy)
wbinvd /* Invalidate any cache entries */ wbinvd /* Invalidate any cache entries */
/* Copy/encrypt up to 2MB at a time */ /* Copy/encrypt up to 2MB at a time */
movq $PMD_PAGE_SIZE, %r12 movq $PMD_SIZE, %r12
1: 1:
cmpq %r12, %r9 cmpq %r12, %r9
jnb 2f jnb 2f

58
arch/x86/mm/mem_encrypt_identity.c
View File

@@ -41,6 +41,7 @@
#include <linux/mem_encrypt.h> #include <linux/mem_encrypt.h>
#include <linux/cc_platform.h> #include <linux/cc_platform.h>
#include <asm/init.h>
#include <asm/setup.h> #include <asm/setup.h>
#include <asm/sections.h> #include <asm/sections.h>
#include <asm/cmdline.h> #include <asm/cmdline.h>
@@ -93,12 +94,12 @@ struct sme_populate_pgd_data {
* section is 2MB aligned to allow for simple pagetable setup using only * section is 2MB aligned to allow for simple pagetable setup using only
* PMD entries (see vmlinux.lds.S). * PMD entries (see vmlinux.lds.S).
*/ */
static char sme_workarea[2 * PMD_PAGE_SIZE] __section(".init.scratch"); static char sme_workarea[2 * PMD_SIZE] __section(".init.scratch");
static char sme_cmdline_arg[] __initdata = "mem_encrypt"; static char sme_cmdline_arg[] __initdata = "mem_encrypt";
static char sme_cmdline_on[] __initdata = "on"; static char sme_cmdline_on[] __initdata = "on";
static void __init sme_clear_pgd(struct sme_populate_pgd_data *ppd) static void __head sme_clear_pgd(struct sme_populate_pgd_data *ppd)
{ {
unsigned long pgd_start, pgd_end, pgd_size; unsigned long pgd_start, pgd_end, pgd_size;
pgd_t *pgd_p; pgd_t *pgd_p;
@@ -113,7 +114,7 @@ static void __init sme_clear_pgd(struct sme_populate_pgd_data *ppd)
memset(pgd_p, 0, pgd_size); memset(pgd_p, 0, pgd_size);
} }
static pud_t __init *sme_prepare_pgd(struct sme_populate_pgd_data *ppd) static pud_t __head *sme_prepare_pgd(struct sme_populate_pgd_data *ppd)
{ {
pgd_t *pgd; pgd_t *pgd;
p4d_t *p4d; p4d_t *p4d;
@@ -150,7 +151,7 @@ static pud_t __init *sme_prepare_pgd(struct sme_populate_pgd_data *ppd)
return pud; return pud;
} }
static void __init sme_populate_pgd_large(struct sme_populate_pgd_data *ppd) static void __head sme_populate_pgd_large(struct sme_populate_pgd_data *ppd)
{ {
pud_t *pud; pud_t *pud;
pmd_t *pmd; pmd_t *pmd;
@@ -166,7 +167,7 @@ static void __init sme_populate_pgd_large(struct sme_populate_pgd_data *ppd)
set_pmd(pmd, __pmd(ppd->paddr | ppd->pmd_flags)); set_pmd(pmd, __pmd(ppd->paddr | ppd->pmd_flags));
} }
static void __init sme_populate_pgd(struct sme_populate_pgd_data *ppd) static void __head sme_populate_pgd(struct sme_populate_pgd_data *ppd)
{ {
pud_t *pud; pud_t *pud;
pmd_t *pmd; pmd_t *pmd;
@@ -192,17 +193,17 @@ static void __init sme_populate_pgd(struct sme_populate_pgd_data *ppd)
set_pte(pte, __pte(ppd->paddr | ppd->pte_flags)); set_pte(pte, __pte(ppd->paddr | ppd->pte_flags));
} }
static void __init __sme_map_range_pmd(struct sme_populate_pgd_data *ppd) static void __head __sme_map_range_pmd(struct sme_populate_pgd_data *ppd)
{ {
while (ppd->vaddr < ppd->vaddr_end) { while (ppd->vaddr < ppd->vaddr_end) {
sme_populate_pgd_large(ppd); sme_populate_pgd_large(ppd);
ppd->vaddr += PMD_PAGE_SIZE; ppd->vaddr += PMD_SIZE;
ppd->paddr += PMD_PAGE_SIZE; ppd->paddr += PMD_SIZE;
} }
} }
static void __init __sme_map_range_pte(struct sme_populate_pgd_data *ppd) static void __head __sme_map_range_pte(struct sme_populate_pgd_data *ppd)
{ {
while (ppd->vaddr < ppd->vaddr_end) { while (ppd->vaddr < ppd->vaddr_end) {
sme_populate_pgd(ppd); sme_populate_pgd(ppd);
@@ -212,7 +213,7 @@ static void __init __sme_map_range_pte(struct sme_populate_pgd_data *ppd)
} }
} }
static void __init __sme_map_range(struct sme_populate_pgd_data *ppd, static void __head __sme_map_range(struct sme_populate_pgd_data *ppd,
pmdval_t pmd_flags, pteval_t pte_flags) pmdval_t pmd_flags, pteval_t pte_flags)
{ {
unsigned long vaddr_end; unsigned long vaddr_end;
@@ -224,11 +225,11 @@ static void __init __sme_map_range(struct sme_populate_pgd_data *ppd,
vaddr_end = ppd->vaddr_end; vaddr_end = ppd->vaddr_end;
/* If start is not 2MB aligned, create PTE entries */ /* If start is not 2MB aligned, create PTE entries */
ppd->vaddr_end = ALIGN(ppd->vaddr, PMD_PAGE_SIZE); ppd->vaddr_end = ALIGN(ppd->vaddr, PMD_SIZE);
__sme_map_range_pte(ppd); __sme_map_range_pte(ppd);
/* Create PMD entries */ /* Create PMD entries */
ppd->vaddr_end = vaddr_end & PMD_PAGE_MASK; ppd->vaddr_end = vaddr_end & PMD_MASK;
__sme_map_range_pmd(ppd); __sme_map_range_pmd(ppd);
/* If end is not 2MB aligned, create PTE entries */ /* If end is not 2MB aligned, create PTE entries */
@@ -236,22 +237,22 @@ static void __init __sme_map_range(struct sme_populate_pgd_data *ppd,
__sme_map_range_pte(ppd); __sme_map_range_pte(ppd);
} }
static void __init sme_map_range_encrypted(struct sme_populate_pgd_data *ppd) static void __head sme_map_range_encrypted(struct sme_populate_pgd_data *ppd)
{ {
__sme_map_range(ppd, PMD_FLAGS_ENC, PTE_FLAGS_ENC); __sme_map_range(ppd, PMD_FLAGS_ENC, PTE_FLAGS_ENC);
} }
static void __init sme_map_range_decrypted(struct sme_populate_pgd_data *ppd) static void __head sme_map_range_decrypted(struct sme_populate_pgd_data *ppd)
{ {
__sme_map_range(ppd, PMD_FLAGS_DEC, PTE_FLAGS_DEC); __sme_map_range(ppd, PMD_FLAGS_DEC, PTE_FLAGS_DEC);
} }
static void __init sme_map_range_decrypted_wp(struct sme_populate_pgd_data *ppd) static void __head sme_map_range_decrypted_wp(struct sme_populate_pgd_data *ppd)
{ {
__sme_map_range(ppd, PMD_FLAGS_DEC_WP, PTE_FLAGS_DEC_WP); __sme_map_range(ppd, PMD_FLAGS_DEC_WP, PTE_FLAGS_DEC_WP);
} }
static unsigned long __init sme_pgtable_calc(unsigned long len) static unsigned long __head sme_pgtable_calc(unsigned long len)
{ {
unsigned long entries = 0, tables = 0; unsigned long entries = 0, tables = 0;
@@ -288,7 +289,7 @@ static unsigned long __init sme_pgtable_calc(unsigned long len)
return entries + tables; return entries + tables;
} }
void __init sme_encrypt_kernel(struct boot_params *bp) void __head sme_encrypt_kernel(struct boot_params *bp)
{ {
unsigned long workarea_start, workarea_end, workarea_len; unsigned long workarea_start, workarea_end, workarea_len;
unsigned long execute_start, execute_end, execute_len; unsigned long execute_start, execute_end, execute_len;
@@ -323,9 +324,8 @@ void __init sme_encrypt_kernel(struct boot_params *bp)
* memory from being cached. * memory from being cached.
*/ */
/* Physical addresses gives us the identity mapped virtual addresses */ kernel_start = (unsigned long)RIP_REL_REF(_text);
kernel_start = __pa_symbol(_text); kernel_end = ALIGN((unsigned long)RIP_REL_REF(_end), PMD_SIZE);
kernel_end = ALIGN(__pa_symbol(_end), PMD_PAGE_SIZE);
kernel_len = kernel_end - kernel_start; kernel_len = kernel_end - kernel_start;
initrd_start = 0; initrd_start = 0;
@@ -342,25 +342,17 @@ void __init sme_encrypt_kernel(struct boot_params *bp)
} }
#endif #endif
/*
* We're running identity mapped, so we must obtain the address to the
* SME encryption workarea using rip-relative addressing.
*/
asm ("lea sme_workarea(%%rip), %0"
: "=r" (workarea_start)
: "p" (sme_workarea));
/* /*
* Calculate required number of workarea bytes needed: * Calculate required number of workarea bytes needed:
* executable encryption area size: * executable encryption area size:
* stack page (PAGE_SIZE) * stack page (PAGE_SIZE)
* encryption routine page (PAGE_SIZE) * encryption routine page (PAGE_SIZE)
* intermediate copy buffer (PMD_PAGE_SIZE) * intermediate copy buffer (PMD_SIZE)
* pagetable structures for the encryption of the kernel * pagetable structures for the encryption of the kernel
* pagetable structures for workarea (in case not currently mapped) * pagetable structures for workarea (in case not currently mapped)
*/ */
execute_start = workarea_start; execute_start = workarea_start = (unsigned long)RIP_REL_REF(sme_workarea);
execute_end = execute_start + (PAGE_SIZE * 2) + PMD_PAGE_SIZE; execute_end = execute_start + (PAGE_SIZE * 2) + PMD_SIZE;
execute_len = execute_end - execute_start; execute_len = execute_end - execute_start;
/* /*
@@ -383,7 +375,7 @@ void __init sme_encrypt_kernel(struct boot_params *bp)
* before it is mapped. * before it is mapped.
*/ */
workarea_len = execute_len + pgtable_area_len; workarea_len = execute_len + pgtable_area_len;
workarea_end = ALIGN(workarea_start + workarea_len, PMD_PAGE_SIZE); workarea_end = ALIGN(workarea_start + workarea_len, PMD_SIZE);
/* /*
* Set the address to the start of where newly created pagetable * Set the address to the start of where newly created pagetable
@@ -502,7 +494,7 @@ void __init sme_encrypt_kernel(struct boot_params *bp)
native_write_cr3(__native_read_cr3()); native_write_cr3(__native_read_cr3());
} }
void __init sme_enable(struct boot_params *bp) void __head sme_enable(struct boot_params *bp)
{ {
const char *cmdline_ptr, *cmdline_arg, *cmdline_on; const char *cmdline_ptr, *cmdline_arg, *cmdline_on;
unsigned int eax, ebx, ecx, edx; unsigned int eax, ebx, ecx, edx;

6
arch/x86/mm/pat/set_memory.c
View File

@@ -747,11 +747,11 @@ phys_addr_t slow_virt_to_phys(void *__virt_addr)
switch (level) { switch (level) {
case PG_LEVEL_1G: case PG_LEVEL_1G:
phys_addr = (phys_addr_t)pud_pfn(*(pud_t *)pte) << PAGE_SHIFT; phys_addr = (phys_addr_t)pud_pfn(*(pud_t *)pte) << PAGE_SHIFT;
offset = virt_addr & ~PUD_PAGE_MASK; offset = virt_addr & ~PUD_MASK;
break; break;
case PG_LEVEL_2M: case PG_LEVEL_2M:
phys_addr = (phys_addr_t)pmd_pfn(*(pmd_t *)pte) << PAGE_SHIFT; phys_addr = (phys_addr_t)pmd_pfn(*(pmd_t *)pte) << PAGE_SHIFT;
offset = virt_addr & ~PMD_PAGE_MASK; offset = virt_addr & ~PMD_MASK;
break; break;
default: default:
phys_addr = (phys_addr_t)pte_pfn(*pte) << PAGE_SHIFT; phys_addr = (phys_addr_t)pte_pfn(*pte) << PAGE_SHIFT;
@@ -1041,7 +1041,7 @@ __split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address,
case PG_LEVEL_1G: case PG_LEVEL_1G:
ref_prot = pud_pgprot(*(pud_t *)kpte); ref_prot = pud_pgprot(*(pud_t *)kpte);
ref_pfn = pud_pfn(*(pud_t *)kpte); ref_pfn = pud_pfn(*(pud_t *)kpte);
pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT; pfninc = PMD_SIZE >> PAGE_SHIFT;
lpaddr = address & PUD_MASK; lpaddr = address & PUD_MASK;
lpinc = PMD_SIZE; lpinc = PMD_SIZE;
/* /*

2
arch/x86/mm/pti.c
View File

@@ -592,7 +592,7 @@ static void pti_set_kernel_image_nonglobal(void)
* of the image. * of the image.
*/ */
unsigned long start = PFN_ALIGN(_text); unsigned long start = PFN_ALIGN(_text);
unsigned long end = ALIGN((unsigned long)_end, PMD_PAGE_SIZE); unsigned long end = ALIGN((unsigned long)_end, PMD_SIZE);
/* /*
* This clears _PAGE_GLOBAL from the entire kernel image. * This clears _PAGE_GLOBAL from the entire kernel image.

2
drivers/accessibility/speakup/main.c
View File

@@ -573,7 +573,7 @@ static u_long get_word(struct vc_data *vc)
} }
attr_ch = get_char(vc, (u_short *)tmp_pos, &spk_attr); attr_ch = get_char(vc, (u_short *)tmp_pos, &spk_attr);
buf[cnt++] = attr_ch; buf[cnt++] = attr_ch;
while (tmpx < vc->vc_cols - 1) { while (tmpx < vc->vc_cols - 1 && cnt < sizeof(buf) - 1) {
tmp_pos += 2; tmp_pos += 2;
tmpx++; tmpx++;
ch = get_char(vc, (u_short *)tmp_pos, &temp); ch = get_char(vc, (u_short *)tmp_pos, &temp);

10
drivers/char/random.c
View File

@@ -683,7 +683,7 @@ static void extract_entropy(void *buf, size_t len)
static void __cold _credit_init_bits(size_t bits) static void __cold _credit_init_bits(size_t bits)
{ {
static struct execute_work set_ready; static DECLARE_WORK(set_ready, crng_set_ready);
unsigned int new, orig, add; unsigned int new, orig, add;
unsigned long flags; unsigned long flags;
@@ -699,8 +699,8 @@ static void __cold _credit_init_bits(size_t bits)
if (orig < POOL_READY_BITS && new >= POOL_READY_BITS) { if (orig < POOL_READY_BITS && new >= POOL_READY_BITS) {
crng_reseed(); /* Sets crng_init to CRNG_READY under base_crng.lock. */ crng_reseed(); /* Sets crng_init to CRNG_READY under base_crng.lock. */
if (static_key_initialized) if (static_key_initialized && system_unbound_wq)
execute_in_process_context(crng_set_ready, &set_ready); queue_work(system_unbound_wq, &set_ready);
wake_up_interruptible(&crng_init_wait); wake_up_interruptible(&crng_init_wait);
kill_fasync(&fasync, SIGIO, POLL_IN); kill_fasync(&fasync, SIGIO, POLL_IN);
pr_notice("crng init done\n"); pr_notice("crng init done\n");
@@ -870,8 +870,8 @@ void __init random_init(void)
/* /*
* If we were initialized by the cpu or bootloader before jump labels * If we were initialized by the cpu or bootloader before jump labels
* are initialized, then we should enable the static branch here, where * or workqueues are initialized, then we should enable the static
* it's guaranteed that jump labels have been initialized. * branch here, where it's guaranteed that these have been initialized.
*/ */
if (!static_branch_likely(&crng_is_ready) && crng_init >= CRNG_READY) if (!static_branch_likely(&crng_is_ready) && crng_init >= CRNG_READY)
crng_set_ready(NULL); crng_set_ready(NULL);

201
drivers/clk/clk.c
View File

@@ -37,6 +37,10 @@ static HLIST_HEAD(clk_root_list);
static HLIST_HEAD(clk_orphan_list); static HLIST_HEAD(clk_orphan_list);
static LIST_HEAD(clk_notifier_list); static LIST_HEAD(clk_notifier_list);
/* List of registered clks that use runtime PM */
static HLIST_HEAD(clk_rpm_list);
static DEFINE_MUTEX(clk_rpm_list_lock);
static const struct hlist_head *all_lists[] = { static const struct hlist_head *all_lists[] = {
&clk_root_list, &clk_root_list,
&clk_orphan_list, &clk_orphan_list,
@@ -59,6 +63,7 @@ struct clk_core {
struct clk_hw *hw; struct clk_hw *hw;
struct module *owner; struct module *owner;
struct device *dev; struct device *dev;
struct hlist_node rpm_node;
struct device_node *of_node; struct device_node *of_node;
struct clk_core *parent; struct clk_core *parent;
struct clk_parent_map *parents; struct clk_parent_map *parents;
@@ -124,6 +129,89 @@ static void clk_pm_runtime_put(struct clk_core *core)
pm_runtime_put_sync(core->dev); pm_runtime_put_sync(core->dev);
} }
/**
* clk_pm_runtime_get_all() - Runtime "get" all clk provider devices
*
* Call clk_pm_runtime_get() on all runtime PM enabled clks in the clk tree so
* that disabling unused clks avoids a deadlock where a device is runtime PM
* resuming/suspending and the runtime PM callback is trying to grab the
* prepare_lock for something like clk_prepare_enable() while
* clk_disable_unused_subtree() holds the prepare_lock and is trying to runtime
* PM resume/suspend the device as well.
*
* Context: Acquires the 'clk_rpm_list_lock' and returns with the lock held on
* success. Otherwise the lock is released on failure.
*
* Return: 0 on success, negative errno otherwise.
*/
static int clk_pm_runtime_get_all(void)
{
int ret;
struct clk_core *core, *failed;
/*
* Grab the list lock to prevent any new clks from being registered
* or unregistered until clk_pm_runtime_put_all().
*/
mutex_lock(&clk_rpm_list_lock);
/*
* Runtime PM "get" all the devices that are needed for the clks
* currently registered. Do this without holding the prepare_lock, to
* avoid the deadlock.
*/
hlist_for_each_entry(core, &clk_rpm_list, rpm_node) {
ret = clk_pm_runtime_get(core);
if (ret) {
failed = core;
pr_err("clk: Failed to runtime PM get '%s' for clk '%s'\n",
dev_name(failed->dev), failed->name);
goto err;
}
}
return 0;
err:
hlist_for_each_entry(core, &clk_rpm_list, rpm_node) {
if (core == failed)
break;
clk_pm_runtime_put(core);
}
mutex_unlock(&clk_rpm_list_lock);
return ret;
}
/**
* clk_pm_runtime_put_all() - Runtime "put" all clk provider devices
*
* Put the runtime PM references taken in clk_pm_runtime_get_all() and release
* the 'clk_rpm_list_lock'.
*/
static void clk_pm_runtime_put_all(void)
{
struct clk_core *core;
hlist_for_each_entry(core, &clk_rpm_list, rpm_node)
clk_pm_runtime_put(core);
mutex_unlock(&clk_rpm_list_lock);
}
static void clk_pm_runtime_init(struct clk_core *core)
{
struct device *dev = core->dev;
if (dev && pm_runtime_enabled(dev)) {
core->rpm_enabled = true;
mutex_lock(&clk_rpm_list_lock);
hlist_add_head(&core->rpm_node, &clk_rpm_list);
mutex_unlock(&clk_rpm_list_lock);
}
}
/*** locking ***/ /*** locking ***/
static void clk_prepare_lock(void) static void clk_prepare_lock(void)
{ {
@@ -1316,9 +1404,6 @@ static void __init clk_unprepare_unused_subtree(struct clk_core *core)
if (core->flags & CLK_IGNORE_UNUSED) if (core->flags & CLK_IGNORE_UNUSED)
return; return;
if (clk_pm_runtime_get(core))
return;
if (clk_core_is_prepared(core)) { if (clk_core_is_prepared(core)) {
trace_clk_unprepare(core); trace_clk_unprepare(core);
if (core->ops->unprepare_unused) if (core->ops->unprepare_unused)
@@ -1327,8 +1412,6 @@ static void __init clk_unprepare_unused_subtree(struct clk_core *core)
core->ops->unprepare(core->hw); core->ops->unprepare(core->hw);
trace_clk_unprepare_complete(core); trace_clk_unprepare_complete(core);
} }
clk_pm_runtime_put(core);
} }
static void __init clk_disable_unused_subtree(struct clk_core *core) static void __init clk_disable_unused_subtree(struct clk_core *core)
@@ -1348,9 +1431,6 @@ static void __init clk_disable_unused_subtree(struct clk_core *core)
if (core->flags & CLK_OPS_PARENT_ENABLE) if (core->flags & CLK_OPS_PARENT_ENABLE)
clk_core_prepare_enable(core->parent); clk_core_prepare_enable(core->parent);
if (clk_pm_runtime_get(core))
goto unprepare_out;
flags = clk_enable_lock(); flags = clk_enable_lock();
if (core->enable_count) if (core->enable_count)
@@ -1375,8 +1455,6 @@ static void __init clk_disable_unused_subtree(struct clk_core *core)
unlock_out: unlock_out:
clk_enable_unlock(flags); clk_enable_unlock(flags);
clk_pm_runtime_put(core);
unprepare_out:
if (core->flags & CLK_OPS_PARENT_ENABLE) if (core->flags & CLK_OPS_PARENT_ENABLE)
clk_core_disable_unprepare(core->parent); clk_core_disable_unprepare(core->parent);
} }
@@ -1392,12 +1470,22 @@ __setup("clk_ignore_unused", clk_ignore_unused_setup);
static int __init clk_disable_unused(void) static int __init clk_disable_unused(void)
{ {
struct clk_core *core; struct clk_core *core;
int ret;
if (clk_ignore_unused) { if (clk_ignore_unused) {
pr_warn("clk: Not disabling unused clocks\n"); pr_warn("clk: Not disabling unused clocks\n");
return 0; return 0;
} }
pr_info("clk: Disabling unused clocks\n");
ret = clk_pm_runtime_get_all();
if (ret)
return ret;
/*
* Grab the prepare lock to keep the clk topology stable while iterating
* over clks.
*/
clk_prepare_lock(); clk_prepare_lock();
hlist_for_each_entry(core, &clk_root_list, child_node) hlist_for_each_entry(core, &clk_root_list, child_node)
@@ -1414,6 +1502,8 @@ static int __init clk_disable_unused(void)
clk_prepare_unlock(); clk_prepare_unlock();
clk_pm_runtime_put_all();
return 0; return 0;
} }
late_initcall_sync(clk_disable_unused); late_initcall_sync(clk_disable_unused);
@@ -3194,28 +3284,41 @@ static void clk_summary_show_one(struct seq_file *s, struct clk_core *c,
int level) int level)
{ {
int phase; int phase;
struct clk *clk_user;
int multi_node = 0;
seq_printf(s, "%*s%-*s %7d %8d %8d %11lu %10lu ", seq_printf(s, "%*s%-*s %-7d %-8d %-8d %-11lu %-10lu ",
level * 3 + 1, "", level * 3 + 1, "",
30 - level * 3, c->name, 35 - level * 3, c->name,
c->enable_count, c->prepare_count, c->protect_count, c->enable_count, c->prepare_count, c->protect_count,
clk_core_get_rate_recalc(c), clk_core_get_rate_recalc(c),
clk_core_get_accuracy_recalc(c)); clk_core_get_accuracy_recalc(c));
phase = clk_core_get_phase(c); phase = clk_core_get_phase(c);
if (phase >= 0) if (phase >= 0)
seq_printf(s, "%5d", phase); seq_printf(s, "%-5d", phase);
else else
seq_puts(s, "-----"); seq_puts(s, "-----");
seq_printf(s, " %6d", clk_core_get_scaled_duty_cycle(c, 100000)); seq_printf(s, " %-6d", clk_core_get_scaled_duty_cycle(c, 100000));
if (c->ops->is_enabled) if (c->ops->is_enabled)
seq_printf(s, " %9c\n", clk_core_is_enabled(c) ? 'Y' : 'N'); seq_printf(s, " %5c ", clk_core_is_enabled(c) ? 'Y' : 'N');
else if (!c->ops->enable) else if (!c->ops->enable)
seq_printf(s, " %9c\n", 'Y'); seq_printf(s, " %5c ", 'Y');
else else
seq_printf(s, " %9c\n", '?'); seq_printf(s, " %5c ", '?');
hlist_for_each_entry(clk_user, &c->clks, clks_node) {
seq_printf(s, "%*s%-*s %-25s\n",
level * 3 + 2 + 105 * multi_node, "",
30,
clk_user->dev_id ? clk_user->dev_id : "deviceless",
clk_user->con_id ? clk_user->con_id : "no_connection_id");
multi_node = 1;
}
} }
static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c, static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c,
@@ -3223,9 +3326,7 @@ static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c,
{ {
struct clk_core *child; struct clk_core *child;
clk_pm_runtime_get(c);
clk_summary_show_one(s, c, level); clk_summary_show_one(s, c, level);
clk_pm_runtime_put(c);
hlist_for_each_entry(child, &c->children, child_node) hlist_for_each_entry(child, &c->children, child_node)
clk_summary_show_subtree(s, child, level + 1); clk_summary_show_subtree(s, child, level + 1);
@@ -3234,11 +3335,16 @@ static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c,
static int clk_summary_show(struct seq_file *s, void *data) static int clk_summary_show(struct seq_file *s, void *data)
{ {
struct clk_core *c; struct clk_core *c;
struct hlist_head **lists = (struct hlist_head **)s->private; struct hlist_head **lists = s->private;
int ret;
seq_puts(s, " enable prepare protect duty hardware\n"); seq_puts(s, " enable prepare protect duty hardware connection\n");
seq_puts(s, " clock count count count rate accuracy phase cycle enable\n"); seq_puts(s, " clock count count count rate accuracy phase cycle enable consumer id\n");
seq_puts(s, "-------------------------------------------------------------------------------------------------------\n"); seq_puts(s, "---------------------------------------------------------------------------------------------------------------------------------------------\n");
ret = clk_pm_runtime_get_all();
if (ret)
return ret;
clk_prepare_lock(); clk_prepare_lock();
@@ -3247,6 +3353,7 @@ static int clk_summary_show(struct seq_file *s, void *data)
clk_summary_show_subtree(s, c, 0); clk_summary_show_subtree(s, c, 0);
clk_prepare_unlock(); clk_prepare_unlock();
clk_pm_runtime_put_all();
return 0; return 0;
} }
@@ -3293,9 +3400,15 @@ static int clk_dump_show(struct seq_file *s, void *data)
{ {
struct clk_core *c; struct clk_core *c;
bool first_node = true; bool first_node = true;
struct hlist_head **lists = (struct hlist_head **)s->private; struct hlist_head **lists = s->private;
int ret;
ret = clk_pm_runtime_get_all();
if (ret)
return ret;
seq_putc(s, '{'); seq_putc(s, '{');
clk_prepare_lock(); clk_prepare_lock();
for (; *lists; lists++) { for (; *lists; lists++) {
@@ -3308,6 +3421,7 @@ static int clk_dump_show(struct seq_file *s, void *data)
} }
clk_prepare_unlock(); clk_prepare_unlock();
clk_pm_runtime_put_all();
seq_puts(s, "}\n"); seq_puts(s, "}\n");
return 0; return 0;
@@ -3901,8 +4015,6 @@ static int __clk_core_init(struct clk_core *core)
clk_core_hold_state(core); clk_core_hold_state(core);
clk_core_reparent_orphans_nolock(); clk_core_reparent_orphans_nolock();
kref_init(&core->ref);
out: out:
clk_pm_runtime_put(core); clk_pm_runtime_put(core);
unlock: unlock:
@@ -4131,6 +4243,22 @@ static void clk_core_free_parent_map(struct clk_core *core)
kfree(core->parents); kfree(core->parents);
} }
/* Free memory allocated for a struct clk_core */
static void __clk_release(struct kref *ref)
{
struct clk_core *core = container_of(ref, struct clk_core, ref);
if (core->rpm_enabled) {
mutex_lock(&clk_rpm_list_lock);
hlist_del(&core->rpm_node);
mutex_unlock(&clk_rpm_list_lock);
}
clk_core_free_parent_map(core);
kfree_const(core->name);
kfree(core);
}
static struct clk * static struct clk *
__clk_register(struct device *dev, struct device_node *np, struct clk_hw *hw) __clk_register(struct device *dev, struct device_node *np, struct clk_hw *hw)
{ {
@@ -4151,6 +4279,8 @@ __clk_register(struct device *dev, struct device_node *np, struct clk_hw *hw)
goto fail_out; goto fail_out;
} }
kref_init(&core->ref);
core->name = kstrdup_const(init->name, GFP_KERNEL); core->name = kstrdup_const(init->name, GFP_KERNEL);
if (!core->name) { if (!core->name) {
ret = -ENOMEM; ret = -ENOMEM;
@@ -4163,9 +4293,8 @@ __clk_register(struct device *dev, struct device_node *np, struct clk_hw *hw)
} }
core->ops = init->ops; core->ops = init->ops;
if (dev && pm_runtime_enabled(dev))
core->rpm_enabled = true;
core->dev = dev; core->dev = dev;
clk_pm_runtime_init(core);
core->of_node = np; core->of_node = np;
if (dev && dev->driver) if (dev && dev->driver)
core->owner = dev->driver->owner; core->owner = dev->driver->owner;
@@ -4205,12 +4334,10 @@ __clk_register(struct device *dev, struct device_node *np, struct clk_hw *hw)
hw->clk = NULL; hw->clk = NULL;
fail_create_clk: fail_create_clk:
clk_core_free_parent_map(core);
fail_parents: fail_parents:
fail_ops: fail_ops:
kfree_const(core->name);
fail_name: fail_name:
kfree(core); kref_put(&core->ref, __clk_release);
fail_out: fail_out:
return ERR_PTR(ret); return ERR_PTR(ret);
} }
@@ -4290,18 +4417,6 @@ int of_clk_hw_register(struct device_node *node, struct clk_hw *hw)
} }
EXPORT_SYMBOL_GPL(of_clk_hw_register); EXPORT_SYMBOL_GPL(of_clk_hw_register);
/* Free memory allocated for a clock. */
static void __clk_release(struct kref *ref)
{
struct clk_core *core = container_of(ref, struct clk_core, ref);
lockdep_assert_held(&prepare_lock);
clk_core_free_parent_map(core);
kfree_const(core->name);
kfree(core);
}
/* /*
* Empty clk_ops for unregistered clocks. These are used temporarily * Empty clk_ops for unregistered clocks. These are used temporarily
* after clk_unregister() was called on a clock and until last clock * after clk_unregister() was called on a clock and until last clock

23
drivers/clk/mediatek/clk-gate.c
View File

@@ -152,12 +152,12 @@ const struct clk_ops mtk_clk_gate_ops_no_setclr_inv = {
}; };
EXPORT_SYMBOL_GPL(mtk_clk_gate_ops_no_setclr_inv); EXPORT_SYMBOL_GPL(mtk_clk_gate_ops_no_setclr_inv);
static struct clk_hw *mtk_clk_register_gate(const char *name, static struct clk_hw *mtk_clk_register_gate(struct device *dev, const char *name,
const char *parent_name, const char *parent_name,
struct regmap *regmap, int set_ofs, struct regmap *regmap, int set_ofs,
int clr_ofs, int sta_ofs, u8 bit, int clr_ofs, int sta_ofs, u8 bit,
const struct clk_ops *ops, const struct clk_ops *ops,
unsigned long flags, struct device *dev) unsigned long flags)
{ {
struct mtk_clk_gate *cg; struct mtk_clk_gate *cg;
int ret; int ret;
@@ -202,10 +202,9 @@ static void mtk_clk_unregister_gate(struct clk_hw *hw)
kfree(cg); kfree(cg);
} }
int mtk_clk_register_gates_with_dev(struct device_node *node, int mtk_clk_register_gates(struct device *dev, struct device_node *node,
const struct mtk_gate *clks, int num, const struct mtk_gate *clks, int num,
struct clk_hw_onecell_data *clk_data, struct clk_hw_onecell_data *clk_data)
struct device *dev)
{ {
int i; int i;
struct clk_hw *hw; struct clk_hw *hw;
@@ -229,13 +228,13 @@ int mtk_clk_register_gates_with_dev(struct device_node *node,
continue; continue;
} }
hw = mtk_clk_register_gate(gate->name, gate->parent_name, hw = mtk_clk_register_gate(dev, gate->name, gate->parent_name,
regmap, regmap,
gate->regs->set_ofs, gate->regs->set_ofs,
gate->regs->clr_ofs, gate->regs->clr_ofs,
gate->regs->sta_ofs, gate->regs->sta_ofs,
gate->shift, gate->ops, gate->shift, gate->ops,
gate->flags, dev); gate->flags);
if (IS_ERR(hw)) { if (IS_ERR(hw)) {
pr_err("Failed to register clk %s: %pe\n", gate->name, pr_err("Failed to register clk %s: %pe\n", gate->name,
@@ -261,14 +260,6 @@ err:
return PTR_ERR(hw); return PTR_ERR(hw);
} }
EXPORT_SYMBOL_GPL(mtk_clk_register_gates_with_dev);
int mtk_clk_register_gates(struct device_node *node,
const struct mtk_gate *clks, int num,
struct clk_hw_onecell_data *clk_data)
{
return mtk_clk_register_gates_with_dev(node, clks, num, clk_data, NULL);
}
EXPORT_SYMBOL_GPL(mtk_clk_register_gates); EXPORT_SYMBOL_GPL(mtk_clk_register_gates);
void mtk_clk_unregister_gates(const struct mtk_gate *clks, int num, void mtk_clk_unregister_gates(const struct mtk_gate *clks, int num,

7
drivers/clk/mediatek/clk-gate.h
View File

@@ -50,15 +50,10 @@ struct mtk_gate {
#define GATE_MTK(_id, _name, _parent, _regs, _shift, _ops) \ #define GATE_MTK(_id, _name, _parent, _regs, _shift, _ops) \
GATE_MTK_FLAGS(_id, _name, _parent, _regs, _shift, _ops, 0) GATE_MTK_FLAGS(_id, _name, _parent, _regs, _shift, _ops, 0)
int mtk_clk_register_gates(struct device_node *node, int mtk_clk_register_gates(struct device *dev, struct device_node *node,
const struct mtk_gate *clks, int num, const struct mtk_gate *clks, int num,
struct clk_hw_onecell_data *clk_data); struct clk_hw_onecell_data *clk_data);
int mtk_clk_register_gates_with_dev(struct device_node *node,
const struct mtk_gate *clks, int num,
struct clk_hw_onecell_data *clk_data,
struct device *dev);
void mtk_clk_unregister_gates(const struct mtk_gate *clks, int num, void mtk_clk_unregister_gates(const struct mtk_gate *clks, int num,
struct clk_hw_onecell_data *clk_data); struct clk_hw_onecell_data *clk_data);

4
drivers/clk/mediatek/clk-mt2701-aud.c
View File

@@ -127,8 +127,8 @@ static int clk_mt2701_aud_probe(struct platform_device *pdev)
clk_data = mtk_alloc_clk_data(CLK_AUD_NR); clk_data = mtk_alloc_clk_data(CLK_AUD_NR);
mtk_clk_register_gates(node, audio_clks, ARRAY_SIZE(audio_clks), mtk_clk_register_gates(&pdev->dev, node, audio_clks,
clk_data); ARRAY_SIZE(audio_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) { if (r) {

4
drivers/clk/mediatek/clk-mt2701-eth.c
View File

@@ -51,8 +51,8 @@ static int clk_mt2701_eth_probe(struct platform_device *pdev)
clk_data = mtk_alloc_clk_data(CLK_ETHSYS_NR); clk_data = mtk_alloc_clk_data(CLK_ETHSYS_NR);
mtk_clk_register_gates(node, eth_clks, ARRAY_SIZE(eth_clks), mtk_clk_register_gates(&pdev->dev, node, eth_clks,
clk_data); ARRAY_SIZE(eth_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) if (r)

2
drivers/clk/mediatek/clk-mt2701-g3d.c
View File

@@ -45,7 +45,7 @@ static int clk_mt2701_g3dsys_init(struct platform_device *pdev)
clk_data = mtk_alloc_clk_data(CLK_G3DSYS_NR); clk_data = mtk_alloc_clk_data(CLK_G3DSYS_NR);
mtk_clk_register_gates(node, g3d_clks, ARRAY_SIZE(g3d_clks), mtk_clk_register_gates(&pdev->dev, node, g3d_clks, ARRAY_SIZE(g3d_clks),
clk_data); clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);

4
drivers/clk/mediatek/clk-mt2701-hif.c
View File

@@ -48,8 +48,8 @@ static int clk_mt2701_hif_probe(struct platform_device *pdev)
clk_data = mtk_alloc_clk_data(CLK_HIFSYS_NR); clk_data = mtk_alloc_clk_data(CLK_HIFSYS_NR);
mtk_clk_register_gates(node, hif_clks, ARRAY_SIZE(hif_clks), mtk_clk_register_gates(&pdev->dev, node, hif_clks,
clk_data); ARRAY_SIZE(hif_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) { if (r) {

4
drivers/clk/mediatek/clk-mt2701-mm.c
View File

@@ -76,8 +76,8 @@ static int clk_mt2701_mm_probe(struct platform_device *pdev)
clk_data = mtk_alloc_clk_data(CLK_MM_NR); clk_data = mtk_alloc_clk_data(CLK_MM_NR);
mtk_clk_register_gates(node, mm_clks, ARRAY_SIZE(mm_clks), mtk_clk_register_gates(&pdev->dev, node, mm_clks,
clk_data); ARRAY_SIZE(mm_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) if (r)

22
drivers/clk/mediatek/clk-mt2701.c
View File

@@ -679,14 +679,15 @@ static int mtk_topckgen_init(struct platform_device *pdev)
mtk_clk_register_factors(top_fixed_divs, ARRAY_SIZE(top_fixed_divs), mtk_clk_register_factors(top_fixed_divs, ARRAY_SIZE(top_fixed_divs),
clk_data); clk_data);
mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), mtk_clk_register_composites(&pdev->dev, top_muxes,
base, &mt2701_clk_lock, clk_data); ARRAY_SIZE(top_muxes), base,
&mt2701_clk_lock, clk_data);
mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs), mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs),
base, &mt2701_clk_lock, clk_data); base, &mt2701_clk_lock, clk_data);
mtk_clk_register_gates(node, top_clks, ARRAY_SIZE(top_clks), mtk_clk_register_gates(&pdev->dev, node, top_clks,
clk_data); ARRAY_SIZE(top_clks), clk_data);
return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
} }
@@ -789,8 +790,8 @@ static int mtk_infrasys_init(struct platform_device *pdev)
} }
} }
mtk_clk_register_gates(node, infra_clks, ARRAY_SIZE(infra_clks), mtk_clk_register_gates(&pdev->dev, node, infra_clks,
infra_clk_data); ARRAY_SIZE(infra_clks), infra_clk_data);
mtk_clk_register_factors(infra_fixed_divs, ARRAY_SIZE(infra_fixed_divs), mtk_clk_register_factors(infra_fixed_divs, ARRAY_SIZE(infra_fixed_divs),
infra_clk_data); infra_clk_data);
@@ -902,11 +903,12 @@ static int mtk_pericfg_init(struct platform_device *pdev)
if (!clk_data) if (!clk_data)
return -ENOMEM; return -ENOMEM;
mtk_clk_register_gates(node, peri_clks, ARRAY_SIZE(peri_clks), mtk_clk_register_gates(&pdev->dev, node, peri_clks,
clk_data); ARRAY_SIZE(peri_clks), clk_data);
mtk_clk_register_composites(peri_muxs, ARRAY_SIZE(peri_muxs), base, mtk_clk_register_composites(&pdev->dev, peri_muxs,
&mt2701_clk_lock, clk_data); ARRAY_SIZE(peri_muxs), base,
&mt2701_clk_lock, clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) if (r)

4
drivers/clk/mediatek/clk-mt2712-mm.c
View File

@@ -117,8 +117,8 @@ static int clk_mt2712_mm_probe(struct platform_device *pdev)
clk_data = mtk_alloc_clk_data(CLK_MM_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_MM_NR_CLK);
mtk_clk_register_gates(node, mm_clks, ARRAY_SIZE(mm_clks), mtk_clk_register_gates(&pdev->dev, node, mm_clks,
clk_data); ARRAY_SIZE(mm_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);

24
drivers/clk/mediatek/clk-mt2712.c
View File

@@ -1320,12 +1320,13 @@ static int clk_mt2712_top_probe(struct platform_device *pdev)
mtk_clk_register_factors(top_early_divs, ARRAY_SIZE(top_early_divs), mtk_clk_register_factors(top_early_divs, ARRAY_SIZE(top_early_divs),
top_clk_data); top_clk_data);
mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), top_clk_data); mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), top_clk_data);
mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), base, mtk_clk_register_composites(&pdev->dev, top_muxes,
&mt2712_clk_lock, top_clk_data); ARRAY_SIZE(top_muxes), base,
&mt2712_clk_lock, top_clk_data);
mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs), base, mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs), base,
&mt2712_clk_lock, top_clk_data); &mt2712_clk_lock, top_clk_data);
mtk_clk_register_gates(node, top_clks, ARRAY_SIZE(top_clks), mtk_clk_register_gates(&pdev->dev, node, top_clks,
top_clk_data); ARRAY_SIZE(top_clks), top_clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, top_clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, top_clk_data);
@@ -1344,8 +1345,8 @@ static int clk_mt2712_infra_probe(struct platform_device *pdev)
clk_data = mtk_alloc_clk_data(CLK_INFRA_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_INFRA_NR_CLK);
mtk_clk_register_gates(node, infra_clks, ARRAY_SIZE(infra_clks), mtk_clk_register_gates(&pdev->dev, node, infra_clks,
clk_data); ARRAY_SIZE(infra_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
@@ -1366,8 +1367,8 @@ static int clk_mt2712_peri_probe(struct platform_device *pdev)
clk_data = mtk_alloc_clk_data(CLK_PERI_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_PERI_NR_CLK);
mtk_clk_register_gates(node, peri_clks, ARRAY_SIZE(peri_clks), mtk_clk_register_gates(&pdev->dev, node, peri_clks,
clk_data); ARRAY_SIZE(peri_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
@@ -1395,8 +1396,11 @@ static int clk_mt2712_mcu_probe(struct platform_device *pdev)
clk_data = mtk_alloc_clk_data(CLK_MCU_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_MCU_NR_CLK);
mtk_clk_register_composites(mcu_muxes, ARRAY_SIZE(mcu_muxes), base, r = mtk_clk_register_composites(&pdev->dev, mcu_muxes,
&mt2712_clk_lock, clk_data); ARRAY_SIZE(mcu_muxes), base,
&mt2712_clk_lock, clk_data);
if (r)
dev_err(&pdev->dev, "Could not register composites: %d\n", r);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);

13
drivers/clk/mediatek/clk-mt6765.c
View File

@@ -743,7 +743,7 @@ static int clk_mt6765_apmixed_probe(struct platform_device *pdev)
mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data); mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data);
mtk_clk_register_gates(node, apmixed_clks, mtk_clk_register_gates(&pdev->dev, node, apmixed_clks,
ARRAY_SIZE(apmixed_clks), clk_data); ARRAY_SIZE(apmixed_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
@@ -782,10 +782,11 @@ static int clk_mt6765_top_probe(struct platform_device *pdev)
clk_data); clk_data);
mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs),
clk_data); clk_data);
mtk_clk_register_muxes(top_muxes, ARRAY_SIZE(top_muxes), node, mtk_clk_register_muxes(&pdev->dev, top_muxes,
ARRAY_SIZE(top_muxes), node,
&mt6765_clk_lock, clk_data); &mt6765_clk_lock, clk_data);
mtk_clk_register_gates(node, top_clks, ARRAY_SIZE(top_clks), mtk_clk_register_gates(&pdev->dev, node, top_clks,
clk_data); ARRAY_SIZE(top_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
@@ -820,8 +821,8 @@ static int clk_mt6765_ifr_probe(struct platform_device *pdev)
if (!clk_data) if (!clk_data)
return -ENOMEM; return -ENOMEM;
mtk_clk_register_gates(node, ifr_clks, ARRAY_SIZE(ifr_clks), mtk_clk_register_gates(&pdev->dev, node, ifr_clks,
clk_data); ARRAY_SIZE(ifr_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) if (r)

4
drivers/clk/mediatek/clk-mt6779-mm.c
View File

@@ -93,8 +93,8 @@ static int clk_mt6779_mm_probe(struct platform_device *pdev)
clk_data = mtk_alloc_clk_data(CLK_MM_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_MM_NR_CLK);
mtk_clk_register_gates(node, mm_clks, ARRAY_SIZE(mm_clks), mtk_clk_register_gates(&pdev->dev, node, mm_clks,
clk_data); ARRAY_SIZE(mm_clks), clk_data);
return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
} }

21
drivers/clk/mediatek/clk-mt6779.c
View File

@@ -1223,7 +1223,7 @@ static int clk_mt6779_apmixed_probe(struct platform_device *pdev)
mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data); mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data);
mtk_clk_register_gates(node, apmixed_clks, mtk_clk_register_gates(&pdev->dev, node, apmixed_clks,
ARRAY_SIZE(apmixed_clks), clk_data); ARRAY_SIZE(apmixed_clks), clk_data);
return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
@@ -1248,14 +1248,17 @@ static int clk_mt6779_top_probe(struct platform_device *pdev)
mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), clk_data); mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), clk_data);
mtk_clk_register_muxes(top_muxes, ARRAY_SIZE(top_muxes), mtk_clk_register_muxes(&pdev->dev, top_muxes,
node, &mt6779_clk_lock, clk_data); ARRAY_SIZE(top_muxes), node,
&mt6779_clk_lock, clk_data);
mtk_clk_register_composites(top_aud_muxes, ARRAY_SIZE(top_aud_muxes), mtk_clk_register_composites(&pdev->dev, top_aud_muxes,
base, &mt6779_clk_lock, clk_data); ARRAY_SIZE(top_aud_muxes), base,
&mt6779_clk_lock, clk_data);
mtk_clk_register_composites(top_aud_divs, ARRAY_SIZE(top_aud_divs), mtk_clk_register_composites(&pdev->dev, top_aud_divs,
base, &mt6779_clk_lock, clk_data); ARRAY_SIZE(top_aud_divs), base,
&mt6779_clk_lock, clk_data);
return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
} }
@@ -1267,8 +1270,8 @@ static int clk_mt6779_infra_probe(struct platform_device *pdev)
clk_data = mtk_alloc_clk_data(CLK_INFRA_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_INFRA_NR_CLK);
mtk_clk_register_gates(node, infra_clks, ARRAY_SIZE(infra_clks), mtk_clk_register_gates(&pdev->dev, node, infra_clks,
clk_data); ARRAY_SIZE(infra_clks), clk_data);
return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
} }

3
drivers/clk/mediatek/clk-mt6795-infracfg.c
View File

@@ -101,7 +101,8 @@ static int clk_mt6795_infracfg_probe(struct platform_device *pdev)
if (ret) if (ret)
goto free_clk_data; goto free_clk_data;
ret = mtk_clk_register_gates(node, infra_gates, ARRAY_SIZE(infra_gates), clk_data); ret = mtk_clk_register_gates(&pdev->dev, node, infra_gates,
ARRAY_SIZE(infra_gates), clk_data);
if (ret) if (ret)
goto free_clk_data; goto free_clk_data;

3
drivers/clk/mediatek/clk-mt6795-mm.c
View File

@@ -87,7 +87,8 @@ static int clk_mt6795_mm_probe(struct platform_device *pdev)
if (!clk_data) if (!clk_data)
return -ENOMEM; return -ENOMEM;
ret = mtk_clk_register_gates(node, mm_gates, ARRAY_SIZE(mm_gates), clk_data); ret = mtk_clk_register_gates(&pdev->dev, node, mm_gates,
ARRAY_SIZE(mm_gates), clk_data);
if (ret) if (ret)
goto free_clk_data; goto free_clk_data;

6
drivers/clk/mediatek/clk-mt6795-pericfg.c
View File

@@ -109,11 +109,13 @@ static int clk_mt6795_pericfg_probe(struct platform_device *pdev)
if (ret) if (ret)
goto free_clk_data; goto free_clk_data;
ret = mtk_clk_register_gates(node, peri_gates, ARRAY_SIZE(peri_gates), clk_data); ret = mtk_clk_register_gates(&pdev->dev, node, peri_gates,
ARRAY_SIZE(peri_gates), clk_data);
if (ret) if (ret)
goto free_clk_data; goto free_clk_data;
ret = mtk_clk_register_composites(peri_clks, ARRAY_SIZE(peri_clks), base, ret = mtk_clk_register_composites(&pdev->dev, peri_clks,
ARRAY_SIZE(peri_clks), base,
&mt6795_peri_clk_lock, clk_data); &mt6795_peri_clk_lock, clk_data);
if (ret) if (ret)
goto unregister_gates; goto unregister_gates;

6
drivers/clk/mediatek/clk-mt6795-topckgen.c
View File

@@ -552,12 +552,14 @@ static int clk_mt6795_topckgen_probe(struct platform_device *pdev)
if (ret) if (ret)
goto unregister_fixed_clks; goto unregister_fixed_clks;
ret = mtk_clk_register_muxes(top_muxes, ARRAY_SIZE(top_muxes), node, ret = mtk_clk_register_muxes(&pdev->dev, top_muxes,
ARRAY_SIZE(top_muxes), node,
&mt6795_top_clk_lock, clk_data); &mt6795_top_clk_lock, clk_data);
if (ret) if (ret)
goto unregister_factors; goto unregister_factors;
ret = mtk_clk_register_composites(top_aud_divs, ARRAY_SIZE(top_aud_divs), base, ret = mtk_clk_register_composites(&pdev->dev, top_aud_divs,
ARRAY_SIZE(top_aud_divs), base,
&mt6795_top_clk_lock, clk_data); &mt6795_top_clk_lock, clk_data);
if (ret) if (ret)
goto unregister_muxes; goto unregister_muxes;

4
drivers/clk/mediatek/clk-mt6797-mm.c
View File

@@ -89,8 +89,8 @@ static int clk_mt6797_mm_probe(struct platform_device *pdev)
clk_data = mtk_alloc_clk_data(CLK_MM_NR); clk_data = mtk_alloc_clk_data(CLK_MM_NR);
mtk_clk_register_gates(node, mm_clks, ARRAY_SIZE(mm_clks), mtk_clk_register_gates(&pdev->dev, node, mm_clks,
clk_data); ARRAY_SIZE(mm_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) if (r)

7
drivers/clk/mediatek/clk-mt6797.c
View File

@@ -398,7 +398,8 @@ static int mtk_topckgen_init(struct platform_device *pdev)
mtk_clk_register_factors(top_fixed_divs, ARRAY_SIZE(top_fixed_divs), mtk_clk_register_factors(top_fixed_divs, ARRAY_SIZE(top_fixed_divs),
clk_data); clk_data);
mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), base, mtk_clk_register_composites(&pdev->dev, top_muxes,
ARRAY_SIZE(top_muxes), base,
&mt6797_clk_lock, clk_data); &mt6797_clk_lock, clk_data);
return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
@@ -584,8 +585,8 @@ static int mtk_infrasys_init(struct platform_device *pdev)
} }
} }
mtk_clk_register_gates(node, infra_clks, ARRAY_SIZE(infra_clks), mtk_clk_register_gates(&pdev->dev, node, infra_clks,
infra_clk_data); ARRAY_SIZE(infra_clks), infra_clk_data);
mtk_clk_register_factors(infra_fixed_divs, ARRAY_SIZE(infra_fixed_divs), mtk_clk_register_factors(infra_fixed_divs, ARRAY_SIZE(infra_fixed_divs),
infra_clk_data); infra_clk_data);

4
drivers/clk/mediatek/clk-mt7622-aud.c
View File

@@ -114,8 +114,8 @@ static int clk_mt7622_audiosys_init(struct platform_device *pdev)
clk_data = mtk_alloc_clk_data(CLK_AUDIO_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_AUDIO_NR_CLK);
mtk_clk_register_gates(node, audio_clks, ARRAY_SIZE(audio_clks), mtk_clk_register_gates(&pdev->dev, node, audio_clks,
clk_data); ARRAY_SIZE(audio_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) { if (r) {

8
drivers/clk/mediatek/clk-mt7622-eth.c
View File

@@ -69,8 +69,8 @@ static int clk_mt7622_ethsys_init(struct platform_device *pdev)
clk_data = mtk_alloc_clk_data(CLK_ETH_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_ETH_NR_CLK);
mtk_clk_register_gates(node, eth_clks, ARRAY_SIZE(eth_clks), mtk_clk_register_gates(&pdev->dev, node, eth_clks,
clk_data); ARRAY_SIZE(eth_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) if (r)
@@ -91,8 +91,8 @@ static int clk_mt7622_sgmiisys_init(struct platform_device *pdev)
clk_data = mtk_alloc_clk_data(CLK_SGMII_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_SGMII_NR_CLK);
mtk_clk_register_gates(node, sgmii_clks, ARRAY_SIZE(sgmii_clks), mtk_clk_register_gates(&pdev->dev, node, sgmii_clks,
clk_data); ARRAY_SIZE(sgmii_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) if (r)

8
drivers/clk/mediatek/clk-mt7622-hif.c
View File

@@ -80,8 +80,8 @@ static int clk_mt7622_ssusbsys_init(struct platform_device *pdev)
clk_data = mtk_alloc_clk_data(CLK_SSUSB_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_SSUSB_NR_CLK);
mtk_clk_register_gates(node, ssusb_clks, ARRAY_SIZE(ssusb_clks), mtk_clk_register_gates(&pdev->dev, node, ssusb_clks,
clk_data); ARRAY_SIZE(ssusb_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) if (r)
@@ -102,8 +102,8 @@ static int clk_mt7622_pciesys_init(struct platform_device *pdev)
clk_data = mtk_alloc_clk_data(CLK_PCIE_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_PCIE_NR_CLK);
mtk_clk_register_gates(node, pcie_clks, ARRAY_SIZE(pcie_clks), mtk_clk_register_gates(&pdev->dev, node, pcie_clks,
clk_data); ARRAY_SIZE(pcie_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) if (r)

22
drivers/clk/mediatek/clk-mt7622.c
View File

@@ -615,14 +615,15 @@ static int mtk_topckgen_init(struct platform_device *pdev)
mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs),
clk_data); clk_data);
mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), mtk_clk_register_composites(&pdev->dev, top_muxes,
base, &mt7622_clk_lock, clk_data); ARRAY_SIZE(top_muxes), base,
&mt7622_clk_lock, clk_data);
mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs), mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs),
base, &mt7622_clk_lock, clk_data); base, &mt7622_clk_lock, clk_data);
mtk_clk_register_gates(node, top_clks, ARRAY_SIZE(top_clks), mtk_clk_register_gates(&pdev->dev, node, top_clks,
clk_data); ARRAY_SIZE(top_clks), clk_data);
return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
} }
@@ -635,8 +636,8 @@ static int mtk_infrasys_init(struct platform_device *pdev)
clk_data = mtk_alloc_clk_data(CLK_INFRA_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_INFRA_NR_CLK);
mtk_clk_register_gates(node, infra_clks, ARRAY_SIZE(infra_clks), mtk_clk_register_gates(&pdev->dev, node, infra_clks,
clk_data); ARRAY_SIZE(infra_clks), clk_data);
mtk_clk_register_cpumuxes(node, infra_muxes, ARRAY_SIZE(infra_muxes), mtk_clk_register_cpumuxes(node, infra_muxes, ARRAY_SIZE(infra_muxes),
clk_data); clk_data);
@@ -663,7 +664,7 @@ static int mtk_apmixedsys_init(struct platform_device *pdev)
mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls),
clk_data); clk_data);
mtk_clk_register_gates(node, apmixed_clks, mtk_clk_register_gates(&pdev->dev, node, apmixed_clks,
ARRAY_SIZE(apmixed_clks), clk_data); ARRAY_SIZE(apmixed_clks), clk_data);
return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
@@ -682,10 +683,11 @@ static int mtk_pericfg_init(struct platform_device *pdev)
clk_data = mtk_alloc_clk_data(CLK_PERI_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_PERI_NR_CLK);
mtk_clk_register_gates(node, peri_clks, ARRAY_SIZE(peri_clks), mtk_clk_register_gates(&pdev->dev, node, peri_clks,
clk_data); ARRAY_SIZE(peri_clks), clk_data);
mtk_clk_register_composites(peri_muxes, ARRAY_SIZE(peri_muxes), base, mtk_clk_register_composites(&pdev->dev, peri_muxes,
ARRAY_SIZE(peri_muxes), base,
&mt7622_clk_lock, clk_data); &mt7622_clk_lock, clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);

7
drivers/clk/mediatek/clk-mt7629-eth.c
View File

@@ -82,7 +82,8 @@ static int clk_mt7629_ethsys_init(struct platform_device *pdev)
if (!clk_data) if (!clk_data)
return -ENOMEM; return -ENOMEM;
mtk_clk_register_gates(node, eth_clks, CLK_ETH_NR_CLK, clk_data); mtk_clk_register_gates(&pdev->dev, node, eth_clks,
CLK_ETH_NR_CLK, clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) if (r)
@@ -106,8 +107,8 @@ static int clk_mt7629_sgmiisys_init(struct platform_device *pdev)
if (!clk_data) if (!clk_data)
return -ENOMEM; return -ENOMEM;
mtk_clk_register_gates(node, sgmii_clks[id++], CLK_SGMII_NR_CLK, mtk_clk_register_gates(&pdev->dev, node, sgmii_clks[id++],
clk_data); CLK_SGMII_NR_CLK, clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) if (r)

8
drivers/clk/mediatek/clk-mt7629-hif.c
View File

@@ -75,8 +75,8 @@ static int clk_mt7629_ssusbsys_init(struct platform_device *pdev)
clk_data = mtk_alloc_clk_data(CLK_SSUSB_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_SSUSB_NR_CLK);
mtk_clk_register_gates(node, ssusb_clks, ARRAY_SIZE(ssusb_clks), mtk_clk_register_gates(&pdev->dev, node, ssusb_clks,
clk_data); ARRAY_SIZE(ssusb_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) if (r)
@@ -97,8 +97,8 @@ static int clk_mt7629_pciesys_init(struct platform_device *pdev)
clk_data = mtk_alloc_clk_data(CLK_PCIE_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_PCIE_NR_CLK);
mtk_clk_register_gates(node, pcie_clks, ARRAY_SIZE(pcie_clks), mtk_clk_register_gates(&pdev->dev, node, pcie_clks,
clk_data); ARRAY_SIZE(pcie_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) if (r)

18
drivers/clk/mediatek/clk-mt7629.c
View File

@@ -566,8 +566,9 @@ static int mtk_topckgen_init(struct platform_device *pdev)
mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs),
clk_data); clk_data);
mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), mtk_clk_register_composites(&pdev->dev, top_muxes,
base, &mt7629_clk_lock, clk_data); ARRAY_SIZE(top_muxes), base,
&mt7629_clk_lock, clk_data);
clk_prepare_enable(clk_data->hws[CLK_TOP_AXI_SEL]->clk); clk_prepare_enable(clk_data->hws[CLK_TOP_AXI_SEL]->clk);
clk_prepare_enable(clk_data->hws[CLK_TOP_MEM_SEL]->clk); clk_prepare_enable(clk_data->hws[CLK_TOP_MEM_SEL]->clk);
@@ -585,8 +586,8 @@ static int mtk_infrasys_init(struct platform_device *pdev)
if (!clk_data) if (!clk_data)
return -ENOMEM; return -ENOMEM;
mtk_clk_register_gates(node, infra_clks, ARRAY_SIZE(infra_clks), mtk_clk_register_gates(&pdev->dev, node, infra_clks,
clk_data); ARRAY_SIZE(infra_clks), clk_data);
mtk_clk_register_cpumuxes(node, infra_muxes, ARRAY_SIZE(infra_muxes), mtk_clk_register_cpumuxes(node, infra_muxes, ARRAY_SIZE(infra_muxes),
clk_data); clk_data);
@@ -610,10 +611,11 @@ static int mtk_pericfg_init(struct platform_device *pdev)
if (!clk_data) if (!clk_data)
return -ENOMEM; return -ENOMEM;
mtk_clk_register_gates(node, peri_clks, ARRAY_SIZE(peri_clks), mtk_clk_register_gates(&pdev->dev, node, peri_clks,
clk_data); ARRAY_SIZE(peri_clks), clk_data);
mtk_clk_register_composites(peri_muxes, ARRAY_SIZE(peri_muxes), base, mtk_clk_register_composites(&pdev->dev, peri_muxes,
ARRAY_SIZE(peri_muxes), base,
&mt7629_clk_lock, clk_data); &mt7629_clk_lock, clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
@@ -637,7 +639,7 @@ static int mtk_apmixedsys_init(struct platform_device *pdev)
mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls),
clk_data); clk_data);
mtk_clk_register_gates(node, apmixed_clks, mtk_clk_register_gates(&pdev->dev, node, apmixed_clks,
ARRAY_SIZE(apmixed_clks), clk_data); ARRAY_SIZE(apmixed_clks), clk_data);
clk_prepare_enable(clk_data->hws[CLK_APMIXED_ARMPLL]->clk); clk_prepare_enable(clk_data->hws[CLK_APMIXED_ARMPLL]->clk);

10
drivers/clk/mediatek/clk-mt7986-eth.c
View File

@@ -72,8 +72,8 @@ static void __init mtk_sgmiisys_0_init(struct device_node *node)
clk_data = mtk_alloc_clk_data(ARRAY_SIZE(sgmii0_clks)); clk_data = mtk_alloc_clk_data(ARRAY_SIZE(sgmii0_clks));
mtk_clk_register_gates(node, sgmii0_clks, ARRAY_SIZE(sgmii0_clks), mtk_clk_register_gates(NULL, node, sgmii0_clks,
clk_data); ARRAY_SIZE(sgmii0_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) if (r)
@@ -90,8 +90,8 @@ static void __init mtk_sgmiisys_1_init(struct device_node *node)
clk_data = mtk_alloc_clk_data(ARRAY_SIZE(sgmii1_clks)); clk_data = mtk_alloc_clk_data(ARRAY_SIZE(sgmii1_clks));
mtk_clk_register_gates(node, sgmii1_clks, ARRAY_SIZE(sgmii1_clks), mtk_clk_register_gates(NULL, node, sgmii1_clks,
clk_data); ARRAY_SIZE(sgmii1_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
@@ -109,7 +109,7 @@ static void __init mtk_ethsys_init(struct device_node *node)
clk_data = mtk_alloc_clk_data(ARRAY_SIZE(eth_clks)); clk_data = mtk_alloc_clk_data(ARRAY_SIZE(eth_clks));
mtk_clk_register_gates(node, eth_clks, ARRAY_SIZE(eth_clks), clk_data); mtk_clk_register_gates(NULL, node, eth_clks, ARRAY_SIZE(eth_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);

7
drivers/clk/mediatek/clk-mt7986-infracfg.c
View File

@@ -178,10 +178,11 @@ static int clk_mt7986_infracfg_probe(struct platform_device *pdev)
return -ENOMEM; return -ENOMEM;
mtk_clk_register_factors(infra_divs, ARRAY_SIZE(infra_divs), clk_data); mtk_clk_register_factors(infra_divs, ARRAY_SIZE(infra_divs), clk_data);
mtk_clk_register_muxes(infra_muxes, ARRAY_SIZE(infra_muxes), node, mtk_clk_register_muxes(&pdev->dev, infra_muxes,
ARRAY_SIZE(infra_muxes), node,
&mt7986_clk_lock, clk_data); &mt7986_clk_lock, clk_data);
mtk_clk_register_gates(node, infra_clks, ARRAY_SIZE(infra_clks), mtk_clk_register_gates(&pdev->dev, node, infra_clks,
clk_data); ARRAY_SIZE(infra_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) { if (r) {

3
drivers/clk/mediatek/clk-mt7986-topckgen.c
View File

@@ -303,7 +303,8 @@ static int clk_mt7986_topckgen_probe(struct platform_device *pdev)
mtk_clk_register_fixed_clks(top_fixed_clks, ARRAY_SIZE(top_fixed_clks), mtk_clk_register_fixed_clks(top_fixed_clks, ARRAY_SIZE(top_fixed_clks),
clk_data); clk_data);
mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), clk_data); mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), clk_data);
mtk_clk_register_muxes(top_muxes, ARRAY_SIZE(top_muxes), node, mtk_clk_register_muxes(&pdev->dev, top_muxes,
ARRAY_SIZE(top_muxes), node,
&mt7986_clk_lock, clk_data); &mt7986_clk_lock, clk_data);
clk_prepare_enable(clk_data->hws[CLK_TOP_SYSAXI_SEL]->clk); clk_prepare_enable(clk_data->hws[CLK_TOP_SYSAXI_SEL]->clk);

18
drivers/clk/mediatek/clk-mt8135.c
View File

@@ -536,8 +536,9 @@ static void __init mtk_topckgen_init(struct device_node *node)
mtk_clk_register_factors(root_clk_alias, ARRAY_SIZE(root_clk_alias), clk_data); mtk_clk_register_factors(root_clk_alias, ARRAY_SIZE(root_clk_alias), clk_data);
mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), clk_data); mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), clk_data);
mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), base, mtk_clk_register_composites(NULL, top_muxes,
&mt8135_clk_lock, clk_data); ARRAY_SIZE(top_muxes), base,
&mt8135_clk_lock, clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) if (r)
@@ -553,8 +554,8 @@ static void __init mtk_infrasys_init(struct device_node *node)
clk_data = mtk_alloc_clk_data(CLK_INFRA_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_INFRA_NR_CLK);
mtk_clk_register_gates(node, infra_clks, ARRAY_SIZE(infra_clks), mtk_clk_register_gates(NULL, node, infra_clks,
clk_data); ARRAY_SIZE(infra_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) if (r)
@@ -579,10 +580,11 @@ static void __init mtk_pericfg_init(struct device_node *node)
clk_data = mtk_alloc_clk_data(CLK_PERI_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_PERI_NR_CLK);
mtk_clk_register_gates(node, peri_gates, ARRAY_SIZE(peri_gates), mtk_clk_register_gates(NULL, node, peri_gates,
clk_data); ARRAY_SIZE(peri_gates), clk_data);
mtk_clk_register_composites(peri_clks, ARRAY_SIZE(peri_clks), base, mtk_clk_register_composites(NULL, peri_clks,
&mt8135_clk_lock, clk_data); ARRAY_SIZE(peri_clks), base,
&mt8135_clk_lock, clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) if (r)

2
drivers/clk/mediatek/clk-mt8167-aud.c
View File

@@ -50,7 +50,7 @@ static void __init mtk_audsys_init(struct device_node *node)
clk_data = mtk_alloc_clk_data(CLK_AUD_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_AUD_NR_CLK);
mtk_clk_register_gates(node, aud_clks, ARRAY_SIZE(aud_clks), clk_data); mtk_clk_register_gates(NULL, node, aud_clks, ARRAY_SIZE(aud_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) if (r)

2
drivers/clk/mediatek/clk-mt8167-img.c
View File

@@ -42,7 +42,7 @@ static void __init mtk_imgsys_init(struct device_node *node)
clk_data = mtk_alloc_clk_data(CLK_IMG_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_IMG_NR_CLK);
mtk_clk_register_gates(node, img_clks, ARRAY_SIZE(img_clks), clk_data); mtk_clk_register_gates(NULL, node, img_clks, ARRAY_SIZE(img_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);

2
drivers/clk/mediatek/clk-mt8167-mfgcfg.c
View File

@@ -40,7 +40,7 @@ static void __init mtk_mfgcfg_init(struct device_node *node)
clk_data = mtk_alloc_clk_data(CLK_MFG_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_MFG_NR_CLK);
mtk_clk_register_gates(node, mfg_clks, ARRAY_SIZE(mfg_clks), clk_data); mtk_clk_register_gates(NULL, node, mfg_clks, ARRAY_SIZE(mfg_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);

4
drivers/clk/mediatek/clk-mt8167-mm.c
View File

@@ -98,8 +98,8 @@ static int clk_mt8167_mm_probe(struct platform_device *pdev)
data = &mt8167_mmsys_driver_data; data = &mt8167_mmsys_driver_data;
ret = mtk_clk_register_gates(node, data->gates_clk, data->gates_num, ret = mtk_clk_register_gates(&pdev->dev, node, data->gates_clk,
clk_data); data->gates_num, clk_data);
if (ret) if (ret)
return ret; return ret;

3
drivers/clk/mediatek/clk-mt8167-vdec.c
View File

@@ -49,7 +49,8 @@ static void __init mtk_vdecsys_init(struct device_node *node)
clk_data = mtk_alloc_clk_data(CLK_VDEC_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_VDEC_NR_CLK);
mtk_clk_register_gates(node, vdec_clks, ARRAY_SIZE(vdec_clks), clk_data); mtk_clk_register_gates(NULL, node, vdec_clks, ARRAY_SIZE(vdec_clks),
clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);

12
drivers/clk/mediatek/clk-mt8167.c
View File

@@ -937,11 +937,12 @@ static void __init mtk_topckgen_init(struct device_node *node)
mtk_clk_register_fixed_clks(fixed_clks, ARRAY_SIZE(fixed_clks), mtk_clk_register_fixed_clks(fixed_clks, ARRAY_SIZE(fixed_clks),
clk_data); clk_data);
mtk_clk_register_gates(node, top_clks, ARRAY_SIZE(top_clks), clk_data); mtk_clk_register_gates(NULL, node, top_clks, ARRAY_SIZE(top_clks), clk_data);
mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), clk_data); mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), clk_data);
mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), base, mtk_clk_register_composites(NULL, top_muxes,
&mt8167_clk_lock, clk_data); ARRAY_SIZE(top_muxes), base,
&mt8167_clk_lock, clk_data);
mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs), mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs),
base, &mt8167_clk_lock, clk_data); base, &mt8167_clk_lock, clk_data);
@@ -966,8 +967,9 @@ static void __init mtk_infracfg_init(struct device_node *node)
clk_data = mtk_alloc_clk_data(CLK_IFR_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_IFR_NR_CLK);
mtk_clk_register_composites(ifr_muxes, ARRAY_SIZE(ifr_muxes), base, mtk_clk_register_composites(NULL, ifr_muxes,
&mt8167_clk_lock, clk_data); ARRAY_SIZE(ifr_muxes), base,
&mt8167_clk_lock, clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) if (r)

4
drivers/clk/mediatek/clk-mt8173-mm.c
View File

@@ -112,8 +112,8 @@ static int clk_mt8173_mm_probe(struct platform_device *pdev)
data = &mt8173_mmsys_driver_data; data = &mt8173_mmsys_driver_data;
ret = mtk_clk_register_gates(node, data->gates_clk, data->gates_num, ret = mtk_clk_register_gates(&pdev->dev, node, data->gates_clk,
clk_data); data->gates_num, clk_data);
if (ret) if (ret)
return ret; return ret;

34
drivers/clk/mediatek/clk-mt8173.c
View File

@@ -869,8 +869,9 @@ static void __init mtk_topckgen_init(struct device_node *node)
mtk_clk_register_fixed_clks(fixed_clks, ARRAY_SIZE(fixed_clks), clk_data); mtk_clk_register_fixed_clks(fixed_clks, ARRAY_SIZE(fixed_clks), clk_data);
mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), clk_data); mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), clk_data);
mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), base, mtk_clk_register_composites(NULL, top_muxes,
&mt8173_clk_lock, clk_data); ARRAY_SIZE(top_muxes), base,
&mt8173_clk_lock, clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) if (r)
@@ -888,8 +889,8 @@ static void __init mtk_infrasys_init(struct device_node *node)
clk_data = mtk_alloc_clk_data(CLK_INFRA_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_INFRA_NR_CLK);
mtk_clk_register_gates(node, infra_clks, ARRAY_SIZE(infra_clks), mtk_clk_register_gates(NULL, node, infra_clks,
clk_data); ARRAY_SIZE(infra_clks), clk_data);
mtk_clk_register_factors(infra_divs, ARRAY_SIZE(infra_divs), clk_data); mtk_clk_register_factors(infra_divs, ARRAY_SIZE(infra_divs), clk_data);
mtk_clk_register_cpumuxes(node, cpu_muxes, ARRAY_SIZE(cpu_muxes), mtk_clk_register_cpumuxes(node, cpu_muxes, ARRAY_SIZE(cpu_muxes),
@@ -918,10 +919,11 @@ static void __init mtk_pericfg_init(struct device_node *node)
clk_data = mtk_alloc_clk_data(CLK_PERI_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_PERI_NR_CLK);
mtk_clk_register_gates(node, peri_gates, ARRAY_SIZE(peri_gates), mtk_clk_register_gates(NULL, node, peri_gates,
clk_data); ARRAY_SIZE(peri_gates), clk_data);
mtk_clk_register_composites(peri_clks, ARRAY_SIZE(peri_clks), base, mtk_clk_register_composites(NULL, peri_clks,
&mt8173_clk_lock, clk_data); ARRAY_SIZE(peri_clks), base,
&mt8173_clk_lock, clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) if (r)
@@ -1062,8 +1064,8 @@ static void __init mtk_imgsys_init(struct device_node *node)
clk_data = mtk_alloc_clk_data(CLK_IMG_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_IMG_NR_CLK);
mtk_clk_register_gates(node, img_clks, ARRAY_SIZE(img_clks), mtk_clk_register_gates(NULL, node, img_clks,
clk_data); ARRAY_SIZE(img_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
@@ -1080,8 +1082,8 @@ static void __init mtk_vdecsys_init(struct device_node *node)
clk_data = mtk_alloc_clk_data(CLK_VDEC_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_VDEC_NR_CLK);
mtk_clk_register_gates(node, vdec_clks, ARRAY_SIZE(vdec_clks), mtk_clk_register_gates(NULL, node, vdec_clks,
clk_data); ARRAY_SIZE(vdec_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) if (r)
@@ -1097,8 +1099,8 @@ static void __init mtk_vencsys_init(struct device_node *node)
clk_data = mtk_alloc_clk_data(CLK_VENC_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_VENC_NR_CLK);
mtk_clk_register_gates(node, venc_clks, ARRAY_SIZE(venc_clks), mtk_clk_register_gates(NULL, node, venc_clks,
clk_data); ARRAY_SIZE(venc_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) if (r)
@@ -1114,8 +1116,8 @@ static void __init mtk_vencltsys_init(struct device_node *node)
clk_data = mtk_alloc_clk_data(CLK_VENCLT_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_VENCLT_NR_CLK);
mtk_clk_register_gates(node, venclt_clks, ARRAY_SIZE(venclt_clks), mtk_clk_register_gates(NULL, node, venclt_clks,
clk_data); ARRAY_SIZE(venclt_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) if (r)

4
drivers/clk/mediatek/clk-mt8183-audio.c
View File

@@ -75,8 +75,8 @@ static int clk_mt8183_audio_probe(struct platform_device *pdev)
clk_data = mtk_alloc_clk_data(CLK_AUDIO_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_AUDIO_NR_CLK);
mtk_clk_register_gates(node, audio_clks, ARRAY_SIZE(audio_clks), mtk_clk_register_gates(&pdev->dev, node, audio_clks,
clk_data); ARRAY_SIZE(audio_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) if (r)

4
drivers/clk/mediatek/clk-mt8183-mm.c
View File

@@ -90,8 +90,8 @@ static int clk_mt8183_mm_probe(struct platform_device *pdev)
clk_data = mtk_alloc_clk_data(CLK_MM_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_MM_NR_CLK);
mtk_clk_register_gates(node, mm_clks, ARRAY_SIZE(mm_clks), mtk_clk_register_gates(&pdev->dev, node, mm_clks,
clk_data); ARRAY_SIZE(mm_clks), clk_data);
return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
} }

36
drivers/clk/mediatek/clk-mt8183.c
View File

@@ -1172,8 +1172,8 @@ static int clk_mt8183_apmixed_probe(struct platform_device *pdev)
mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data); mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data);
mtk_clk_register_gates(node, apmixed_clks, ARRAY_SIZE(apmixed_clks), mtk_clk_register_gates(&pdev->dev, node, apmixed_clks,
clk_data); ARRAY_SIZE(apmixed_clks), clk_data);
return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
} }
@@ -1238,17 +1238,20 @@ static int clk_mt8183_top_probe(struct platform_device *pdev)
mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), top_clk_data); mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), top_clk_data);
mtk_clk_register_muxes(top_muxes, ARRAY_SIZE(top_muxes), mtk_clk_register_muxes(&pdev->dev, top_muxes,
node, &mt8183_clk_lock, top_clk_data); ARRAY_SIZE(top_muxes), node,
&mt8183_clk_lock, top_clk_data);
mtk_clk_register_composites(top_aud_muxes, ARRAY_SIZE(top_aud_muxes), mtk_clk_register_composites(&pdev->dev, top_aud_muxes,
base, &mt8183_clk_lock, top_clk_data); ARRAY_SIZE(top_aud_muxes), base,
&mt8183_clk_lock, top_clk_data);
mtk_clk_register_composites(top_aud_divs, ARRAY_SIZE(top_aud_divs), mtk_clk_register_composites(&pdev->dev, top_aud_divs,
base, &mt8183_clk_lock, top_clk_data); ARRAY_SIZE(top_aud_divs), base,
&mt8183_clk_lock, top_clk_data);
mtk_clk_register_gates(node, top_clks, ARRAY_SIZE(top_clks), mtk_clk_register_gates(&pdev->dev, node, top_clks,
top_clk_data); ARRAY_SIZE(top_clks), top_clk_data);
ret = clk_mt8183_reg_mfg_mux_notifier(&pdev->dev, ret = clk_mt8183_reg_mfg_mux_notifier(&pdev->dev,
top_clk_data->hws[CLK_TOP_MUX_MFG]->clk); top_clk_data->hws[CLK_TOP_MUX_MFG]->clk);
@@ -1267,8 +1270,8 @@ static int clk_mt8183_infra_probe(struct platform_device *pdev)
clk_data = mtk_alloc_clk_data(CLK_INFRA_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_INFRA_NR_CLK);
mtk_clk_register_gates(node, infra_clks, ARRAY_SIZE(infra_clks), mtk_clk_register_gates(&pdev->dev, node, infra_clks,
clk_data); ARRAY_SIZE(infra_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) { if (r) {
@@ -1290,8 +1293,8 @@ static int clk_mt8183_peri_probe(struct platform_device *pdev)
clk_data = mtk_alloc_clk_data(CLK_PERI_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_PERI_NR_CLK);
mtk_clk_register_gates(node, peri_clks, ARRAY_SIZE(peri_clks), mtk_clk_register_gates(&pdev->dev, node, peri_clks,
clk_data); ARRAY_SIZE(peri_clks), clk_data);
return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
} }
@@ -1308,8 +1311,9 @@ static int clk_mt8183_mcu_probe(struct platform_device *pdev)
clk_data = mtk_alloc_clk_data(CLK_MCU_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_MCU_NR_CLK);
mtk_clk_register_composites(mcu_muxes, ARRAY_SIZE(mcu_muxes), base, mtk_clk_register_composites(&pdev->dev, mcu_muxes,
&mt8183_clk_lock, clk_data); ARRAY_SIZE(mcu_muxes), base,
&mt8183_clk_lock, clk_data);
return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
} }

3
drivers/clk/mediatek/clk-mt8186-mcu.c
View File

@@ -65,7 +65,8 @@ static int clk_mt8186_mcu_probe(struct platform_device *pdev)
goto free_mcu_data; goto free_mcu_data;
} }
r = mtk_clk_register_composites(mcu_muxes, ARRAY_SIZE(mcu_muxes), base, r = mtk_clk_register_composites(&pdev->dev, mcu_muxes,
ARRAY_SIZE(mcu_muxes), base,
NULL, clk_data); NULL, clk_data);
if (r) if (r)
goto free_mcu_data; goto free_mcu_data;

3
drivers/clk/mediatek/clk-mt8186-mm.c
View File

@@ -69,7 +69,8 @@ static int clk_mt8186_mm_probe(struct platform_device *pdev)
if (!clk_data) if (!clk_data)
return -ENOMEM; return -ENOMEM;
r = mtk_clk_register_gates(node, mm_clks, ARRAY_SIZE(mm_clks), clk_data); r = mtk_clk_register_gates(&pdev->dev, node, mm_clks,
ARRAY_SIZE(mm_clks), clk_data);
if (r) if (r)
goto free_mm_data; goto free_mm_data;

9
drivers/clk/mediatek/clk-mt8186-topckgen.c
View File

@@ -715,17 +715,20 @@ static int clk_mt8186_topck_probe(struct platform_device *pdev)
if (r) if (r)
goto unregister_fixed_clks; goto unregister_fixed_clks;
r = mtk_clk_register_muxes(top_mtk_muxes, ARRAY_SIZE(top_mtk_muxes), node, r = mtk_clk_register_muxes(&pdev->dev, top_mtk_muxes,
ARRAY_SIZE(top_mtk_muxes), node,
&mt8186_clk_lock, clk_data); &mt8186_clk_lock, clk_data);
if (r) if (r)
goto unregister_factors; goto unregister_factors;
r = mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), base, r = mtk_clk_register_composites(&pdev->dev, top_muxes,
ARRAY_SIZE(top_muxes), base,
&mt8186_clk_lock, clk_data); &mt8186_clk_lock, clk_data);
if (r) if (r)
goto unregister_muxes; goto unregister_muxes;
r = mtk_clk_register_composites(top_adj_divs, ARRAY_SIZE(top_adj_divs), base, r = mtk_clk_register_composites(&pdev->dev, top_adj_divs,
ARRAY_SIZE(top_adj_divs), base,
&mt8186_clk_lock, clk_data); &mt8186_clk_lock, clk_data);
if (r) if (r)
goto unregister_composite_muxes; goto unregister_composite_muxes;

3
drivers/clk/mediatek/clk-mt8192-aud.c
View File

@@ -87,7 +87,8 @@ static int clk_mt8192_aud_probe(struct platform_device *pdev)
if (!clk_data) if (!clk_data)
return -ENOMEM; return -ENOMEM;
r = mtk_clk_register_gates(node, aud_clks, ARRAY_SIZE(aud_clks), clk_data); r = mtk_clk_register_gates(&pdev->dev, node, aud_clks,
ARRAY_SIZE(aud_clks), clk_data);
if (r) if (r)
return r; return r;

3
drivers/clk/mediatek/clk-mt8192-mm.c
View File

@@ -91,7 +91,8 @@ static int clk_mt8192_mm_probe(struct platform_device *pdev)
if (!clk_data) if (!clk_data)
return -ENOMEM; return -ENOMEM;
r = mtk_clk_register_gates(node, mm_clks, ARRAY_SIZE(mm_clks), clk_data); r = mtk_clk_register_gates(&pdev->dev, node, mm_clks,
ARRAY_SIZE(mm_clks), clk_data);
if (r) if (r)
return r; return r;

88
drivers/clk/mediatek/clk-mt8192.c
View File

@@ -1100,27 +1100,68 @@ static int clk_mt8192_top_probe(struct platform_device *pdev)
if (IS_ERR(base)) if (IS_ERR(base))
return PTR_ERR(base); return PTR_ERR(base);
mtk_clk_register_fixed_clks(top_fixed_clks, ARRAY_SIZE(top_fixed_clks), top_clk_data); r = mtk_clk_register_fixed_clks(top_fixed_clks, ARRAY_SIZE(top_fixed_clks), top_clk_data);
mtk_clk_register_factors(top_early_divs, ARRAY_SIZE(top_early_divs), top_clk_data);
mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), top_clk_data);
mtk_clk_register_muxes(top_mtk_muxes, ARRAY_SIZE(top_mtk_muxes), node, &mt8192_clk_lock,
top_clk_data);
mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), base, &mt8192_clk_lock,
top_clk_data);
mtk_clk_register_composites(top_adj_divs, ARRAY_SIZE(top_adj_divs), base, &mt8192_clk_lock,
top_clk_data);
r = mtk_clk_register_gates(node, top_clks, ARRAY_SIZE(top_clks), top_clk_data);
if (r) if (r)
return r; return r;
r = mtk_clk_register_factors(top_early_divs, ARRAY_SIZE(top_early_divs), top_clk_data);
if (r)
goto unregister_fixed_clks;
r = mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), top_clk_data);
if (r)
goto unregister_early_factors;
r = mtk_clk_register_muxes(&pdev->dev, top_mtk_muxes,
ARRAY_SIZE(top_mtk_muxes), node,
&mt8192_clk_lock, top_clk_data);
if (r)
goto unregister_factors;
r = mtk_clk_register_composites(&pdev->dev, top_muxes,
ARRAY_SIZE(top_muxes), base,
&mt8192_clk_lock, top_clk_data);
if (r)
goto unregister_muxes;
r = mtk_clk_register_composites(&pdev->dev, top_adj_divs,
ARRAY_SIZE(top_adj_divs), base,
&mt8192_clk_lock, top_clk_data);
if (r)
goto unregister_top_composites;
r = mtk_clk_register_gates(&pdev->dev, node, top_clks,
ARRAY_SIZE(top_clks), top_clk_data);
if (r)
goto unregister_adj_divs_composites;
r = clk_mt8192_reg_mfg_mux_notifier(&pdev->dev, r = clk_mt8192_reg_mfg_mux_notifier(&pdev->dev,
top_clk_data->hws[CLK_TOP_MFG_PLL_SEL]->clk); top_clk_data->hws[CLK_TOP_MFG_PLL_SEL]->clk);
if (r) if (r)
return r; goto unregister_gates;
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, top_clk_data);
if (r)
goto unregister_gates;
return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, return 0;
unregister_gates:
mtk_clk_unregister_gates(top_clks, ARRAY_SIZE(top_clks), top_clk_data);
unregister_adj_divs_composites:
mtk_clk_unregister_composites(top_adj_divs, ARRAY_SIZE(top_adj_divs), top_clk_data);
unregister_top_composites:
mtk_clk_unregister_composites(top_muxes, ARRAY_SIZE(top_muxes), top_clk_data);
unregister_muxes:
mtk_clk_unregister_muxes(top_mtk_muxes, ARRAY_SIZE(top_mtk_muxes), top_clk_data);
unregister_factors:
mtk_clk_unregister_factors(top_divs, ARRAY_SIZE(top_divs), top_clk_data);
unregister_early_factors:
mtk_clk_unregister_factors(top_early_divs, ARRAY_SIZE(top_early_divs), top_clk_data);
unregister_fixed_clks:
mtk_clk_unregister_fixed_clks(top_fixed_clks, ARRAY_SIZE(top_fixed_clks),
top_clk_data); top_clk_data);
return r;
} }
static int clk_mt8192_infra_probe(struct platform_device *pdev) static int clk_mt8192_infra_probe(struct platform_device *pdev)
@@ -1133,20 +1174,23 @@ static int clk_mt8192_infra_probe(struct platform_device *pdev)
if (!clk_data) if (!clk_data)
return -ENOMEM; return -ENOMEM;
r = mtk_clk_register_gates(node, infra_clks, ARRAY_SIZE(infra_clks), clk_data); r = mtk_clk_register_gates(&pdev->dev, node, infra_clks,
ARRAY_SIZE(infra_clks), clk_data);
if (r) if (r)
goto free_clk_data; goto free_clk_data;
r = mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc); r = mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc);
if (r) if (r)
goto free_clk_data; goto unregister_gates;
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) if (r)
goto free_clk_data; goto unregister_gates;
return r; return r;
unregister_gates:
mtk_clk_unregister_gates(infra_clks, ARRAY_SIZE(infra_clks), clk_data);
free_clk_data: free_clk_data:
mtk_free_clk_data(clk_data); mtk_free_clk_data(clk_data);
return r; return r;
@@ -1162,16 +1206,19 @@ static int clk_mt8192_peri_probe(struct platform_device *pdev)
if (!clk_data) if (!clk_data)
return -ENOMEM; return -ENOMEM;
r = mtk_clk_register_gates(node, peri_clks, ARRAY_SIZE(peri_clks), clk_data); r = mtk_clk_register_gates(&pdev->dev, node, peri_clks,
ARRAY_SIZE(peri_clks), clk_data);
if (r) if (r)
goto free_clk_data; goto free_clk_data;
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) if (r)
goto free_clk_data; goto unregister_gates;
return r; return r;
unregister_gates:
mtk_clk_unregister_gates(peri_clks, ARRAY_SIZE(peri_clks), clk_data);
free_clk_data: free_clk_data:
mtk_free_clk_data(clk_data); mtk_free_clk_data(clk_data);
return r; return r;
@@ -1188,16 +1235,19 @@ static int clk_mt8192_apmixed_probe(struct platform_device *pdev)
return -ENOMEM; return -ENOMEM;
mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data); mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data);
r = mtk_clk_register_gates(node, apmixed_clks, ARRAY_SIZE(apmixed_clks), clk_data); r = mtk_clk_register_gates(&pdev->dev, node, apmixed_clks,
ARRAY_SIZE(apmixed_clks), clk_data);
if (r) if (r)
goto free_clk_data; goto free_clk_data;
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) if (r)
goto free_clk_data; goto unregister_gates;
return r; return r;
unregister_gates:
mtk_clk_unregister_gates(apmixed_clks, ARRAY_SIZE(apmixed_clks), clk_data);
free_clk_data: free_clk_data:
mtk_free_clk_data(clk_data); mtk_free_clk_data(clk_data);
return r; return r;

3
drivers/clk/mediatek/clk-mt8195-apmixedsys.c
View File

@@ -124,7 +124,8 @@ static int clk_mt8195_apmixed_probe(struct platform_device *pdev)
if (r) if (r)
goto free_apmixed_data; goto free_apmixed_data;
r = mtk_clk_register_gates(node, apmixed_clks, ARRAY_SIZE(apmixed_clks), clk_data); r = mtk_clk_register_gates(&pdev->dev, node, apmixed_clks,
ARRAY_SIZE(apmixed_clks), clk_data);
if (r) if (r)
goto unregister_plls; goto unregister_plls;

9
drivers/clk/mediatek/clk-mt8195-topckgen.c
View File

@@ -1262,7 +1262,8 @@ static int clk_mt8195_topck_probe(struct platform_device *pdev)
if (r) if (r)
goto unregister_fixed_clks; goto unregister_fixed_clks;
r = mtk_clk_register_muxes(top_mtk_muxes, ARRAY_SIZE(top_mtk_muxes), node, r = mtk_clk_register_muxes(&pdev->dev, top_mtk_muxes,
ARRAY_SIZE(top_mtk_muxes), node,
&mt8195_clk_lock, top_clk_data); &mt8195_clk_lock, top_clk_data);
if (r) if (r)
goto unregister_factors; goto unregister_factors;
@@ -1281,12 +1282,14 @@ static int clk_mt8195_topck_probe(struct platform_device *pdev)
if (r) if (r)
goto unregister_muxes; goto unregister_muxes;
r = mtk_clk_register_composites(top_adj_divs, ARRAY_SIZE(top_adj_divs), base, r = mtk_clk_register_composites(&pdev->dev, top_adj_divs,
ARRAY_SIZE(top_adj_divs), base,
&mt8195_clk_lock, top_clk_data); &mt8195_clk_lock, top_clk_data);
if (r) if (r)
goto unregister_muxes; goto unregister_muxes;
r = mtk_clk_register_gates(node, top_clks, ARRAY_SIZE(top_clks), top_clk_data); r = mtk_clk_register_gates(&pdev->dev, node, top_clks,
ARRAY_SIZE(top_clks), top_clk_data);
if (r) if (r)
goto unregister_composite_divs; goto unregister_composite_divs;

3
drivers/clk/mediatek/clk-mt8195-vdo0.c
View File

@@ -104,7 +104,8 @@ static int clk_mt8195_vdo0_probe(struct platform_device *pdev)
if (!clk_data) if (!clk_data)
return -ENOMEM; return -ENOMEM;
r = mtk_clk_register_gates(node, vdo0_clks, ARRAY_SIZE(vdo0_clks), clk_data); r = mtk_clk_register_gates(&pdev->dev, node, vdo0_clks,
ARRAY_SIZE(vdo0_clks), clk_data);
if (r) if (r)
goto free_vdo0_data; goto free_vdo0_data;

3
drivers/clk/mediatek/clk-mt8195-vdo1.c
View File

@@ -131,7 +131,8 @@ static int clk_mt8195_vdo1_probe(struct platform_device *pdev)
if (!clk_data) if (!clk_data)
return -ENOMEM; return -ENOMEM;
r = mtk_clk_register_gates(node, vdo1_clks, ARRAY_SIZE(vdo1_clks), clk_data); r = mtk_clk_register_gates(&pdev->dev, node, vdo1_clks,
ARRAY_SIZE(vdo1_clks), clk_data);
if (r) if (r)
goto free_vdo1_data; goto free_vdo1_data;

5
drivers/clk/mediatek/clk-mt8365-mm.c
View File

@@ -81,9 +81,8 @@ static int clk_mt8365_mm_probe(struct platform_device *pdev)
clk_data = mtk_alloc_clk_data(CLK_MM_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_MM_NR_CLK);
ret = mtk_clk_register_gates_with_dev(node, mm_clks, ret = mtk_clk_register_gates(dev, node, mm_clks,
ARRAY_SIZE(mm_clks), clk_data, ARRAY_SIZE(mm_clks), clk_data);
dev);
if (ret) if (ret)
goto err_free_clk_data; goto err_free_clk_data;

14
drivers/clk/mediatek/clk-mt8365.c
View File

@@ -947,12 +947,13 @@ static int clk_mt8365_top_probe(struct platform_device *pdev)
if (ret) if (ret)
goto unregister_fixed_clks; goto unregister_fixed_clks;
ret = mtk_clk_register_muxes(top_muxes, ARRAY_SIZE(top_muxes), node, ret = mtk_clk_register_muxes(&pdev->dev, top_muxes,
ARRAY_SIZE(top_muxes), node,
&mt8365_clk_lock, clk_data); &mt8365_clk_lock, clk_data);
if (ret) if (ret)
goto unregister_factors; goto unregister_factors;
ret = mtk_clk_register_composites(top_misc_mux_gates, ret = mtk_clk_register_composites(&pdev->dev, top_misc_mux_gates,
ARRAY_SIZE(top_misc_mux_gates), base, ARRAY_SIZE(top_misc_mux_gates), base,
&mt8365_clk_lock, clk_data); &mt8365_clk_lock, clk_data);
if (ret) if (ret)
@@ -1019,8 +1020,8 @@ static int clk_mt8365_infra_probe(struct platform_device *pdev)
if (!clk_data) if (!clk_data)
return -ENOMEM; return -ENOMEM;
ret = mtk_clk_register_gates(node, ifr_clks, ARRAY_SIZE(ifr_clks), ret = mtk_clk_register_gates(&pdev->dev, node, ifr_clks,
clk_data); ARRAY_SIZE(ifr_clks), clk_data);
if (ret) if (ret)
goto free_clk_data; goto free_clk_data;
@@ -1080,8 +1081,9 @@ static int clk_mt8365_mcu_probe(struct platform_device *pdev)
if (!clk_data) if (!clk_data)
return -ENOMEM; return -ENOMEM;
ret = mtk_clk_register_composites(mcu_muxes, ARRAY_SIZE(mcu_muxes), ret = mtk_clk_register_composites(&pdev->dev, mcu_muxes,
base, &mt8365_clk_lock, clk_data); ARRAY_SIZE(mcu_muxes), base,
&mt8365_clk_lock, clk_data);
if (ret) if (ret)
goto free_clk_data; goto free_clk_data;

2
drivers/clk/mediatek/clk-mt8516-aud.c
View File

@@ -48,7 +48,7 @@ static void __init mtk_audsys_init(struct device_node *node)
clk_data = mtk_alloc_clk_data(CLK_AUD_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_AUD_NR_CLK);
mtk_clk_register_gates(node, aud_clks, ARRAY_SIZE(aud_clks), clk_data); mtk_clk_register_gates(NULL, node, aud_clks, ARRAY_SIZE(aud_clks), clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) if (r)

12
drivers/clk/mediatek/clk-mt8516.c
View File

@@ -655,11 +655,12 @@ static void __init mtk_topckgen_init(struct device_node *node)
mtk_clk_register_fixed_clks(fixed_clks, ARRAY_SIZE(fixed_clks), mtk_clk_register_fixed_clks(fixed_clks, ARRAY_SIZE(fixed_clks),
clk_data); clk_data);
mtk_clk_register_gates(node, top_clks, ARRAY_SIZE(top_clks), clk_data); mtk_clk_register_gates(NULL, node, top_clks, ARRAY_SIZE(top_clks), clk_data);
mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), clk_data); mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), clk_data);
mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), base, mtk_clk_register_composites(NULL, top_muxes,
&mt8516_clk_lock, clk_data); ARRAY_SIZE(top_muxes), base,
&mt8516_clk_lock, clk_data);
mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs), mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs),
base, &mt8516_clk_lock, clk_data); base, &mt8516_clk_lock, clk_data);
@@ -684,8 +685,9 @@ static void __init mtk_infracfg_init(struct device_node *node)
clk_data = mtk_alloc_clk_data(CLK_IFR_NR_CLK); clk_data = mtk_alloc_clk_data(CLK_IFR_NR_CLK);
mtk_clk_register_composites(ifr_muxes, ARRAY_SIZE(ifr_muxes), base, mtk_clk_register_composites(NULL, ifr_muxes,
&mt8516_clk_lock, clk_data); ARRAY_SIZE(ifr_muxes), base,
&mt8516_clk_lock, clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) if (r)

127
drivers/clk/mediatek/clk-mtk.c
View File

@@ -11,12 +11,15 @@
#include <linux/mfd/syscon.h> #include <linux/mfd/syscon.h>
#include <linux/module.h> #include <linux/module.h>
#include <linux/of.h> #include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_device.h> #include <linux/of_device.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/slab.h> #include <linux/slab.h>
#include "clk-mtk.h" #include "clk-mtk.h"
#include "clk-gate.h" #include "clk-gate.h"
#include "clk-mux.h"
static void mtk_init_clk_data(struct clk_hw_onecell_data *clk_data, static void mtk_init_clk_data(struct clk_hw_onecell_data *clk_data,
unsigned int clk_num) unsigned int clk_num)
@@ -197,8 +200,8 @@ void mtk_clk_unregister_factors(const struct mtk_fixed_factor *clks, int num,
} }
EXPORT_SYMBOL_GPL(mtk_clk_unregister_factors); EXPORT_SYMBOL_GPL(mtk_clk_unregister_factors);
static struct clk_hw *mtk_clk_register_composite(const struct mtk_composite *mc, static struct clk_hw *mtk_clk_register_composite(struct device *dev,
void __iomem *base, spinlock_t *lock) const struct mtk_composite *mc, void __iomem *base, spinlock_t *lock)
{ {
struct clk_hw *hw; struct clk_hw *hw;
struct clk_mux *mux = NULL; struct clk_mux *mux = NULL;
@@ -264,7 +267,7 @@ static struct clk_hw *mtk_clk_register_composite(const struct mtk_composite *mc,
div_ops = &clk_divider_ops; div_ops = &clk_divider_ops;
} }
hw = clk_hw_register_composite(NULL, mc->name, parent_names, num_parents, hw = clk_hw_register_composite(dev, mc->name, parent_names, num_parents,
mux_hw, mux_ops, mux_hw, mux_ops,
div_hw, div_ops, div_hw, div_ops,
gate_hw, gate_ops, gate_hw, gate_ops,
@@ -308,7 +311,8 @@ static void mtk_clk_unregister_composite(struct clk_hw *hw)
kfree(mux); kfree(mux);
} }
int mtk_clk_register_composites(const struct mtk_composite *mcs, int num, int mtk_clk_register_composites(struct device *dev,
const struct mtk_composite *mcs, int num,
void __iomem *base, spinlock_t *lock, void __iomem *base, spinlock_t *lock,
struct clk_hw_onecell_data *clk_data) struct clk_hw_onecell_data *clk_data)
{ {
@@ -327,7 +331,7 @@ int mtk_clk_register_composites(const struct mtk_composite *mcs, int num,
continue; continue;
} }
hw = mtk_clk_register_composite(mc, base, lock); hw = mtk_clk_register_composite(dev, mc, base, lock);
if (IS_ERR(hw)) { if (IS_ERR(hw)) {
pr_err("Failed to register clk %s: %pe\n", mc->name, pr_err("Failed to register clk %s: %pe\n", mc->name,
@@ -449,20 +453,81 @@ int mtk_clk_simple_probe(struct platform_device *pdev)
const struct mtk_clk_desc *mcd; const struct mtk_clk_desc *mcd;
struct clk_hw_onecell_data *clk_data; struct clk_hw_onecell_data *clk_data;
struct device_node *node = pdev->dev.of_node; struct device_node *node = pdev->dev.of_node;
int r; void __iomem *base;
int num_clks, r;
mcd = of_device_get_match_data(&pdev->dev); mcd = of_device_get_match_data(&pdev->dev);
if (!mcd) if (!mcd)
return -EINVAL; return -EINVAL;
clk_data = mtk_alloc_clk_data(mcd->num_clks); /* Composite clocks needs us to pass iomem pointer */
if (mcd->composite_clks) {
if (!mcd->shared_io)
base = devm_platform_ioremap_resource(pdev, 0);
else
base = of_iomap(node, 0);
if (IS_ERR_OR_NULL(base))
return IS_ERR(base) ? PTR_ERR(base) : -ENOMEM;
}
devm_pm_runtime_enable(&pdev->dev);
/*
* Do a pm_runtime_resume_and_get() to workaround a possible
* deadlock between clk_register() and the genpd framework.
*/
r = pm_runtime_resume_and_get(&pdev->dev);
if (r)
return r;
/* Calculate how many clk_hw_onecell_data entries to allocate */
num_clks = mcd->num_clks + mcd->num_composite_clks;
num_clks += mcd->num_fixed_clks + mcd->num_factor_clks;
num_clks += mcd->num_mux_clks;
clk_data = mtk_alloc_clk_data(num_clks);
if (!clk_data) if (!clk_data)
return -ENOMEM; return -ENOMEM;
r = mtk_clk_register_gates_with_dev(node, mcd->clks, mcd->num_clks, if (mcd->fixed_clks) {
clk_data, &pdev->dev); r = mtk_clk_register_fixed_clks(mcd->fixed_clks,
if (r) mcd->num_fixed_clks, clk_data);
goto free_data; if (r)
goto free_data;
}
if (mcd->factor_clks) {
r = mtk_clk_register_factors(mcd->factor_clks,
mcd->num_factor_clks, clk_data);
if (r)
goto unregister_fixed_clks;
}
if (mcd->mux_clks) {
r = mtk_clk_register_muxes(&pdev->dev, mcd->mux_clks,
mcd->num_mux_clks, node,
mcd->clk_lock, clk_data);
if (r)
goto unregister_factors;
};
if (mcd->composite_clks) {
/* We don't check composite_lock because it's optional */
r = mtk_clk_register_composites(&pdev->dev,
mcd->composite_clks,
mcd->num_composite_clks,
base, mcd->clk_lock, clk_data);
if (r)
goto unregister_muxes;
}
if (mcd->clks) {
r = mtk_clk_register_gates(&pdev->dev, node, mcd->clks,
mcd->num_clks, clk_data);
if (r)
goto unregister_composites;
}
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r) if (r)
@@ -477,12 +542,35 @@ int mtk_clk_simple_probe(struct platform_device *pdev)
goto unregister_clks; goto unregister_clks;
} }
pm_runtime_put(&pdev->dev);
return r; return r;
unregister_clks: unregister_clks:
mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_data); if (mcd->clks)
mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_data);
unregister_composites:
if (mcd->composite_clks)
mtk_clk_unregister_composites(mcd->composite_clks,
mcd->num_composite_clks, clk_data);
unregister_muxes:
if (mcd->mux_clks)
mtk_clk_unregister_muxes(mcd->mux_clks,
mcd->num_mux_clks, clk_data);
unregister_factors:
if (mcd->factor_clks)
mtk_clk_unregister_factors(mcd->factor_clks,
mcd->num_factor_clks, clk_data);
unregister_fixed_clks:
if (mcd->fixed_clks)
mtk_clk_unregister_fixed_clks(mcd->fixed_clks,
mcd->num_fixed_clks, clk_data);
free_data: free_data:
mtk_free_clk_data(clk_data); mtk_free_clk_data(clk_data);
if (mcd->shared_io && base)
iounmap(base);
pm_runtime_put(&pdev->dev);
return r; return r;
} }
EXPORT_SYMBOL_GPL(mtk_clk_simple_probe); EXPORT_SYMBOL_GPL(mtk_clk_simple_probe);
@@ -494,7 +582,20 @@ int mtk_clk_simple_remove(struct platform_device *pdev)
struct device_node *node = pdev->dev.of_node; struct device_node *node = pdev->dev.of_node;
of_clk_del_provider(node); of_clk_del_provider(node);
mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_data); if (mcd->clks)
mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_data);
if (mcd->composite_clks)
mtk_clk_unregister_composites(mcd->composite_clks,
mcd->num_composite_clks, clk_data);
if (mcd->mux_clks)
mtk_clk_unregister_muxes(mcd->mux_clks,
mcd->num_mux_clks, clk_data);
if (mcd->factor_clks)
mtk_clk_unregister_factors(mcd->factor_clks,
mcd->num_factor_clks, clk_data);
if (mcd->fixed_clks)
mtk_clk_unregister_fixed_clks(mcd->fixed_clks,
mcd->num_fixed_clks, clk_data);
mtk_free_clk_data(clk_data); mtk_free_clk_data(clk_data);
return 0; return 0;

13
drivers/clk/mediatek/clk-mtk.h
View File

@@ -149,7 +149,8 @@ struct mtk_composite {
.flags = 0, \ .flags = 0, \
} }
int mtk_clk_register_composites(const struct mtk_composite *mcs, int num, int mtk_clk_register_composites(struct device *dev,
const struct mtk_composite *mcs, int num,
void __iomem *base, spinlock_t *lock, void __iomem *base, spinlock_t *lock,
struct clk_hw_onecell_data *clk_data); struct clk_hw_onecell_data *clk_data);
void mtk_clk_unregister_composites(const struct mtk_composite *mcs, int num, void mtk_clk_unregister_composites(const struct mtk_composite *mcs, int num,
@@ -195,7 +196,17 @@ void mtk_clk_unregister_ref2usb_tx(struct clk_hw *hw);
struct mtk_clk_desc { struct mtk_clk_desc {
const struct mtk_gate *clks; const struct mtk_gate *clks;
size_t num_clks; size_t num_clks;
const struct mtk_composite *composite_clks;
size_t num_composite_clks;
const struct mtk_fixed_clk *fixed_clks;
size_t num_fixed_clks;
const struct mtk_fixed_factor *factor_clks;
size_t num_factor_clks;
const struct mtk_mux *mux_clks;
size_t num_mux_clks;
const struct mtk_clk_rst_desc *rst_desc; const struct mtk_clk_rst_desc *rst_desc;
spinlock_t *clk_lock;
bool shared_io;
}; };
int mtk_clk_simple_probe(struct platform_device *pdev); int mtk_clk_simple_probe(struct platform_device *pdev);

14
drivers/clk/mediatek/clk-mux.c
View File

@@ -154,9 +154,10 @@ const struct clk_ops mtk_mux_gate_clr_set_upd_ops = {
}; };
EXPORT_SYMBOL_GPL(mtk_mux_gate_clr_set_upd_ops); EXPORT_SYMBOL_GPL(mtk_mux_gate_clr_set_upd_ops);
static struct clk_hw *mtk_clk_register_mux(const struct mtk_mux *mux, static struct clk_hw *mtk_clk_register_mux(struct device *dev,
struct regmap *regmap, const struct mtk_mux *mux,
spinlock_t *lock) struct regmap *regmap,
spinlock_t *lock)
{ {
struct mtk_clk_mux *clk_mux; struct mtk_clk_mux *clk_mux;
struct clk_init_data init = {}; struct clk_init_data init = {};
@@ -177,7 +178,7 @@ static struct clk_hw *mtk_clk_register_mux(const struct mtk_mux *mux,
clk_mux->lock = lock; clk_mux->lock = lock;
clk_mux->hw.init = &init; clk_mux->hw.init = &init;
ret = clk_hw_register(NULL, &clk_mux->hw); ret = clk_hw_register(dev, &clk_mux->hw);
if (ret) { if (ret) {
kfree(clk_mux); kfree(clk_mux);
return ERR_PTR(ret); return ERR_PTR(ret);
@@ -198,7 +199,8 @@ static void mtk_clk_unregister_mux(struct clk_hw *hw)
kfree(mux); kfree(mux);
} }
int mtk_clk_register_muxes(const struct mtk_mux *muxes, int mtk_clk_register_muxes(struct device *dev,
const struct mtk_mux *muxes,
int num, struct device_node *node, int num, struct device_node *node,
spinlock_t *lock, spinlock_t *lock,
struct clk_hw_onecell_data *clk_data) struct clk_hw_onecell_data *clk_data)
@@ -222,7 +224,7 @@ int mtk_clk_register_muxes(const struct mtk_mux *muxes,
continue; continue;
} }
hw = mtk_clk_register_mux(mux, regmap, lock); hw = mtk_clk_register_mux(dev, mux, regmap, lock);
if (IS_ERR(hw)) { if (IS_ERR(hw)) {
pr_err("Failed to register clk %s: %pe\n", mux->name, pr_err("Failed to register clk %s: %pe\n", mux->name,

3
drivers/clk/mediatek/clk-mux.h
View File

@@ -83,7 +83,8 @@ extern const struct clk_ops mtk_mux_gate_clr_set_upd_ops;
0, _upd_ofs, _upd, CLK_SET_RATE_PARENT, \ 0, _upd_ofs, _upd, CLK_SET_RATE_PARENT, \
mtk_mux_clr_set_upd_ops) mtk_mux_clr_set_upd_ops)
int mtk_clk_register_muxes(const struct mtk_mux *muxes, int mtk_clk_register_muxes(struct device *dev,
const struct mtk_mux *muxes,
int num, struct device_node *node, int num, struct device_node *node,
spinlock_t *lock, spinlock_t *lock,
struct clk_hw_onecell_data *clk_data); struct clk_hw_onecell_data *clk_data);

Some files were not shown because too many files have changed in this diff Show More