diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c index 6e485aab1e4c..1873087009d1 100644 --- a/drivers/clk/rockchip/clk-rk3288.c +++ b/drivers/clk/rockchip/clk-rk3288.c @@ -72,36 +72,36 @@ static struct rockchip_pll_rate_table rk3288_pll_rates[] = { RK3066_PLL_RATE(1248000000, 1, 52, 1), RK3066_PLL_RATE(1224000000, 1, 51, 1), RK3066_PLL_RATE(1200000000, 1, 50, 1), - RK3066_PLL_RATE(1188000000, 2, 99, 1), + RK3066_PLL_RATE(1188000000, 1, 99, 2), RK3066_PLL_RATE(1176000000, 1, 49, 1), RK3066_PLL_RATE(1128000000, 1, 47, 1), RK3066_PLL_RATE(1104000000, 1, 46, 1), RK3066_PLL_RATE(1008000000, 1, 84, 2), RK3066_PLL_RATE( 912000000, 1, 76, 2), - RK3066_PLL_RATE( 891000000, 8, 594, 2), + RK3066_PLL_RATE( 891000000, 2, 297, 4), RK3066_PLL_RATE( 888000000, 1, 74, 2), RK3066_PLL_RATE( 816000000, 1, 68, 2), - RK3066_PLL_RATE( 798000000, 2, 133, 2), + RK3066_PLL_RATE( 798000000, 1, 133, 4), RK3066_PLL_RATE( 792000000, 1, 66, 2), RK3066_PLL_RATE( 768000000, 1, 64, 2), - RK3066_PLL_RATE( 742500000, 8, 495, 2), + RK3066_PLL_RATE( 742500000, 4, 495, 4), RK3066_PLL_RATE( 696000000, 1, 58, 2), RK3066_PLL_RATE( 600000000, 1, 50, 2), - RK3066_PLL_RATE_NB(594000000, 1, 198, 8, 1), + RK3066_PLL_RATE_NB(594000000, 1, 99, 4, 1), RK3066_PLL_RATE( 552000000, 1, 46, 2), RK3066_PLL_RATE( 504000000, 1, 84, 4), - RK3066_PLL_RATE( 500000000, 3, 125, 2), + RK3066_PLL_RATE( 500000000, 1, 125, 6), RK3066_PLL_RATE( 456000000, 1, 76, 4), RK3066_PLL_RATE( 408000000, 1, 68, 4), - RK3066_PLL_RATE( 400000000, 3, 100, 2), - RK3066_PLL_RATE( 384000000, 2, 128, 4), + RK3066_PLL_RATE( 400000000, 1, 100, 6), + RK3066_PLL_RATE( 384000000, 1, 64, 4), RK3066_PLL_RATE( 360000000, 1, 60, 4), RK3066_PLL_RATE( 312000000, 1, 52, 4), RK3066_PLL_RATE( 300000000, 1, 50, 4), - RK3066_PLL_RATE( 297000000, 2, 198, 8), + RK3066_PLL_RATE( 297000000, 1, 99, 8), RK3066_PLL_RATE( 252000000, 1, 84, 8), RK3066_PLL_RATE( 216000000, 1, 72, 8), - RK3066_PLL_RATE( 148500000, 2, 99, 8), + RK3066_PLL_RATE( 148500000, 1, 99, 16), RK3066_PLL_RATE( 126000000, 1, 84, 16), RK3066_PLL_RATE( 48000000, 1, 64, 32), { /* sentinel */ },