UPSTREAM: KVM: arm64: vgic: Let an interrupt controller advertise lack of HW deactivation

The vGIC, as architected by ARM, allows a virtual interrupt to
trigger the deactivation of a physical interrupt. This allows
the following interrupt to be delivered without requiring an exit.

However, some implementations have choosen not to implement this,
meaning that we will need some unsavoury workarounds to deal with this.

On detecting such a case, taint the kernel and spit a nastygram.
We'll deal with this in later patches.

Signed-off-by: Marc Zyngier <maz@kernel.org>
(cherry picked from commit f6c3e24fb7)
Signed-off-by: Will Deacon <willdeacon@google.com>
Bug: 192636784
Change-Id: I00244ba04b9671eb27be0b1d566969e3dc921da6
This commit is contained in:
Marc Zyngier
2021-03-15 21:56:47 +00:00
committed by Will Deacon
parent 6873a8ecc4
commit 9abc158d3c
3 changed files with 15 additions and 0 deletions

View File

@@ -532,6 +532,16 @@ int kvm_vgic_hyp_init(void)
return -ENXIO;
}
/*
* If we get one of these oddball non-GICs, taint the kernel,
* as we have no idea of how they *really* behave.
*/
if (gic_kvm_info->no_hw_deactivation) {
kvm_info("Non-architectural vgic, tainting kernel\n");
add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_STILL_OK);
kvm_vgic_global_state.no_hw_deactivation = true;
}
switch (gic_kvm_info->type) {
case GIC_V2:
ret = vgic_v2_probe(gic_kvm_info);

View File

@@ -72,6 +72,9 @@ struct vgic_global {
bool has_gicv4;
bool has_gicv4_1;
/* Pseudo GICv3 from outer space */
bool no_hw_deactivation;
/* GIC system register CPU interface */
struct static_key_false gicv3_cpuif;

View File

@@ -32,6 +32,8 @@ struct gic_kvm_info {
bool has_v4;
/* rvpeid support */
bool has_v4_1;
/* Deactivation impared, subpar stuff */
bool no_hw_deactivation;
};
#ifdef CONFIG_KVM