diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt
index 16d497e0cd33..98d89e53013d 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt
@@ -28,9 +28,6 @@ Properties:
 	Usage: required
 	Value type: <prop-encoded-array>
 	Definition: Specifies the base physical address for PDC hardware.
-		    Optionally, specify the PDC's GIC interface registers that
-		    need to be configured for wakeup capable GPIOs routed to
-		    the PDC.
 
 - interrupt-cells:
 	Usage: required
@@ -57,23 +54,15 @@ Properties:
 		    The second element is the GIC hwirq number for the PDC port.
 		    The third element is the number of interrupts in sequence.
 
-- qcom,scm-spi-cfg:
-	Usage: optional
-	Value type: <bool>
-	Definition: Specifies if the SPI configuration registers have to be
-		    written from the firmware. Sometimes the PDC interface
-		    register to the GIC can only be written from the firmware.
-
 Example:
 
 	pdc: interrupt-controller@b220000 {
 		compatible = "qcom,sdm845-pdc";
-		reg = <0 0x0b220000 0 0x30000>, <0 0x179900f0 0 0x60>;
+		reg = <0xb220000 0x30000>;
 		qcom,pdc-ranges = <0 512 94>, <94 641 15>, <115 662 7>;
 		#interrupt-cells = <2>;
 		interrupt-parent = <&intc>;
 		interrupt-controller;
-		qcom,scm-spi-cfg;
 	};
 
 DT binding of a device that wants to use the GIC SPI 514 as a wakeup