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pinctrl: rockchip: fix rk3588 pinmux get
For GPIO0_B4 to GPIO0D7, the pinmux must read two registers. Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com> Change-Id: Ic8d70c0ee56ce8ae8890a708cea84868f3a04228
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@@ -1039,6 +1039,7 @@ static bool rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin,
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static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin)
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{
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struct rockchip_pinctrl *info = bank->drvdata;
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struct rockchip_pin_ctrl *ctrl = info->ctrl;
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int iomux_num = (pin / 8);
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struct regmap *regmap;
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unsigned int val;
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@@ -1084,6 +1085,27 @@ static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin)
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if (bank->recalced_mask & BIT(pin))
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rockchip_get_recalced_mux(bank, pin, ®, &bit, &mask);
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if (ctrl->type == RK3588) {
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if (bank->bank_num == 0) {
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if ((pin >= RK_PB4) && (pin <= RK_PD7)) {
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u32 reg0 = 0;
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reg0 = reg + 0x4000 - 0xC; /* PMU2_IOC_BASE */
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ret = regmap_read(regmap, reg0, &val);
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if (ret)
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return ret;
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if (!(val & BIT(8)))
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return ((val >> bit) & mask);
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reg = reg + 0x8000; /* BUS_IOC_BASE */
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regmap = info->regmap_base;
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}
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} else if (bank->bank_num > 0) {
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reg += 0x8000; /* BUS_IOC_BASE */
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}
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}
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ret = regmap_read(regmap, reg, &val);
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if (ret)
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return ret;
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