From 9ddbffdcaa08f586497ba3bef010ac683a544a2c Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Tue, 26 Mar 2019 21:32:21 +0800
Subject: [PATCH] arm64: dts: rockchip: rk1808: Add rk1808k dtsi for wide
 temperature chip

Change-Id: Icf3eebf09276a8cd8917f46cf921d60e7dd9c9ec
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk1808k.dtsi | 51 +++++++++++++++++++++++
 1 file changed, 51 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk1808k.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/rk1808k.dtsi b/arch/arm64/boot/dts/rockchip/rk1808k.dtsi
new file mode 100644
index 000000000000..78bd92e4c2c6
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk1808k.dtsi
@@ -0,0 +1,51 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+&cpu0_opp_table {
+	rockchip,high-temp = <85000>;
+	rockchip,high-temp-max-freq = <1008000>;
+};
+
+&dmc {
+	status = "okay";
+	center-supply = <&vdd_log>;
+	system-status-freq = <
+		/*system status         freq(KHz)*/
+		SYS_STATUS_NORMAL       924000
+		SYS_STATUS_REBOOT       924000
+	>;
+};
+
+&dmc_opp_table {
+	rockchip,high-temp = <85000>;
+	rockchip,high-temp-max-freq = <664000>;
+	rockchip,thermal-zone = "soc-thermal";
+};
+
+&thermal_zones {
+	soc-thermal {
+		sustainable-power = <1224>;
+		k_pu = <27>;
+		k_po = <55>;
+		k_i = <0>;
+
+		trips {
+			trip-point-0 {
+				temperature = <85000>;
+			};
+			trip-point-1 {
+				temperature = <100000>;
+			};
+		};
+		/delete-node/ cooling-maps;
+		cooling-maps {
+			map0 {
+				trip = <&target>;
+				cooling-device =
+					<&npu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+			};
+		};
+	};
+};