From 9ea31d1d20544ba26ccffd5ab004345b770965ac Mon Sep 17 00:00:00 2001 From: Zhang Yubing Date: Mon, 28 Mar 2022 10:55:03 +0800 Subject: [PATCH] drm/rockchip: dw-dp: support force output When config dp show log as force output mode, it will not get edid and detect the connect status(to avoid aux error because sink may be not physical connected). So it should set default color format and link info before show kernel logo, which will be used when select the output color format. Signed-off-by: Zhang Yubing Change-Id: I76ec29cebb101b8629e81eee3d82c93f53cc9102 --- drivers/gpu/drm/rockchip/dw-dp.c | 45 ++++++++++++++++++++++++++++++-- 1 file changed, 43 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/rockchip/dw-dp.c b/drivers/gpu/drm/rockchip/dw-dp.c index 41422f63fcee..77394ea7ce37 100644 --- a/drivers/gpu/drm/rockchip/dw-dp.c +++ b/drivers/gpu/drm/rockchip/dw-dp.c @@ -1932,11 +1932,52 @@ static int dw_dp_bridge_mode_valid(struct drm_bridge *bridge, static void dw_dp_loader_protect(struct drm_encoder *encoder, bool on) { struct dw_dp *dp = encoder_to_dp(encoder); + struct dw_dp_link *link = &dp->link; + struct drm_connector *conn = &dp->connector; + struct drm_display_info *di = &conn->display_info; + + u32 value; + + if (on) { + di->color_formats = DRM_COLOR_FORMAT_RGB444; + di->bpc = 8; + + regmap_read(dp->regmap, DPTX_PHYIF_CTRL, &value); + switch (FIELD_GET(PHY_LANES, value)) { + case 2: + link->lanes = 4; + break; + case 1: + link->lanes = 2; + break; + case 0: + fallthrough; + default: + link->lanes = 1; + break; + } + + switch (FIELD_GET(PHY_RATE, value)) { + case 3: + link->rate = 810000; + break; + case 2: + link->rate = 540000; + break; + case 1: + link->rate = 270000; + break; + case 0: + fallthrough; + default: + link->rate = 162000; + break; + } - if (on) phy_power_on(dp->phy); - else + } else { phy_power_off(dp->phy); + } } static int dw_dp_bridge_attach(struct drm_bridge *bridge,