rk3066:sdk support rk3066 dvfs

This commit is contained in:
chenxing
2012-09-01 17:50:17 +08:00
parent c814af278a
commit 9ebc5a128b
3 changed files with 33 additions and 13 deletions

View File

@@ -1378,7 +1378,7 @@ static void rk30_pm_power_off(void)
static void __init machine_rk30_board_init(void)
{
avs_init();
//avs_init();
gpio_request(POWER_ON_PIN, "poweronpin");
gpio_direction_output(POWER_ON_PIN, GPIO_HIGH);
@@ -1423,27 +1423,31 @@ static void __init rk30_reserve(void)
* comments : min arm/logic voltage
*/
static struct dvfs_arm_table dvfs_cpu_logic_table[] = {
#if 0
{.frequency = 252 * 1000, .cpu_volt = 1075 * 1000, .logic_volt = 1125 * 1000},//0.975V/1.000V
{.frequency = 504 * 1000, .cpu_volt = 1100 * 1000, .logic_volt = 1125 * 1000},//0.975V/1.000V
{.frequency = 816 * 1000, .cpu_volt = 1125 * 1000, .logic_volt = 1150 * 1000},//1.000V/1.025V
#endif
{.frequency = 504 * 1000, .cpu_volt = 975 * 1000, .logic_volt = 1000 * 1000},//0.975V/1.000V
{.frequency = 816 * 1000, .cpu_volt = 1000 * 1000, .logic_volt = 1000 * 1000},//1.000V/1.025V
{.frequency = 1200 * 1000, .cpu_volt = 1025 * 1000, .logic_volt = 1000 * 1000},//1.100V/1.050V
#if 0
{.frequency = 1008 * 1000, .cpu_volt = 1125 * 1000, .logic_volt = 1150 * 1000},//1.025V/1.050V
{.frequency = 1200 * 1000, .cpu_volt = 1175 * 1000, .logic_volt = 1200 * 1000},//1.100V/1.050V
{.frequency = 1272 * 1000, .cpu_volt = 1225 * 1000, .logic_volt = 1200 * 1000},//1.150V/1.100V
{.frequency = 1416 * 1000, .cpu_volt = 1300 * 1000, .logic_volt = 1200 * 1000},//1.225V/1.100V
{.frequency = 1512 * 1000, .cpu_volt = 1350 * 1000, .logic_volt = 1250 * 1000},//1.300V/1.150V
{.frequency = 1608 * 1000, .cpu_volt = 1425 * 1000, .logic_volt = 1300 * 1000},//1.325V/1.175V
#endif
{.frequency = CPUFREQ_TABLE_END},
};
static struct cpufreq_frequency_table dvfs_gpu_table[] = {
{.frequency = 266 * 1000, .index = 1050 * 1000},
{.frequency = 400 * 1000, .index = 1275 * 1000},
{.frequency = 266 * 1000, .index = 1000 * 1000},
{.frequency = 400 * 1000, .index = 1000 * 1000},
{.frequency = CPUFREQ_TABLE_END},
};
static struct cpufreq_frequency_table dvfs_ddr_table[] = {
{.frequency = 300 * 1000, .index = 1050 * 1000},
{.frequency = 400 * 1000, .index = 1125 * 1000},
{.frequency = 300 * 1000, .index = 1000 * 1000},
{.frequency = 400 * 1000, .index = 1000 * 1000},
{.frequency = CPUFREQ_TABLE_END},
};

View File

@@ -3202,7 +3202,7 @@ void __init rk30_clock_data_init(unsigned long gpll, unsigned long cpll, u32 fla
_rk30_clock_data_init(gpll, cpll, flags);
printk("%s end\n", __func__);
rk30_clk_dump_regs();
//rk30_dvfs_init();
rk30_dvfs_init();
}
/*

View File

@@ -266,6 +266,10 @@ static int dvfs_vd_get_newvolt_byclk(struct clk_node *dvfs_clk)
void dvfs_clk_register_set_rate_callback(struct clk *clk, clk_dvfs_target_callback clk_dvfs_target)
{
struct clk_node *dvfs_clk = clk_get_dvfs_info(clk);
if (IS_ERR_OR_NULL(dvfs_clk)){
DVFS_ERR("%s %s get dvfs_clk err\n", __func__, clk->name);
return -1;
}
dvfs_clk->clk_dvfs_target = clk_dvfs_target;
}
@@ -1068,9 +1072,12 @@ int dvfs_target_cpu(struct clk *clk, unsigned long rate_hz)
volt_dep_new = dvfs_vd_get_newvolt_bypd(&vd_core);
if (volt_dep_new <= 0)
goto fail_roll_back;
#ifdef CONFIG_ARCH_RK3066B
ret = dvfs_scale_volt_direct(dvfs_clk->vd, volt_new);
#else
ret = dvfs_scale_volt_bystep(dvfs_clk->vd, &vd_core, volt_new, volt_dep_new,
ARM_HIGHER_LOGIC, LOGIC_HIGHER_ARM);
#endif
if (ret < 0)
goto fail_roll_back;
} else {
@@ -1106,9 +1113,12 @@ int dvfs_target_cpu(struct clk *clk, unsigned long rate_hz)
volt_dep_new = dvfs_vd_get_newvolt_bypd(&vd_core);
if (volt_dep_new <= 0)
goto out;
#ifdef CONFIG_ARCH_RK3066B
ret = dvfs_scale_volt_direct(dvfs_clk->vd, volt_new);
#else
ret = dvfs_scale_volt_bystep(dvfs_clk->vd, &vd_core, volt_new, volt_dep_new,
ARM_HIGHER_LOGIC, LOGIC_HIGHER_ARM);
#endif
if (ret < 0)
goto out;
} else {
@@ -1192,9 +1202,12 @@ int dvfs_target_core(struct clk *clk, unsigned long rate_hz)
if (volt_dep_new < 0)
goto fail_roll_back;
#ifdef CONFIG_ARCH_RK3066B
ret = dvfs_scale_volt_direct(dvfs_clk->vd, volt_new);
#else
ret = dvfs_scale_volt_bystep(dvfs_clk->vd, dvfs_clk_cpu->vd, volt_new, volt_dep_new,
LOGIC_HIGHER_ARM, ARM_HIGHER_LOGIC);
#endif
if (ret < 0)
goto fail_roll_back;
}
@@ -1222,9 +1235,12 @@ int dvfs_target_core(struct clk *clk, unsigned long rate_hz)
if (volt_dep_new < 0)
goto out;
#ifdef CONFIG_ARCH_RK3066B
ret = dvfs_scale_volt_direct(dvfs_clk->vd, volt_new);
#else
ret = dvfs_scale_volt_bystep(dvfs_clk->vd, dvfs_clk_cpu->vd, volt_new, volt_dep_new,
LOGIC_HIGHER_ARM, ARM_HIGHER_LOGIC);
#endif
if (ret < 0)
goto out;
}