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UPSTREAM: soc: qcom: geni-se: Add M_TX_FIFO_NOT_EMPTY bit definition

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According to the docs I have, bit 21 of the status register is
asserted when the FIFO is _not_ empty. Add the definition.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240112150307.1.I7dc0993c1e758a1efedd651e7e1670deb1b430fb@changeid
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 370629635
Change-Id: I1372fe15b0d8b8ee302dccbc81f832be15a93ee5
(cherry picked from commit 486676116f4852d4198690c2c98af060cd96ab83)
Signed-off-by: Praveen Talari <quic_ptalari@quicinc.com>
This commit is contained in:
Douglas Anderson
2024-01-12 15:03:07 -08:00
committed by Treehugger Robot
parent 1790581f0a
commit a137aa79a6
1 changed files with 1 additions and 0 deletions
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1
include/linux/soc/qcom/geni-se.h
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@@ -177,6 +177,7 @@ struct geni_se {
#define M_GP_IRQ_3_EN BIT(12) #define M_GP_IRQ_3_EN BIT(12)
#define M_GP_IRQ_4_EN BIT(13) #define M_GP_IRQ_4_EN BIT(13)
#define M_GP_IRQ_5_EN BIT(14) #define M_GP_IRQ_5_EN BIT(14)
#define M_TX_FIFO_NOT_EMPTY_EN BIT(21)
#define M_IO_DATA_DEASSERT_EN BIT(22) #define M_IO_DATA_DEASSERT_EN BIT(22)
#define M_IO_DATA_ASSERT_EN BIT(23) #define M_IO_DATA_ASSERT_EN BIT(23)
#define M_RX_FIFO_RD_ERR_EN BIT(24) #define M_RX_FIFO_RD_ERR_EN BIT(24)