From a1598b480b63def7af356888b9e5af2fa8905757 Mon Sep 17 00:00:00 2001
From: Ding Wei <leo.ding@rock-chips.com>
Date: Mon, 2 Mar 2020 16:30:16 +0800
Subject: [PATCH] ARM: dts: rockchip: rv1126: match rkvenc encoder

Change-Id: I763d9059ea96cd6e7f0e062b7e6674950180948f
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
---
 arch/arm/boot/dts/rv1126.dtsi | 39 +++++++++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/arch/arm/boot/dts/rv1126.dtsi b/arch/arm/boot/dts/rv1126.dtsi
index 6c8cd71e67ca..0bf8b712f438 100644
--- a/arch/arm/boot/dts/rv1126.dtsi
+++ b/arch/arm/boot/dts/rv1126.dtsi
@@ -128,6 +128,13 @@
 		status = "disabled";
 	};
 
+	mpp_srv: mpp-srv {
+		compatible = "rockchip,mpp-service";
+		rockchip,taskqueue-count = <3>;
+		rockchip,resetgroup-count = <3>;
+		status = "disabled";
+	};
+
 	psci {
 		compatible = "arm,psci-1.0";
 		method = "smc";
@@ -1016,6 +1023,38 @@
 		status = "disabled";
 	};
 
+	rkvenc: rkvenc@ffbb0000 {
+		compatible = "rockchip,rkv-encoder-v1";
+		reg = <0xffbb0000 0x400>;
+		interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "irq_enc";
+		clocks = <&cru ACLK_VENC>, <&cru HCLK_VENC>,
+			<&cru CLK_VENC_CORE>;
+		clock-names = "aclk_vcodec", "hclk_vcodec", "clk_core";
+		resets = <&cru SRST_VENC_A>, <&cru SRST_VENC_H>,
+			<&cru SRST_VENC_CORE>;
+		reset-names = "video_a", "video_h", "video_core";
+		iommus = <&rkvenc_mmu>;
+		node-name = "rkvenc";
+		rockchip,srv = <&mpp_srv>;
+		rockchip,taskqueue-node = <2>;
+		rockchip,resetgroup-node = <2>;
+		status = "disabled";
+	};
+
+	rkvenc_mmu: iommu@ffbb0f00 {
+		compatible = "rockchip,iommu";
+		reg = <0xffbb0f00 0x40>, <0xffbb0f40 0x40>;
+		interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "rkvenc_mmu0", "rkvenc_mmu1";
+		clocks = <&cru ACLK_VENC>, <&cru HCLK_VENC>;
+		clock-names = "aclk", "iface";
+		rockchip,disable-mmu-reset;
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
 	pvtm@ffc00000 {
 		compatible = "rockchip,rv1126-npu-pvtm";
 		reg = <0xffc00000 0x100>;