From a34e2cbc914eb727fbd9cd768a483d5f62e0fdcb Mon Sep 17 00:00:00 2001 From: Sandy Huang Date: Wed, 10 Apr 2024 15:57:54 +0800 Subject: [PATCH] drm/rockchip: dsi2: use mode crtc_* timing for hardware config The mode contains two copies of timings, first are the plain and origin timings, this should keep unchanged, the second are copy from the first timing by add some computed and special fixup, this is associate with hardware. Signed-off-by: Sandy Huang Change-Id: Ie8a3855677606720214e41d99b90b9ff490e1db2 --- drivers/gpu/drm/rockchip/dw-mipi-dsi2-rockchip.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi2-rockchip.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi2-rockchip.c index 17c8b0dfa550..f9d9dba3a1e9 100644 --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi2-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi2-rockchip.c @@ -753,14 +753,14 @@ static void dw_mipi_dsi2_ipi_set(struct dw_mipi_dsi2 *dsi2) if (!(dsi2->mode_flags & MIPI_DSI_MODE_VIDEO)) return; - vact = mode->vdisplay; - vsa = mode->vsync_end - mode->vsync_start; - vfp = mode->vsync_start - mode->vdisplay; - vbp = mode->vtotal - mode->vsync_end; - hact = mode->hdisplay; - hsa = mode->hsync_end - mode->hsync_start; - hbp = mode->htotal - mode->hsync_end; - hline = mode->htotal; + vact = mode->crtc_vdisplay; + vsa = mode->crtc_vsync_end - mode->crtc_vsync_start; + vfp = mode->crtc_vsync_start - mode->crtc_vdisplay; + vbp = mode->crtc_vtotal - mode->crtc_vsync_end; + hact = mode->crtc_hdisplay; + hsa = mode->crtc_hsync_end - mode->crtc_hsync_start; + hbp = mode->crtc_htotal - mode->crtc_hsync_end; + hline = mode->crtc_htotal; pixel_clk = mode->crtc_clock * MSEC_PER_SEC;