From a3ae395ec799d017c7135bd259cbe7935a673f3d Mon Sep 17 00:00:00 2001 From: Simon Xue Date: Mon, 24 Feb 2025 17:19:43 +0800 Subject: [PATCH] iio: adc: rockchip_saradc: fix bitmask for channels on SARADCv2 Change-Id: I07c3a41ca74201ac324821e707fe8ee05d42322d Signed-off-by: Simon Xue --- drivers/iio/adc/rockchip_saradc.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c index a0091aaaf0f1..152de0b29bc2 100644 --- a/drivers/iio/adc/rockchip_saradc.c +++ b/drivers/iio/adc/rockchip_saradc.c @@ -4,6 +4,7 @@ * Copyright (C) 2014 Rockchip Electronics Co., Ltd. */ +#include #include #include #include @@ -52,6 +53,8 @@ #define SARADC2_START BIT(4) #define SARADC2_SINGLE_MODE BIT(5) +#define SARADC2_CONV_CHANNELS GENMASK(3, 0) + struct rockchip_saradc; struct rockchip_saradc_data { @@ -112,10 +115,14 @@ static void rockchip_saradc_start_v2(struct rockchip_saradc *info, writel_relaxed(0xc, info->regs + SARADC_T_DAS_SOC); writel_relaxed(0x20, info->regs + SARADC_T_PD_SOC); - val = SARADC2_EN_END_INT << 16 | SARADC2_EN_END_INT; + val = FIELD_PREP(SARADC2_EN_END_INT, 1); + val |= SARADC2_EN_END_INT << 16; writel_relaxed(val, info->regs + SARADC2_END_INT_EN); - val = SARADC2_START | SARADC2_SINGLE_MODE | chn; - writel(val << 16 | val, info->regs + SARADC2_CONV_CON); + val = FIELD_PREP(SARADC2_START, 1) | + FIELD_PREP(SARADC2_SINGLE_MODE, 1) | + FIELD_PREP(SARADC2_CONV_CHANNELS, chn); + val |= (SARADC2_START | SARADC2_SINGLE_MODE | SARADC2_CONV_CHANNELS) << 16; + writel(val, info->regs + SARADC2_CONV_CON); } static void rockchip_saradc_start(struct rockchip_saradc *info,