From a54cbffb1df20e2c418c3719f24f23aa37950f86 Mon Sep 17 00:00:00 2001
From: Xu Hongfei <xuhf@rock-chips.com>
Date: Wed, 29 May 2019 11:16:49 +0800
Subject: [PATCH] arm64: dts: rockchip: increase the link config of cif in x4
 dts

Change-Id: I1b2dc32d57355cb8b1d947c636436d97a56f8829
Signed-off-by: Xu Hongfei <xuhf@rock-chips.com>
---
 .../arm64/boot/dts/rockchip/rk1808-evb-x4.dts | 37 ++++++++++++++++++-
 1 file changed, 35 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk1808-evb-x4.dts b/arch/arm64/boot/dts/rockchip/rk1808-evb-x4.dts
index 5e58806290a5..2bbae990f335 100644
--- a/arch/arm64/boot/dts/rockchip/rk1808-evb-x4.dts
+++ b/arch/arm64/boot/dts/rockchip/rk1808-evb-x4.dts
@@ -34,7 +34,7 @@
 
 	port {
 		cif_in: endpoint@0 {
-			remote-endpoint = <&dphy_rx_out>;
+			remote-endpoint = <&csi2_out>;
 			data-lanes = <1 2 3 4>;
 		};
 	};
@@ -153,7 +153,7 @@
 	status = "disabled";
 };
 
-&i2c0 {
+&i2c3 {
 	status = "okay";
 
 	vcamera@30 {
@@ -209,8 +209,41 @@
 			#size-cells = <0>;
 
 			dphy_rx_out: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&csi2_in>;
+			};
+		};
+	};
+};
+
+&mipi_csi2 {
+	status = "okay";
+
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			csi2_in: endpoint@1 {
+				reg = <1>;
+				remote-endpoint = <&dphy_rx_out>;
+				data-lanes = <1 2 3 4>;
+			};
+		};
+
+		port@1 {
+			reg = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			csi2_out: endpoint@0 {
 				reg = <0>;
 				remote-endpoint = <&cif_in>;
+				data-lanes = <1 2 3 4>;
 			};
 		};
 	};