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UPSTREAM: clk: rockchip: mark some special clk as critical on rk3368

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The jtag clk no driver to handle them.
But this clk need enable,so make it as critical.

The ddrphy/ddrupctl clks no driver to handle them,
Chip design requirements for these clock to always on,

The pmu_hclk_otg0 is Chip design defect, must be always on,

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org mmind/linux-rockchip.git v4.13-clk/next
 commit 223c24be74)

Conflicts:
	drivers/clk/rockchip/clk-rk3368.c

Change-Id: I31c1c7efb7a83652501a7f53ff5931d9f308f736
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
This commit is contained in:
Elaine Zhang
2017-05-02 15:34:06 +08:00
committed by Huang, Tao
parent ab90e6391b
commit a688f6ff44
1 changed files with 12 additions and 2 deletions
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14
drivers/clk/rockchip/clk-rk3368.c
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@@ -648,7 +648,7 @@ static struct rockchip_clk_branch rk3368_clk_branches[] __initdata = {
GATE(SCLK_MAC_TX, "sclk_mac_tx", "mac_clk", 0,
RK3368_CLKGATE_CON(7), 5, GFLAGS),
GATE(0, "jtag", "ext_jtag", 0,
GATE(0, "jtag", "ext_jtag", CLK_IGNORE_UNUSED,
RK3368_CLKGATE_CON(7), 0, GFLAGS),
COMPOSITE_NODIV(0, "hsic_usbphy_480m", mux_hsic_usbphy480m_p, 0,
@@ -862,8 +862,18 @@ static struct rockchip_clk_branch rk3368_clk_branches[] __initdata = {
static const char *const rk3368_critical_clocks[] __initconst = {
"aclk_bus",
"aclk_peri",
/*
* pwm1 supplies vdd_logic on a lot of boards, is currently unhandled
* but needs to stay enabled there (including its parents) at all times.
*/
"pclk_pwm1",
"pclk_pd_pmu",
"hclk_vio_noc",
"pclk_pd_alive",
"pclk_peri",
"hclk_peri",
"pclk_ddrphy",
"pclk_ddrupctl",
"pmu_hclk_otg0",
};
static void __init rk3368_clk_init(struct device_node *np)