From a6db0e8ae6e2f58e3d6d2ba7f724f581a53dfc29 Mon Sep 17 00:00:00 2001 From: Jacob Chen Date: Thu, 21 Sep 2017 14:24:39 +0800 Subject: [PATCH] clk: rockchip: associate SCLK_MAC_PLL on rk3288 see: http://elixir.free-electrons.com/linux/v4.8/source/Documentation/devicetree/bindings/net/rockchip-dwmac.txt#L32 Change-Id: Ibf94d88219b13f5dd16cfdeb02d1b255e695399f Signed-off-by: Jacob Chen Signed-off-by: Elaine Zhang --- drivers/clk/rockchip/clk-rk3288.c | 2 +- include/dt-bindings/clock/rk3288-cru.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c index 94b30eca148b..e5c8dfccc7cc 100644 --- a/drivers/clk/rockchip/clk-rk3288.c +++ b/drivers/clk/rockchip/clk-rk3288.c @@ -605,7 +605,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = { RK3288_CLKGATE_CON(2), 13, GFLAGS, &rk3288_uart4_fracmux), - COMPOSITE(0, "mac_pll_src", mux_pll_src_npll_cpll_gpll_p, 0, + COMPOSITE(SCLK_MAC_PLL, "mac_pll_src", mux_pll_src_npll_cpll_gpll_p, 0, RK3288_CLKSEL_CON(21), 0, 2, MFLAGS, 8, 5, DFLAGS, RK3288_CLKGATE_CON(2), 5, GFLAGS), MUX(SCLK_MAC, "mac_clk", mux_mac_p, CLK_SET_RATE_PARENT, diff --git a/include/dt-bindings/clock/rk3288-cru.h b/include/dt-bindings/clock/rk3288-cru.h index a9738fd6ecef..33a645ec1c86 100644 --- a/include/dt-bindings/clock/rk3288-cru.h +++ b/include/dt-bindings/clock/rk3288-cru.h @@ -91,6 +91,7 @@ #define SCLK_VIP_OUT 127 #define SCLK_DDRCLK 128 +#define SCLK_MAC_PLL 150 #define SCLK_MAC 151 #define SCLK_MACREF_OUT 152