deinterlace: pq: mtn use different setting for 480i [1/1]

PD#SWPL-14550 Problem: deinterlance1-Chapter#1 in sony test pattern, the "ok" display abnormal. Solution: from yanling(VLSI), bencheng.jing change mxcmbY from 1 to 3; add combing_bias_motion_setting and combing_very_motion_setting for 480i; Verify: x301 Change-Id: Ida2b432af80a2bd5937f13b3f7a4a030b9b0cfaa Signed-off-by: Jihong Sui <jihong.sui@amlogic.com>
2026-06-09 20:32:04 +09:00 · 2019-09-25 16:00:45 +08:00
parent 7a9b205857
commit a72a97b1d2
3 changed files with 138 additions and 23 deletions
--- a/drivers/amlogic/media/deinterlace/deinterlace.c
+++ b/drivers/amlogic/media/deinterlace/deinterlace.c
@@ -3933,6 +3933,7 @@ static unsigned char pre_de_buf_config(void)
 	u32 afbc_busy;
 	u32 is_afbc_mode;
 	bool flg_1080i = false;
+	bool flg_480i = false;

 	if (di_blocking || !atomic_read(&de_devp->mem_flag))
 		return 0;
@@ -4439,6 +4440,9 @@ jiffies_to_msecs(jiffies_64 - vframe->ready_jiffies64));
 		if ((di_buf->vframe->width >= 1920) &&
 		    (di_buf->vframe->height >= 1080))
 			flg_1080i = true;
+		else if ((di_buf->vframe->width == 720) &&
+			 (di_buf->vframe->height == 480))
+			flg_480i = true;

 		/*********************************/
 			if (
@@ -4634,6 +4638,8 @@ jiffies_to_msecs(jiffies_64 - vframe->ready_jiffies64));
 	if (di_pre_stru.combing_fix_en) {
 		if (flg_1080i)
 			com_patch_pre_sw_set(1);
+		else if (flg_480i)
+			com_patch_pre_sw_set(2);
 		else
 			com_patch_pre_sw_set(0);
 	}
--- a/drivers/amlogic/media/deinterlace/deinterlace_mtn.c
+++ b/drivers/amlogic/media/deinterlace/deinterlace_mtn.c
@@ -161,7 +161,6 @@ static unsigned int combing_bias_static_setting[MAX_NUM_DI_REG] = {
 	0x00000166
 };

-
 static unsigned int combing_normal_setting[MAX_NUM_DI_REG] = {
 	0x00202015,
 	0x1A1A3A62,
@@ -226,41 +225,137 @@ static unsigned int combing_very_motion_setting[MAX_NUM_DI_REG] = {
 /**************************************************
 *
 **************************************************/
-static const unsigned int combing_bias_p_1080i[] = {
-	/**/
-	0x40020a04,	/* 11 */
-	/*idea from mingliang.dong & vlsi zheng.bao begin*/
-	0x0001ff0c,
-	0x00400204,
-	0x00016404,
-};
-
+/*same as: combing_bias_motion_setting*/
 static const unsigned int combing_bias_p_ori[] = {
 	/**/
+	0x00202015,	/* 0 */
+	0x1A1A3A62,	/* 1 */
+	0x15200101,	/* 2 */
+	0x01200440,	/* 3 */
+	0x74200D0D,	/* 4 */
+	0x0D5A1520,	/* 5 */
+	0x0A0A0201,	/* 6 */
+	0x1A1A2662,	/* 7 */
+	0x0D200302,	/* 8 */
+	0x02020606,	/* 9 */
+	0x05080344,	/* 10 */
 	0x40020a04,	/* 11 */
 	/*idea from mingliang.dong & vlsi zheng.bao begin*/
 	0x0001FF12, /* 0x0001ff0c */
 	0x00200204, /* 0x00400204 */
 	0x00012002, /* 0x00016404 */
-};
-
-static const unsigned int combing_very_p_1080i[] = {
-	/*idea from mingliang.dong & vlsi zheng.bao begin*/
-	0x40020a04,
-	0x0001ff0c,
-	0x00400204,
-	0x00016404,
 	/*idea from mingliang.dong & vlsi zheng.bao end*/
-
+	0x00000142
 };

 static const unsigned int combing_very_p_ori[] = {
+	0x00202015,	/* 0 */
+	0x1A1A3A62,	/* 1 */
+	0x15200101,	/* 2 */
+	0x01200440,	/* 3 */
+	0x74200D0D,	/* 4 */
+	0x0D5A1520,	/* 5 */
+	0x0A0A0201,	/* 6 */
+	0x1A1A2662,	/* 7 */
+	0x0D200302,	/* 8 */
+	0x02020606,	/* 9 */
+	0x05080344,	/* 10 */
 	/*idea from mingliang.dong & vlsi zheng.bao begin*/
 	0x60000404, /* 0x40020a04*/
 	0x0001FF12, /* 0x0001ff0c */
 	0x00200204, /* 0x00400204 */
 	0x00012002, /* 0x00016404 */
 	/*idea from mingliang.dong & vlsi zheng.bao end*/
+	0x00000131
+};
+
+static const unsigned int combing_bias_p_1080i[] = {
+	/**/
+	0x00202015,	/* 0 */
+	0x1A1A3A62,	/* 1 */
+	0x15200101,	/* 2 */
+	0x01200440,	/* 3 */
+	0x74200D0D,	/* 4 */
+	0x0D5A1520,	/* 5 */
+	0x0A0A0201,	/* 6 */
+	0x1A1A2662,	/* 7 */
+	0x0D200302,	/* 8 */
+	0x02020606,	/* 9 */
+	0x05080344,	/* 10 */
+	0x40020a04,	/* 11 */
+	/*idea from mingliang.dong & vlsi zheng.bao begin*/
+	0x0001ff0c,
+	0x00400204,
+	0x00016404,
+	/*idea from mingliang.dong & vlsi zheng.bao end*/
+	0x00000142
+};
+
+static const unsigned int combing_very_p_1080i[] = {
+	0x00202015,	/* 0 */
+	0x1A1A3A62,	/* 1 */
+	0x15200101,	/* 2 */
+	0x01200440,	/* 3 */
+	0x74200D0D,	/* 4 */
+	0x0D5A1520,	/* 5 */
+	0x0A0A0201,	/* 6 */
+	0x1A1A2662,	/* 7 */
+	0x0D200302,	/* 8 */
+	0x02020606,	/* 9 */
+	0x05080344,	/* 10 */
+	/*idea from mingliang.dong & vlsi zheng.bao begin*/
+	0x40020a04,
+	0x0001ff0c,
+	0x00400204,
+	0x00016404,
+	/*idea from mingliang.dong & vlsi zheng.bao end*/
+	0x00000131
+};
+
+/*same as combing_bias_motion_setting ex:*/
+/*	3nd : from 0x15200101 to 0x15200301*/
+static unsigned int combing_bias_p_480i[] = {
+	0x00202015,	/* 0 */
+	0x1A1A3A62,	/* 1 */
+	0x15200301,	/* 2 */
+	0x01200440,	/* 3 */
+	0x74200D0D,	/* 4 */
+	0x0D5A1520,	/* 5 */
+	0x0A0A0201,	/* 6 */
+	0x1A1A2662,	/* 7 */
+	0x0D200302,	/* 8 */
+	0x02020606,	/* 9 */
+	0x05080344,	/* 10 */
+	0x40020a04,	/* 11 */
+	/*idea from mingliang.dong & vlsi zheng.bao begin*/
+	0x0001FF12, /* 0x0001ff0c */
+	0x00200204, /* 0x00400204 */
+	0x00012002, /* 0x00016404 */
+	/*idea from mingliang.dong & vlsi zheng.bao end*/
+	0x00000142
+};
+
+/*same as combing_very_motion_setting ex:*/
+/*	3nd : from 0x15200101 to 0x15200301*/
+static unsigned int combing_very_p_480i[] = {
+	0x00202015,	/* 0 */
+	0x1A1A3A62,	/* 1 */
+	0x15200301,	/* 2 */
+	0x01200440,	/* 3 */
+	0x74200D0D,	/* 4 */
+	0x0D5A1520,	/* 5 */
+	0x0A0A0201,	/* 6 */
+	0x1A1A2662,	/* 7 */
+	0x0D200302,	/* 8 */
+	0x02020606,	/* 9 */
+	0x05080344,	/* 10 */
+	/*idea from mingliang.dong & vlsi zheng.bao begin*/
+	0x60000404, /* 0x40020a04*/
+	0x0001FF12, /* 0x0001ff0c */
+	0x00200204, /* 0x00400204 */
+	0x00012002, /* 0x00016404 */
+	/*idea from mingliang.dong & vlsi zheng.bao end*/
+	0x00000131
 };

 static unsigned int di_mtn_p_mode;
@@ -268,13 +363,14 @@ static unsigned int di_mtn_p_mode;
 void com_patch_pre_sw_set(unsigned int mode)
 {
 	unsigned int *p1, *p2;
-	/*mode is 0: ori*/
-	/*mode is 1: 1080i*/
+	/* mode is 0: ori */
+	/* mode is 1: 1080i */
+	/* mode is 2: 480i */
 	if (mode == di_mtn_p_mode)
 		return;

-	p1 = &combing_bias_motion_setting[11];
-	p2 = &combing_very_motion_setting[11];
+	p1 = &combing_bias_motion_setting[0];
+	p2 = &combing_very_motion_setting[0];
 	if (mode == 0) {
 		memcpy(p1, &combing_bias_p_ori[0],
 		       sizeof(combing_bias_p_ori));
@@ -287,6 +383,12 @@ void com_patch_pre_sw_set(unsigned int mode)
 		memcpy(p2, &combing_very_p_1080i[0],
 		       sizeof(combing_very_p_1080i));
 		di_mtn_p_mode = 1;
+	} else if (mode == 2) {
+		memcpy(p1, &combing_bias_p_480i[0],
+		       sizeof(combing_bias_p_480i));
+		memcpy(p2, &combing_very_p_480i[0],
+		       sizeof(combing_very_p_480i));
+		di_mtn_p_mode = 2;
 	}
 }

--- a/drivers/amlogic/media/di_multi/deinterlace.c
+++ b/drivers/amlogic/media/di_multi/deinterlace.c
@@ -3761,6 +3761,7 @@ unsigned char dim_pre_de_buf_config(unsigned int channel)
 	struct di_dev_s *de_devp = get_dim_de_devp();
 	int cfg_prog_proc = dimp_get(eDI_MP_prog_proc_config);
 	bool flg_1080i = false;
+	bool flg_480i = false;

 	if (di_blocking || !dip_cma_st_is_ready(channel))
 		return 0;
@@ -4220,6 +4221,10 @@ unsigned char dim_pre_de_buf_config(unsigned int channel)
 		if ((di_buf->vframe->width >= 1920) &&
 		    (di_buf->vframe->height >= 1080))
 			flg_1080i = true;
+		else if ((di_buf->vframe->width == 720) &&
+			 (di_buf->vframe->height == 480))
+			flg_480i = true;
+
 		/*********************************/

 			if (!ppre->di_chan2_buf_dup_p) {
@@ -4410,6 +4415,8 @@ unsigned char dim_pre_de_buf_config(unsigned int channel)
 	if (ppre->combing_fix_en) {
 		if (flg_1080i)
 			get_ops_mtn()->com_patch_pre_sw_set(1);
+		else if (flg_480i)
+			get_ops_mtn()->com_patch_pre_sw_set(2);
 		else
 			get_ops_mtn()->com_patch_pre_sw_set(0);
 	}