From a74f94e41b80d3338c740da4d6b44debcb1d76dc Mon Sep 17 00:00:00 2001
From: Andy Yan <andy.yan@rock-chips.com>
Date: Tue, 10 Nov 2020 16:12:11 +0800
Subject: [PATCH] drm/rockchip: vop2: make clk enable/disable balance

Change-Id: I410c268bd1015d776c7a594a221944b99c312614
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
---
 drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
index 10305111469e..341bd3a8595f 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
@@ -1117,6 +1117,12 @@ err_disable_hclk:
 	return ret;
 }
 
+static void vop2_core_clks_disable(struct vop2 *vop2)
+{
+	clk_disable(vop2->aclk);
+	clk_disable(vop2->hclk);
+}
+
 static void vop2_crtc_load_lut(struct drm_crtc *crtc)
 {
 }
@@ -3501,6 +3507,8 @@ static irqreturn_t vop2_isr(int irq, void *data)
 		if (active_irqs)
 			DRM_ERROR("Unknown axi_bus%d IRQs: %02x\n", i, active_irqs);
 	}
+
+	vop2_core_clks_disable(vop2);
 out:
 	pm_runtime_put(vop2->dev);
 	return ret;