diff --git a/arch/arm/boot/dts/amlogic/mesontxl.dtsi b/arch/arm/boot/dts/amlogic/mesontxl.dtsi new file mode 100644 index 000000000000..9e47e49ff447 --- /dev/null +++ b/arch/arm/boot/dts/amlogic/mesontxl.dtsi @@ -0,0 +1,1517 @@ +/* + * arch/arm/boot/dts/amlogic/mesontxl.dtsi + * + * Copyright (C) 2018 Amlogic, Inc. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include "mesongxbb-gpu-mali450.dtsi" +#include + +/ { + interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <1>; + + cpus:cpus { + #address-cells = <1>; + #size-cells = <0>; + #cooling-cells = <2>; + + /*cpu-map { + cluster0:cluster0 { + core0 { + cpu = <&CPU0>; + }; + core1 { + cpu = <&CPU1>; + }; + core2 { + cpu = <&CPU2>; + }; + core3 { + cpu = <&CPU3>; + }; + }; + };*/ + + CPU0:cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0x0>; + enable-method = "psci"; + clocks = <&scpi_dvfs 0>; + clock-names = "cpu-cluster.0"; + //cpu-idle-states = <&SYSTEM_SLEEP_0>; + }; + + CPU1:cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0x1>; + enable-method = "psci"; + clocks = <&scpi_dvfs 0>; + clock-names = "cpu-cluster.0"; + //cpu-idle-states = <&SYSTEM_SLEEP_0>; + }; + + CPU2:cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0x2>; + enable-method = "psci"; + clocks = <&scpi_dvfs 0>; + clock-names = "cpu-cluster.0"; + //cpu-idle-states = <&SYSTEM_SLEEP_0>; + }; + + CPU3:cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0x3>; + enable-method = "psci"; + clocks = <&scpi_dvfs 0>; + clock-names = "cpu-cluster.0"; + //cpu-idle-states = <&SYSTEM_SLEEP_0>; + }; + + idle-states { + entry-method = "arm,psci"; +/* + CPU_SLEEP_0: cpu-sleep-0 { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x0010000>; + local-timer-stop; + entry-latency-us = <3000>; + exit-latency-us = <3000>; + min-residency-us = <8000>; + }; +*/ + + SYSTEM_SLEEP_0: system-sleep-0 { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x0010000>; + local-timer-stop; + entry-latency-us = <0x3fffffff>; + exit-latency-us = <0x40000000>; + min-residency-us = <0xffffffff>; + }; + + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; + + timer_bc: timer@c1109990 { + compatible = "arm, meson-bc-timer"; + reg = <0xc1109990 0x4 0xc1109994 0x4>; + timer_name = "Meson TimerF"; + clockevent-rating = <300>; + clockevent-shift = <20>; + clockevent-features = <0x23>; + interrupts = <0 60 1>; + bit_enable = <16>; + bit_mode = <12>; + bit_resolution = <0>; + }; + + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = , + , + , + ; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + gic: interrupt-controller@2c001000 { + compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0xc4301000 0x1000>, + <0xc4302000 0x0100>; + interrupts = ; + }; + + clocks { + xtal: xtal-clk { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "xtal"; + #clock-cells = <0>; + }; + }; + + cpu_iomap { + compatible = "amlogic, iomap"; + #address-cells=<1>; + #size-cells=<1>; + ranges; + io_cbus_base { + reg = <0xc1100000 0x100000>; + }; + io_apb_base { + reg = <0xd0000000 0x100000>; + }; + io_aobus_base { + reg = <0xc8100000 0x100000>; + }; + io_vapb_base { + reg = <0xd0100000 0x100000>; + }; + io_hiu_base { + reg = <0xc883c000 0x2000>; + }; + }; + + cpuinfo { + compatible = "amlogic, cpuinfo"; + cpuinfo_cmd = <0x82000044>; + }; + + ram-dump { + compatible = "amlogic, ram_dump"; + status = "okay"; + }; + + securitykey { + compatible = "amlogic, securitykey"; + status = "okay"; + storage_query = <0x82000060>; + storage_read = <0x82000061>; + storage_write = <0x82000062>; + storage_tell = <0x82000063>; + storage_verify = <0x82000064>; + storage_status = <0x82000065>; + storage_list = <0x82000067>; + storage_remove = <0x82000068>; + storage_in_func = <0x82000023>; + storage_out_func = <0x82000024>; + storage_block_func = <0x82000025>; + storage_size_func = <0x82000027>; + storage_set_enctype = <0x8200006A>; + storage_get_enctype = <0x8200006B>; + storage_version = <0x8200006C>; + }; + + mailbox: mhu@c883c400 { + compatible = "amlogic, meson_mhu"; + reg = <0xc883c400 0x4c>, /* MHU registers */ + <0xc8013000 0x800>; /* Payload area */ + interrupts = <0 209 1>, /* low priority interrupt */ + <0 210 1>; /* high priority interrupt */ + #mbox-cells = <1>; + mbox-names = "cpu_to_scp_low", "cpu_to_scp_high"; + mboxes = <&mailbox 0 &mailbox 1>; + }; + + scpi_clocks { + compatible = "arm, scpi-clks"; + + scpi_dvfs: scpi_clocks@0 { + compatible = "arm, scpi-clk-indexed"; + #clock-cells = <1>; + clock-indices = <0>; + clock-output-names = "vcpu"; + }; + + }; + + pinctrl_aobus: pinctrl@c8100014{ + compatible = "amlogic,meson-txl-aobus-pinctrl"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + gpio_ao: ao-bank@c8100014{ + reg = <0xc8100014 0x8>, + <0xc810002c 0x4>, + <0xc8100024 0x8>; + reg-names = "mux", "pull", "gpio"; + gpio-controller; + #gpio-cells = <2>; + }; + }; + + pinctrl_periphs: pinctrl@c88344b0{ + compatible = "amlogic,meson-txl-periphs-pinctrl"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + gpio: banks@c88344b0{ + reg = <0xc88344b0 0x28>, + <0xc88344e8 0x14>, + <0xc8834520 0x14>, + <0xc8834430 0x40>; + reg-names = "mux", + "pull", + "pull-enable", + "gpio"; + gpio-controller; + #gpio-cells = <2>; + }; + }; + + dwc3: dwc3@c9000000 { + compatible = "synopsys, dwc3"; + status = "disable"; + reg = <0xc9000000 0x100000>; + interrupts = <0 30 4>; + usb-phy = <&usb2_phy>, <&usb3_phy>; + cpu-type = "gxl"; + clock-src = "usb3.0"; + }; + + usb2_phy: usb2phy@d0078000 { + compatible = "amlogic, amlogic-new-usb2"; + status = "disable"; + portnum = <4>; + reg = <0xd0078000 0x80 + 0xc1104408 0x4>; + }; + + usb3_phy: usb3phy@d0078080 { + compatible = "amlogic, amlogic-new-usb3"; + status = "disable"; + portnum = <0>; + reg = <0xd0078080 0x20>; + }; + + dwc2_a: dwc2_a@c9100000 { + compatible = "amlogic, dwc2"; + status = "disable"; + reg = <0xc9100000 0x40000>; + interrupts = <0 31 4>; + pl-periph-id = <0>; /** lm name */ + clock-src = "usb0"; /** clock src */ + port-id = <0>; /** ref to mach/usb.h */ + port-type = <2>; /** 0: otg, 1: host, 2: slave */ + port-speed = <0>; /** 0: default, high, 1: full */ + port-config = <0>; /** 0: default */ + port-dma = <0>; + port-id-mode = <0>; /** 0: hardware, 1: sw_host, 2: sw_slave*/ + usb-fifo = <728>; + cpu-type = "gxl"; + phy-reg = <0xd0078000>; + phy-reg-size = <0xa0>; + clocks = <&clkc CLKID_USB_GENERAL + &clkc CLKID_USB1_TO_DDR + &clkc CLKID_USB1>; + clock-names = "usb_general", + "usb1", + "usb1_to_ddr"; + }; + + ethmac: ethernet@0xc9410000 { + compatible = "amlogic, gxbb-eth-dwmac"; + status = "disable"; + reg = <0xc9410000 0x10000 + 0xc8834540 0x8 + 0xc8834558 0xc + 0xc1104484 0x4>; + interrupts = <0 8 1 + 0 9 1>; + phy-mode= "rmii"; + mc_val_internal_phy = <0x1800>; + mc_val_external_phy = <0x1621>; + interrupt-names = "macirq", + "phyirq"; + clocks = <&clkc CLKID_ETH_CORE>; + clock-names = "ethclk81"; + internal_phy=<1>; + }; + + saradc: saradc { + compatible = "amlogic,meson-txl-saradc"; + status = "okay"; + #io-channel-cells = <1>; + clocks = <&xtal>, <&clkc CLKID_SARADC_GATE>; + clock-names = "xtal", "saradc_clk"; + interrupts = ; + reg = <0xc8100600 0x38>; + }; + + jtag { + compatible = "amlogic, jtag"; + status = "okay"; + select = "apao"; /* disable/apao/apee */ + jtagao-gpios = <&gpio_ao GPIOAO_3 0 + &gpio_ao GPIOAO_4 0 + &gpio_ao GPIOAO_5 0 + &gpio_ao GPIOAO_7 0>; + jtagee-gpios = <&gpio CARD_0 0 + &gpio CARD_1 0 + &gpio CARD_2 0 + &gpio CARD_3 0>; + }; + + meson_suspend: pm { + compatible = "amlogic, pm"; + status = "okay"; + reg = <0xc81000a8 0x4>, + <0xc810023c 0x4>; + }; + + reboot { + compatible = "amlogic,reboot"; + sys_reset = <0x84000009>; + sys_poweroff = <0x84000008>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + cbus: bus@c1100000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0xc1100000 0x100000>; + ranges = <0x0 0xc1100000 0x100000>; + + meson_clk_msr@875c{ + compatible = "amlogic, gxl_measure"; + reg = <0x875c 0x4 + 0x8764 0x4>; + }; + + /*i2c-A*/ + i2c0: i2c@8500 { + compatible = "amlogic,meson-txl-i2c"; + status = "disabled"; + reg = <0x8500 0x20>; + interrupts = , + ; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkc CLKID_I2C>; + }; + + /*i2c-B*/ + i2c1: i2c@87c0 { + compatible = "amlogic,meson-txl-i2c"; + status = "disabled"; + reg = <0x87c0 0x20>; + interrupts = , + ; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkc CLKID_I2C>; + }; + + /*i2c-C*/ + i2c2: i2c@87e0 { + compatible = "amlogic,meson-txl-i2c"; + status = "disabled"; + reg = <0x87e0 0x20>; + interrupts = , + ; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkc CLKID_I2C>; + }; + + /*i2c-D*/ + i2c3: i2c@8d20 { + compatible = "amlogic,meson-txl-i2c"; + status = "disabled"; + reg = <0x8d20 0x20>; + interrupts = , + ; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkc CLKID_I2C>; + }; + + pwm_ab: pwm@8550 { + compatible = "amlogic,txl-ee-pwm"; + reg = <0x8550 0x1c>; + #pwm-cells = <3>; + clocks = <&xtal>, + <&xtal>, + <&xtal>, + <&xtal>; + clock-names = "clkin0", + "clkin1", + "clkin2", + "clkin3"; + status = "disabled"; + }; + + pwm_cd: pwm@8640 { + compatible = "amlogic,txl-ee-pwm"; + reg = <0x8640 0x1c>; + #pwm-cells = <3>; + clocks = <&xtal>, + <&xtal>, + <&xtal>, + <&xtal>; + clock-names = "clkin0", + "clkin1", + "clkin2", + "clkin3"; + status = "disabled"; + }; + + pwm_ef: pwm@86c0 { + compatible = "amlogic,txl-ee-pwm"; + reg = <0x86c0 0x1c>; + #pwm-cells = <3>; + status = "disabled"; + }; + + spicc: spi@8d80 { + compatible = "amlogic,meson-txl-spicc", + "amlogic,meson-txlx-spicc"; + reg = <0x8d80 0x3c>; + interrupts = ; + clocks = <&clkc CLKID_SPICC0>; + clock-names = "core"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + uart_A: serial@84c0 { + compatible = "amlogic, meson-uart"; + reg = <0x84c0 0x18>; + interrupts = <0 26 1>; + status = "disabled"; + clocks = <&xtal &clkc CLKID_UART0>; + clock-names = "clk_uart", "clk_gate"; + fifosize = < 128 >; + pinctrl-names = "default"; + pinctrl-0 = <&a_uart_pins>; + }; + + uart_B: serial@84dc { + compatible = "amlogic, meson-uart"; + reg = <0x84dc 0x18>; + interrupts = <0 75 1>; + status = "disabled"; + clocks = <&xtal &clkc CLKID_UART1>; + clock-names = "clk_uart", "clk_gate"; + fifosize = < 64 >; + pinctrl-names = "default"; + pinctrl-0 = <&b_uart_pins>; + }; + + uart_C: serial@8700 { + compatible = "amlogic, meson-uart"; + reg = <0x8700 0x18>; + interrupts = <0 93 1>; + status = "disabled"; + clocks = <&xtal &clkc CLKID_UART2>; + clock-names = "clk_uart", "clk_gate"; + fifosize = < 64 >; + pinctrl-names = "default"; + pinctrl-0 = <&c_uart_pins>; + }; + + gpio_intc: interrupt-controller@9880 { + compatible = "amlogic,meson-gpio-intc", + "amlogic,meson-txl-gpio-intc"; + reg = <0x9880 0x10>; + interrupt-controller; + #interrupt-cells = <2>; + amlogic,channel-interrupts = + <64 65 66 67 68 69 70 71>; + status = "okay"; + }; + + wdt_ee: watchdog@98d0 { + compatible = "amlogic,meson-txl-wdt"; + status = "okay"; + reg = <0x98d0 0x10>; + clock-names = "xtal"; + clocks = <&xtal>; + }; + + }; /* end of cbus */ + + aobus: bus@c8100000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0xc8100000 0x100000>; + ranges = <0x0 0xc8100000 0x100000>; + + cpu_version { + reg=<0x220 0x4>; + }; + + aoclkc: clock-controller@0 { + compatible = "amlogic,txl-aoclkc"; + #clock-cells = <1>; + reg = <0x0 0x1000>; + }; + + uart_AO: serial@4c0 { + compatible = "amlogic, meson-uart"; + reg = <0x4c0 0x18>; + interrupts = <0 193 1>; + status = "okay"; + clocks = <&xtal>; + clock-names = "clk_uart"; + xtal_tick_en = <1>; + fifosize = < 64 >; + pinctrl-names = "default"; + /*pinctrl-0 = <&ao_uart_pins>;*/ + /* 0 not support;1 support */ + support-sysrq = <0>; + }; + + uart_AO_B: serial@04e0 { + compatible = "amlogic, meson-uart"; + reg = <0x04e0 0x18>; + interrupts = <0 197 1>; + status = "disabled"; + clocks = <&xtal>; + clock-names = "clk_uart"; + fifosize = < 64 >; + pinctrl-names = "default"; + pinctrl-0 = <&ao_b_uart_pins>; + }; + + i2c_AO: i2c@0500 { + compatible = "amlogic,meson-txl-i2c"; + status = "disabled"; + reg = <0x0500 0x20>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkc CLKID_I2C>; + }; + + pwm_aoab: pwm@0550 { + compatible = "amlogic,txl-ao-pwm"; + reg = <0x0550 0x1c>; + #pwm-cells = <3>; + clocks = <&xtal>, + <&xtal>, + <&xtal>, + <&xtal>; + clock-names = "clkin0", + "clkin1", + "clkin2", + "clkin3"; + status = "disabled"; + }; + + remote:rc@0580 { + compatible = "amlogic, aml_remote"; + dev_name = "meson-remote"; + reg = <0x0580 0x44>, + <0x0480 0x20>; + status = "okay"; + protocol = ; + interrupts = <0 196 1>; + pinctrl-names = "default"; + pinctrl-0 = <&remote_pins>; + map = <&custom_maps>; + max_frame_time = <200>; + }; + }; /* end of aobus*/ + + periphs: periphs@c8834000 { + compatible = "simple-bus"; + reg = <0xc8834000 0x2000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0xc8834000 0x2000>; + + rng { + compatible = "amlogic,meson-rng"; + reg = <0x0 0x4>; + quality = /bits/ 16 <1000>; + }; + };/* end of periphs */ + + hiubus: bus@c883c000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0xc883c000 0x2000>; + ranges = <0x0 0xc883c000 0x2000>; + + clkc: clock-controller@0 { + compatible = "amlogic,txl-clkc"; + #clock-cells = <1>; + reg = <0x0 0x3fc>; + }; + };/* end of hiubus*/ + + }; /* end of soc*/ + + custom_maps: custom_maps { + mapnum = <3>; + map0 = <&map_0>; + map1 = <&map_1>; + map2 = <&map_2>; + map_0: map_0{ + mapname = "amlogic-remote-1"; + customcode = <0xfb04>; + release_delay = <80>; + size = <44>; /*keymap size*/ + keymap = ; + }; + + map_1: map_1{ + mapname = "amlogic-remote-2"; + customcode = <0xfe01>; + release_delay = <80>; + size = <53>; + keymap = ; + }; + + map_2: map_2{ + mapname = "amlogic-remote-3"; + customcode = <0xbd02>; + release_delay = <80>; + size = <17>; + keymap = ; + }; + }; + + aocec: aocec@0xc8100000 { + compatible = "amlogic, aocec-txl"; + status = "okay"; + vendor_name = "Amlogic"; /* Max Chars: 8 */ + /* Refer to the following URL at: + * http://standards.ieee.org/develop/regauth/oui/oui.txt + */ + vendor_id = <0x000000>; + product_desc = "TXL"; /* Max Chars: 16 */ + cec_osd_string = "AML_TV"; /* Max Chars: 14 */ + port_num = <3>; + ee_cec; + arc_port_mask = <0x2>; + interrupts = <0 56 1 + 0 199 1>; + interrupt-names = "hdmi_aocecb","hdmi_aocec"; + pinctrl-names = "default","hdmitx_aocecb","cec_pin_sleep"; + pinctrl-0=<&hdmitx_aocec>; + pinctrl-1=<&hdmitx_aocecb>; + pinctrl-2=<&hdmitx_aocec>; + reg = <0xc810023c 0x4 + 0xc8100000 0x200 + 0xda83e000 0x10 + 0xc883c000 0x400>; + reg-names = "ao_exit","ao","hdmirx","hhi"; + }; + + canvas: canvas{ + compatible = "amlogic, meson, canvas"; + dev_name = "amlogic-canvas"; + status = "okay"; + reg = <0xc8838000 0x2000>; + }; + + codec_io: codec_io { + compatible = "amlogic, codec_io"; + status = "okay"; + #address-cells=<1>; + #size-cells=<1>; + ranges; + io_cbus_base{ + reg = <0xC1100000 0x100000>; + }; + io_dos_base{ + reg = <0xc8820000 0x10000>; + }; + io_hiubus_base{ + reg = <0xc883c000 0x2000>; + }; + io_aobus_base{ + reg = <0xc8100000 0x100000>; + }; + io_vcbus_base{ + reg = <0xd0100000 0x40000>; + }; + io_dmc_base{ + reg = <0xc8838000 0x400>; + }; + }; + + vpu { + compatible = "amlogic, vpu-txl"; + dev_name = "vpu"; + status = "okay"; + clocks = <&clkc CLKID_VAPB_MUX>, + <&clkc CLKID_VPU_INTR>, + <&clkc CLKID_VPU_P0_COMP>, + <&clkc CLKID_VPU_P1_COMP>, + <&clkc CLKID_VPU_MUX>; + clock-names = "vapb_clk", + "vpu_intr_gate", + "vpu_clk0", + "vpu_clk1", + "vpu_clk"; + clk_level = <7>; + /* 0: 100.0M 1: 166.7M 2: 200.0M 3: 250.0M */ + /* 4: 333.3M 5: 400.0M 6: 500.0M 7: 666.7M */ + }; + + ge2d { + compatible = "amlogic, ge2d-txl"; + status = "okay"; + interrupts = <0 146 1>; + interrupt-names = "ge2d"; + clocks = <&clkc CLKID_VAPB_MUX>, + <&clkc CLKID_G2D>, + <&clkc CLKID_GE2D_GATE>; + clock-names = "clk_vapb_0", + "clk_ge2d", + "clk_ge2d_gate"; + reg = <0xd0160000 0x10000>; + }; + + meson-amvideom { + compatible = "amlogic, amvideom"; + status = "okay"; + interrupts = <0 3 1>; + interrupt-names = "vsync"; + }; + + mesonstream { + compatible = "amlogic, codec, streambuf"; + status = "okay"; + clocks = <&clkc CLKID_DOS_PARSER + &clkc CLKID_DEMUX + &clkc CLKID_DOS + &clkc CLKID_CLK81 + &clkc CLKID_VDEC_MUX + &clkc CLKID_HCODEC_MUX + &clkc CLKID_HEVC_MUX>; + clock-names = "parser_top", + "demux", + "vdec", + "clk_81", + "clk_vdec_mux", + "clk_hcodec_mux", + "clk_hevc_mux"; + }; + + codec_mm { + compatible = "amlogic, codec, mm"; + status = "okay"; + memory-region = <&codec_mm_cma &codec_mm_reserved>; + }; + + vdec { + compatible = "amlogic, vdec"; + status = "okay"; + interrupts = <0 3 1 + 0 23 1 + 0 32 1 + 0 43 1 + 0 44 1 + 0 45 1>; + interrupt-names = "vsync", + "demux", + "parser", + "mailbox_0", + "mailbox_1", + "mailbox_2"; + }; + + amvenc_avc { + compatible = "amlogic, amvenc_avc"; + status = "okay"; + //memory-region = <&amvenc_avc_reserved>; + //memory-region = <&avc_cma_reserved>; + interrupts = <0 45 1>; + interrupt-names = "mailbox_2"; + }; + + rdma { + compatible = "amlogic, meson, rdma"; + dev_name = "amlogic-rdma"; + status = "okay"; + interrupts = <0 89 1>; + interrupt-names = "rdma"; + }; + + audio_data: audio_data { + compatible = "amlogic, audio_data"; + query_licence_cmd = <0x82000050>; + status = "disabled"; + }; + + efuse: efuse { + compatible = "amlogic, efuse"; + read_cmd = <0x82000030>; + write_cmd = <0x82000031>; + get_max_cmd = <0x82000033>; + key = <&efusekey>; + clocks = <&clkc CLKID_EFUSE>; + clock-names = "efuse_clk"; + status = "disabled"; + }; + + efusekey:efusekey { + keynum = <4>; + key0 = <&key_0>; + key1 = <&key_1>; + key2 = <&key_2>; + key3 = <&key_3>; + key_0:key_0 { + keyname = "mac"; + offset = <0>; + size = <6>; + }; + key_1:key_1 { + keyname = "mac_bt"; + offset = <6>; + size = <6>; + }; + key_2:key_2 { + keyname = "mac_wifi"; + offset = <12>; + size = <6>; + }; + key_3:key_3 { + keyname = "usid"; + offset = <18>; + size = <16>; + }; + }; + + cpu_ver_name { + compatible = "amlogic, cpu-major-id-txl"; + status = "okay"; + }; + + ddr_bandwidth { + compatible = "amlogic, ddr-bandwidth"; + status = "okay"; + reg = <0xc8838000 0x100 + 0xc8837000 0x100>; + interrupts = <0 52 1>; + interrupt-names = "ddr_bandwidth"; + }; + dmc_monitor { + compatible = "amlogic, dmc_monitor"; + status = "okay"; + reg_base = <0xda838400>; + interrupts = <0 51 1>; + }; +}; /* end of / */ + +&gpu{ + /*gpu max freq is 750M*/ + tbl = <&clk285_cfg &clk400_cfg &clk500_cfg &clk666_cfg &clk750_cfg>; +}; + +&pinctrl_aobus { + + pwm_ao_a_ao3_pins: pwm_ao_a_ao3 { + mux { + groups = "pwm_ao_a_ao3"; + function = "pwm_ao_a"; + }; + }; + + pwm_ao_a_ao7_pins: pwm_ao_a_ao7 { + mux { + groups = "pwm_ao_a_ao7"; + function = "pwm_ao_a"; + }; + }; + + pwm_ao_b_ao8_pins: pwm_ao_b_ao8 { + mux { + groups = "pwm_ao_b_ao8"; + function = "pwm_ao_b"; + }; + }; + + pwm_ao_b_ao9_pins: pwm_ao_b_ao9 { + mux { + groups = "pwm_ao_b_ao9"; + function = "pwm_ao_b"; + }; + }; + + remote_pins:remote_pin { + mux { + groups = "remote_in"; + function = "ir_in"; + }; + + }; + + sd_to_ao_uart_clr_pins:sd_to_ao_uart_clr_pins { + mux { + groups = "GPIOAO_0", + "GPIOAO_1"; + function = "gpio_aobus"; + }; + }; + + sd_to_ao_uart_pins:sd_to_ao_uart_pins { + mux { + groups = "uart_tx_ao_a", + "uart_rx_ao_a"; + function = "uart_ao_a"; + bias-pull-up; + input-enable; + }; + }; + + i2c_AO_pins:i2c_AO { + mux { + groups = "i2c_sck_ao", + "i2c_sda_ao"; + function = "i2c_ao"; + }; + }; + + ao_uart_pins:ao_uart { + mux { + groups = "uart_tx_ao_a", + "uart_rx_ao_a"; + function = "uart_ao_a"; + }; + }; + + ao_b_uart_pins:ao_b_uart { + mux { + groups = "uart_tx_ao_b_ao4", + "uart_rx_ao_b_ao5"; + function = "uart_ao_b"; + }; + }; + + hdmitx_aocec: ao_cec { + mux { + groups = "ao_cec"; + function = "ao_cec"; + }; + }; + + hdmitx_aocecb: ao_cecb { + mux { + groups = "ee_cec"; + function = "ee_cec"; + }; + }; +}; + +&pinctrl_periphs { + + pwm_a_z5_pins: pwm_a_z5 { + mux { + groups = "pwm_a_z"; + function = "pwm_a"; + }; + }; + + pwm_a_dv2_pins: pwm_a_dv2 { + mux { + groups = "pwm_a_dv"; + function = "pwm_a"; + }; + }; + + pwm_b_z6_pins: pwm_b_z6 { + mux { + groups = "pwm_b_z"; + function = "pwm_b"; + }; + }; + + pwm_b_dv3_pins: pwm_b_dv3 { + mux { + groups = "pwm_b_dv"; + function = "pwm_b"; + }; + }; + + pwm_c_z7_pins: pwm_c_z7 { + mux { + groups = "pwm_c"; + function = "pwm_c"; + }; + }; + + pwm_d_z4_pins: pwm_d_z4 { + mux { + groups = "pwm_d_z4"; + function = "pwm_d"; + }; + }; + + pwm_d_z19_pins: pwm_d_z19 { + mux { + groups = "pwm_d_z19"; + function = "pwm_d"; + }; + }; + + pwm_e_h4_pins: pwm_e_h4 { + mux { + groups = "pwm_e_h4"; + function = "pwm_e"; + }; + }; + + pwm_e_h8_pins: pwm_e_h8 { + mux { + groups = "pwm_e_h8"; + function = "pwm_e"; + }; + }; + + pwm_f_h9_pins: pwm_f_h9 { + mux { + groups = "pwm_f_h"; + function = "pwm_f"; + }; + }; + + pwm_f_clk_pins: pwm_f_clk { + mux { + groups = "pwm_f_clk"; + function = "pwm_f"; + }; + }; + + pwm_vs_dv2_pins: pwm_vs_dv2 { + mux { + groups = "pwm_vs_dv2"; + function = "pwm_vs"; + }; + }; + + pwm_vs_dv3_pins: pwm_vs_dv3 { + mux { + groups = "pwm_vs_dv3"; + function = "pwm_vs"; + }; + }; + + pwm_vs_z4_pins: pwm_vs_z4 { + mux { + groups = "pwm_vs_z4"; + function = "pwm_vs"; + }; + }; + + pwm_vs_z6_pins: pwm_vs_z6 { + mux { + groups = "pwm_vs_z6"; + function = "pwm_vs"; + }; + }; + + pwm_vs_z7_pins: pwm_vs_z7 { + mux { + groups = "pwm_vs_z7"; + function = "pwm_vs"; + }; + }; + + pwm_vs_z19_pins: pwm_vs_z19 { + mux { + groups = "pwm_vs_z19"; + function = "pwm_vs"; + }; + }; + + ao_to_sd_uart_clr_pins:ao_to_sd_uart_clr_pins { + mux { + groups = "sdcard_d2", + "sdcard_d3"; + function = "sdcard"; + input-enable; + bias-pull-up; + }; + }; + + sd_1bit_pins:sd_1bit_pins { + mux { + groups = "sdcard_d0", + "sdcard_cmd", + "sdcard_clk"; + function = "sdcard"; + input-enable; + bias-pull-up; + }; + }; + + ao_to_sd_uart_pins:ao_to_sd_uart_pins { + mux { + groups = "uart_tx_ao_a_c4", + "uart_rx_ao_a_c5"; + function = "uart_ao_a_ee"; + bias-pull-up; + input-enable; + }; + }; + + emmc_clk_cmd_pins:emmc_clk_cmd_pins { + mux { + groups = "emmc_cmd", + "emmc_clk"; + function = "emmc"; + input-enable; + bias-pull-up; + }; + }; + + + emmc_conf_pull_up:emmc_conf_pull_up { + mux { + groups = "emmc_nand_d07", + "emmc_clk", + "emmc_cmd"; + function = "emmc"; + input-enable; + bias-pull-up; + }; + }; + + emmc_conf_pull_done:emmc_conf_pull_done { + mux { + groups = "emmc_ds"; + function = "emmc"; + input-enable; + bias-pull-down; + }; + }; + + spifc_cs_pin:spifc_cs_pin { + mux { + groups = "nor_cs"; + function = "nor"; + bias-pull-up; + }; + }; + + spifc_pulldown: spifc_pulldown { + mux { + groups = "nor_d", + "nor_q", + "nor_c"; + function = "nor"; + bias-pull-down; + }; + }; + + spifc_pullup: spifc_pullup { + mux { + groups = "nor_cs"; + function = "nor"; + bias-pull-up; + }; + }; + + spifc_all_pins: spifc_all_pins { + mux { + groups = "nor_d", + "nor_q", + "nor_c"; + function = "nor"; + input-enable; + bias-pull-down; + }; + }; + + sd_clk_cmd_pins:sd_clk_cmd_pins{ + mux { + groups = "sdcard_cmd", + "sdcard_clk"; + function = "sdcard"; + input-enable; + bias-pull-up; + }; + }; + + sd_all_pins:sd_all_pins{ + mux { + groups = "sdcard_d0", + "sdcard_d1", + "sdcard_d2", + "sdcard_d3", + "sdcard_cmd", + "sdcard_clk"; + function = "sdcard"; + input-enable; + bias-pull-up; + }; + }; + + hdmirx_a_mux:hdmirx_a_mux { + mux { + groups = "hdmirx_hpd_a", "hdmirx_det_a", + "hdmirx_sda_a", "hdmirx_sck_a"; + function = "hdmirx_a"; + }; + }; + + hdmirx_b_mux:hdmirx_b_mux { + mux { + groups = "hdmirx_hpd_b", "hdmirx_det_b", + "hdmirx_sda_b", "hdmirx_sck_b"; + function = "hdmirx_b"; + }; + }; + + hdmirx_c_mux:hdmirx_c_mux { + mux { + groups = "hdmirx_hpd_c", "hdmirx_det_c", + "hdmirx_sda_c", "hdmirx_sck_c"; + function = "hdmirx_c"; + }; + }; + + hdmirx_d_mux:hdmirx_d_mux { + mux { + groups = "hdmirx_hpd_d", "hdmirx_det_d", + "hdmirx_sda_d", "hdmirx_sck_d"; + function = "hdmirx_d"; + }; + }; + + i2c0_z_pins:i2c0_z { + mux { + groups = "i2c0_sda", + "i2c0_sck"; + function = "i2c0"; + }; + }; + + i2c1_dv_pins:i2c1_z { + mux { + groups = "i2c1_sda", + "i2c1_sck"; + function = "i2c1"; + }; + }; + + i2c2_h_pins:i2c2_h { + mux { + groups = "i2c2_sda", + "i2c2_sck"; + function = "i2c2"; + }; + }; + + i2c3_z_pins:i2c3_z { + mux { + groups = "i2c3_sda", + "i2c3_sck"; + function = "i2c3"; + }; + }; + + a_uart_pins:a_uart { + mux { + groups = "uart_tx_a", + "uart_rx_a", + "uart_cts_a", + "uart_rts_a"; + function = "uart_a"; + }; + }; + + b_uart_pins:b_uart { + mux { + groups = "uart_tx_b", + "uart_rx_b"; + function = "uart_b"; + }; + }; + + c_uart_pins:c_uart { + mux { + groups = "uart_tx_c", + "uart_rx_c"; + function = "uart_c"; + }; + }; + + lcd_vbyone_pins: lcd_vbyone_pin { + mux { + groups = "vx1_lockn","vx1_htpdn"; + function = "vbyone"; + }; + }; + + atvdemod_agc_pins: atvdemod_agc_pins { + mux { + groups = "atv_if_agc"; + function = "atv"; + }; + }; + + dtvdemod_agc_pins: dtvdemod_agc_pins { + mux { + groups = "dtv_if_agc"; + function = "dtv"; + }; + }; + + spicc_pins: spicc { + mux { + groups = "spi_miso_a", + "spi_mosi_a", + "spi_clk_a"; + function = "spi_a"; + }; + }; +}; diff --git a/arch/arm/boot/dts/amlogic/mesontxl_p321-panel.dtsi b/arch/arm/boot/dts/amlogic/mesontxl_p321-panel.dtsi new file mode 100644 index 000000000000..be35ec6959b0 --- /dev/null +++ b/arch/arm/boot/dts/amlogic/mesontxl_p321-panel.dtsi @@ -0,0 +1,592 @@ +/* + * arch/arm/boot/dts/amlogic/mesontxl_p321-panel.dtsi + * + * Copyright (C) 2016 Amlogic, Inc. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + */ + +/ { + lcd { + compatible = "amlogic, lcd-txl"; + dev_name = "lcd"; + mode = "tv"; + status = "okay"; + fr_auto_policy = <1>; /* 0=disable, 1=60/50hz, 2=60/50/48hz */ + key_valid = <1>; + clocks = <&clkc CLKID_VCLK2_ENCL + &clkc CLKID_VCLK2_VENCL>; + clock-names = "encl_top_gate", + "encl_int_gate"; + reg = <0xc8834400 0x100>; + interrupts = <0 3 1 + 0 78 1>; + interrupt-names = "vsync","vbyone"; + pinctrl-names = "vbyone"; + pinctrl-0 = <&lcd_vbyone_pins>; + pinctrl_version = <2>; /* for uboot */ + + /* power type:(0=cpu_gpio, 2=signal, 3=extern, 0xff=ending) */ + /* power index:(gpios_index, or extern_index, 0xff=invalid) */ + /* power value:(0=output low, 1=output high, 2=input) */ + /* power delay:(unit in ms) */ + lcd_cpu-gpios = <&gpio GPIOH_7 GPIO_ACTIVE_HIGH + &gpio GPIOH_6 GPIO_ACTIVE_HIGH + &gpio GPIOH_4 GPIO_ACTIVE_HIGH + &gpio GPIOH_5 GPIO_ACTIVE_HIGH>; + lcd_cpu_gpio_names = "GPIOH_7","GPIOH_6", + "GPIOH_6","GPIOH_5"; + + lvds_0{ + model_name = "1080p-vfreq"; + interface = "lvds"; /*lcd_interface(lvds, vbyone)*/ + basic_setting = < + 1920 1080 /*h_active, v_active*/ + 2200 1125 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 2060 2650 /*h_period_min,max*/ + 1100 1480 /*v_period_min,max*/ + 120000000 160000000>; /*pclk_min,max*/ + lcd_timing = < + 44 148 0 /*hs_width, hs_bp, hs_pol*/ + 5 30 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 3 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + lvds_attr = < + 1 /*lvds_repack*/ + 1 /*dual_port*/ + 0 /*pn_swap*/ + 0 /*port_swap*/ + 0>; /*lane_reverse*/ + phy_attr=< + 3 0 /*vswing_level, preem_level*/ + 0 0>; /*clk vswing_level, preem_level*/ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 2 0 0 0 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0>; + }; + lvds_1{ + model_name = "1080p-hfreq_hdmi"; + interface = "lvds"; /*lcd_interface(lvds, vbyone)*/ + basic_setting = < + 1920 1080 /*h_active, v_active*/ + 2200 1125 /*h_period, v_period*/ + 8 /*lcd_bits*/ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 2080 2720 /*h_period min, max*/ + 1100 1380 /*v_period min, max*/ + 133940000 156000000>; /*pclk_min, max*/ + lcd_timing = < + 44 148 0 /*hs_width, hs_bp, hs_pol*/ + 5 30 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 4 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level */ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + lvds_attr = < + 1 /*lvds_repack*/ + 1 /*dual_port*/ + 0 /*pn_swap*/ + 0 /*port_swap*/ + 0>; /*lane_reverse*/ + phy_attr=< + 3 0 /*vswing_level, preem_level*/ + 0 0>; /*clk vswing_level, preem_level*/ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 2 0 0 0 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0>; + }; + lvds_2{ + model_name = "768p-vfreq"; + interface = "lvds"; /*lcd_interface(lvds, vbyone)*/ + basic_setting = < + 1366 768 /*h_active, v_active*/ + 1560 806 /*h_period, v_period*/ + 8 /*lcd_bits*/ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 1460 2000 /*h_period_min, max */ + 784 1015 /*v_period_min, max */ + 50000000 85000000>; /*pclk_min, max*/ + lcd_timing = < + 56 64 0 /*hs_width, hs_bp, hs_pol*/ + 3 28 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 3 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + lvds_attr = < + 1 /*lvds_repack*/ + 0 /*dual_port*/ + 0 /*pn_swap*/ + 0 /*port_swap*/ + 0>; /*lane_reverse*/ + phy_attr=< + 3 0 /*vswing_level, preem_level*/ + 0 0>; /*clk vswing_level, preem_level*/ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 2 0 0 0 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0>; + }; + vbyone_0{ + model_name = "ref_2region"; + interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 4400 2250 /*h_period, v_period*/ + 10 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 4800 /*h_period_min, max*/ + 2200 2760 /*v_period_min, max*/ + 480000000 624000000>; /*pclk_min, max*/ + lcd_timing = < + 33 477 0 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 1 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + vbyone_attr = < + 8 /*lane_count*/ + 2 /*region_num*/ + 4 /*byte_mode*/ + 4>; /*color_fmt*/ + vbyone_intr_enable = < + 1 /*vbyone_intr_enable */ + 3>; /*vbyone_vsync_intr_enable*/ + phy_attr=<3 0>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = <0 0 1 20 /*panel power on*/ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = <2 0 0 10 /*signal disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <3>; + }; + vbyone_1{ + model_name = "ref_1region"; + interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 4400 2250 /*h_period, v_period*/ + 10 /*lcd_bits*/ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 4800 /*h_period_min, max*/ + 2200 2790 /*v_period_min, max*/ + 552000000 632000000>; /*pclk_min,max*/ + lcd_timing = < + 33 477 0 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 1 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + vbyone_attr = < + 8 /*lane_count*/ + 1 /*region_num*/ + 4 /*byte_mode*/ + 4>; /*color_fmt*/ + vbyone_intr_enable = < + 1 /*vbyone_intr_enable*/ + 3>; /*vbyone_vsync_intr_enable*/ + phy_attr=<3 0>; /*vswing_level, preem_level*/ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <3>; + }; + vbyone_2{ + model_name = "ref_2region_hdmi"; + interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 4400 2250 /*h_period, v_period*/ + 10 /*lcd_bits*/ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 4800 /*h_period_min, max*/ + 2200 2760 /*v_period_min, max*/ + 480000000 624000000>; /*v_period_min, max*/ + lcd_timing = < + 33 477 0 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 4 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + vbyone_attr = < + 8 /*lane_count*/ + 2 /*region_num*/ + 4 /*byte_mode*/ + 4>; /*color_fmt*/ + vbyone_intr_enable = < + 1 /*vbyone_intr_enable*/ + 3>; /*vbyone_vsync_intr_enable*/ + phy_attr=<3 0>; /*vswing_level, preem_level*/ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <3>; + }; + vbyone_3{ + model_name = "BOE_HV550QU2"; + interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 4400 2250 /*h_period, v_period*/ + 10 /*lcd_bits*/ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 4800 /*h_period_min, max*/ + 2200 2760 /*v_period_min, max*/ + 560000000 624000000>; /*pclk_min, max*/ + lcd_timing = < + 33 477 1 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 1 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + vbyone_attr = < + 8 /*lane_count*/ + 2 /*region_num*/ + 4 /*byte_mode*/ + 4>; /*color_fmt*/ + vbyone_intr_enable = < + 1 /*vbyone_intr_enable*/ + 3>; /*vbyone_vsync_intr_enable*/ + phy_attr=<3 0>; /*vswing_level, preem_level*/ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 0 1 0 10 /*3d_disable*/ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 1 2 0 /*3d_disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <3>; + }; + vbyone_4{ + model_name = "BOE_HV550QU2_1region"; + interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 4400 2250 /*h_period, v_period*/ + 10 /*lcd_bits*/ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 4800 /*h_period_min,max*/ + 2200 2760 /*v_period_min,max*/ + 560000000 624000000>; /*pclk_min, max*/ + lcd_timing = < + 33 477 1 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 1 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + vbyone_attr = < + 8 /*lane_count*/ + 1 /*region_num*/ + 4 /*byte_mode*/ + 4>; /*color_fmt*/ + vbyone_intr_enable = < + 1 /*vbyone_intr_enable*/ + 3>; /*vbyone_vsync_intr_enable*/ + phy_attr=<3 0>; /*vswing_level, preem_level*/ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 0 1 0 10 /*3d_disable*/ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 1 2 0 /*3d_disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <3>; + }; + }; /* end of lcd */ + + lcd_extern{ + compatible = "amlogic, lcd_extern"; + dev_name = "lcd_extern"; + status = "okay"; + key_valid = <1>; + i2c_bus = "i2c_bus_c"; + /*pinctrl-names="extern_on", */ + /* "extern_off"; */ + /*pinctrl-0=<&i2c2_h_pins */ + /* &lcd_extern_off_pins>; */ + /*pinctrl_gpio_off = <0>; */ + /*extern-gpios = <&gpio GPIOH_2 GPIO_ACTIVE_HIGH*/ + /* &gpio GPIOH_3 GPIO_ACTIVE_HIGH>;*/ + /*extern_gpio_names = "GPIOH_2","GPIOH_3";*/ + /*i2c_gpio = <0 1>; //i2c_sck, i2c_sda gpio_index */ + + extern_0{ + index = <0>; + extern_name = "ext_default"; + status = "disabled"; + type = <0>; /*0=i2c, 1=spi, 2=mipi*/ + i2c_address = <0x1c>; /*7bit i2c_addr*/ + i2c_second_address = <0xff>; + cmd_size = <0xff>; /*dynamic cmd_size*/ + + /* init on/off: + * fixed cmd_size: (type, value..., delay); + * cmd_size include all data. + * dynamic cmd_size: (type, cmd_size, value..., delay); + * cmd_size include value+delay. + */ + /* type: 0x00=cmd(bit[3:0]=1 for second_addr), + * 0xf0=gpio, 0xff=ending + */ + /* value: i2c or spi cmd, or gpio index & level, + * fill 0x0 for no use + */ + /* delay: unit ms */ + init_on = < + 0x00 8 0x20 0x01 0x02 0x00 0x40 0xFF 0x00 0 + 0x00 8 0x80 0x02 0x00 0x40 0x62 0x51 0x73 0 + 0x00 8 0x61 0x06 0x00 0x00 0x00 0x00 0x00 0 + 0x00 8 0xC1 0x05 0x0F 0x00 0x08 0x70 0x00 0 + 0x00 8 0x13 0x01 0x00 0x00 0x00 0x00 0x00 0 + 0x00 8 0x3D 0x02 0x01 0x00 0x00 0x00 0x00 0 + 0x00 8 0xED 0x0D 0x01 0x00 0x00 0x00 0x00 0 + 0x00 8 0x23 0x02 0x00 0x00 0x00 0x00 0x00 10 + 0xff 0>; /*ending*/ + init_off = <0xff 0>; /*ending*/ + }; + extern_1{ + index = <1>; + extern_name = "i2c_T5800Q"; + status = "disabled"; + type = <0>; /* 0=i2c, 1=spi, 2=mipi */ + i2c_address = <0x1c>; /* 7bit i2c address */ + cmd_size = <9>; + }; + }; + + backlight{ + compatible = "amlogic, backlight-txl"; + dev_name = "backlight"; + status = "okay"; + key_valid = <1>; + pinctrl-names = "pwm_on","pwm_vs_on", + "pwm_combo_0_1_on", + "pwm_combo_0_vs_1_on", + "pwm_combo_0_1_vs_on", + "pwm_off", + "pwm_combo_off"; + pinctrl-0 = <&pwm_b_z6_pins>; + pinctrl-1 = <&pwm_vs_z6_pins>; + pinctrl-2 = <&pwm_b_z6_pins &pwm_c_z7_pins>; + pinctrl-3 = <&pwm_vs_z6_pins &pwm_c_z7_pins>; + pinctrl-4 = <&pwm_b_z6_pins &pwm_vs_z7_pins>; + pinctrl-5 = <&bl_pwm_off_pins>; + pinctrl-6 = <&bl_pwm_combo_off_pins>; + pinctrl_version = <2>; /* for uboot */ + bl_pwm_config = <&bl_pwm_conf>; + + /* pwm port: PWM_A, PWM_B, PWM_C, PWM_D, PWM_E, PWM_F, PWM_VS*/ + /* power index:(point gpios_index, 0xff=invalid) */ + /* power value:(0=output low, 1=output high, 2=input) */ + /* power delay:(unit in ms) */ + bl-gpios = <&gpio GPIOZ_2 GPIO_ACTIVE_HIGH + &gpio GPIOZ_6 GPIO_ACTIVE_HIGH + &gpio GPIOZ_7 GPIO_ACTIVE_HIGH>; + bl_gpio_names = "GPIOZ_2","GPIOZ_6","GPIOZ_7"; + + backlight_0{ + index = <0>; + bl_name = "backlight_pwm"; + bl_level_default_uboot_kernel = <100 100>; + bl_level_attr = <255 10 /*max, min*/ + 128 128>; /*mid, mid_mapping*/ + bl_ctrl_method = <1>; /*1=pwm,2=pwm_combo*/ + bl_power_attr = <0 /*en_gpio_index*/ + 1 0 /*on_value, off_value*/ + 200 200>; /*on_delay(ms), off_delay(ms)*/ + bl_pwm_port = "PWM_B"; + bl_pwm_attr = <1 /*pwm_method(0=negative, 1=positvie)*/ + 180 /*pwm_freq(pwm:Hz, pwm_vs:multiple of vs)*/ + 100 25>; /*duty_max(%), duty_min(%)*/ + bl_pwm_power = <1 0 /*pwm_gpio_index, pwm_gpio_off*/ + 10 10>; /*pwm_on_delay(ms), pwm_off_delay(ms)*/ + bl_pwm_en_sequence_reverse = <0>; /* 1 for reverse */ + }; + backlight_1{ + index = <1>; + bl_name = "backlight_pwm_vs"; + bl_level_default_uboot_kernel = <100 100>; + bl_level_attr = <255 10 /*max, min*/ + 128 128>; /*mid, mid_mapping*/ + bl_ctrl_method = <1>; /*1=pwm,2=pwm_combo*/ + bl_power_attr = <0 /*en_gpio_index*/ + 1 0 /*on_value, off_value*/ + 200 200>; /* on_delay(ms), off_delay(ms)*/ + bl_pwm_port = "PWM_VS"; + bl_pwm_attr = <1 /*pwm_method(0=negative, 1=positvie)*/ + 2 /*pwm_freq(pwm:Hz, pwm_vs:multiple of vs)*/ + 100 25>; /*duty_max(%), duty_min(%)*/ + bl_pwm_power = <1 0 /*pwm_gpio_index, pwm_gpio_off*/ + 10 10>; /*pwm_on_delay(ms), pwm_off_delay(ms)*/ + bl_pwm_en_sequence_reverse = <0>; /* 1 for reverse */ + }; + backlight_2{ + index = <2>; + bl_name = "backlight_pwm_combo"; + bl_level_default_uboot_kernel = <100 100>; + bl_level_attr = <255 10 /*max, min*/ + 128 128>; /*mid, mid_mapping*/ + bl_ctrl_method = <2>; /*1=pwm,2=pwm_combo*/ + bl_power_attr = <0 /*en_gpio_index*/ + 1 0 /*on_value, off_value*/ + 200 200>; /* on_delay(ms), off_delay(ms)*/ + bl_pwm_combo_level_mapping = <255 100 /*pwm_0 range*/ + 100 10>; /*pwm_1 range*/ + bl_pwm_combo_port = "PWM_B","PWM_C"; + bl_pwm_combo_attr = <1 /*pwm0 method*/ + 180 /*pwm0 freq(pwm:Hz, pwm_vs:multiple of vs)*/ + 100 25 /*pwm0 duty_max(%), duty_min(%)*/ + 1 /*pwm1 method*/ + 18000 /*pwm1 freq(pwm:Hz, pwm_vs:multi of vs)*/ + 100 20>; /*pwm1 duty_max(%), duty_min(%)*/ + bl_pwm_combo_power = <1 0 /*pwm0 gpio_index, gpio_off*/ + 2 0 /*pwm1 gpio_index, gpio_off*/ + 10 10>; /*pwm_on_delay(ms), pwm_off_delay(ms)*/ + bl_pwm_en_sequence_reverse = <0>; /* 1 for reverse */ + }; + backlight_3{ + index = <3>; + bl_name = "backlight_pwm_combo"; + bl_level_default_uboot_kernel = <31 100>; + bl_level_attr = <255 10 /*max, min*/ + 128 128>; /*mid, mid_mapping*/ + bl_ctrl_method = <2>; /*1=pwm,2=pwm_combo*/ + bl_power_attr = <0 /*en_gpio_index*/ + 1 0 /*on_value, off_value*/ + 410 110>; /*on_delay(ms), off_delay(ms)*/ + bl_pwm_combo_level_mapping = <255 10 /*pwm_0 range*/ + 0 0>; /*pwm_1 range*/ + bl_pwm_combo_port = "PWM_B","PWM_C"; + bl_pwm_combo_attr = <1 /*pwm0 method*/ + 180 /*pwm0 freq(pwm:Hz, pwm_vs:multiple of vs)*/ + 100 25 /*pwm0 duty_max(%), duty_min(%)*/ + 1 /*pwm1 method*/ + 18000 /*pwm1 freq(pwm:Hz, pwm_vs:multi of vs)*/ + 80 80>; /*pwm1 duty_max(%), duty_min(%)*/ + bl_pwm_combo_power = <1 0 /*pwm0 gpio_index, gpio_off*/ + 2 0 /*pwm1 gpio_index, gpio_off*/ + 10 10>; /*pwm_on_delay(ms), pwm_off_delay(ms)*/ + bl_pwm_en_sequence_reverse = <0>; /* 1 for reverse */ + }; + }; + + bl_pwm_conf:bl_pwm_conf{ + pwm_channel_0 { + pwm_port_index = <1>; + pwms = <&pwm_ab MESON_PWM_1 30040 0>; + }; + pwm_channel_1 { + pwm_port_index = <2>; + pwms = <&pwm_cd MESON_PWM_0 30040 0>; + }; + }; + +}; /* end of / */ diff --git a/arch/arm/boot/dts/amlogic/txl_t962_p321.dts b/arch/arm/boot/dts/amlogic/txl_t962_p321.dts new file mode 100644 index 000000000000..3ea43032916f --- /dev/null +++ b/arch/arm/boot/dts/amlogic/txl_t962_p321.dts @@ -0,0 +1,1167 @@ +/* + * arch/arm/boot/dts/amlogic/txl_t962_321.dts + * + * Copyright (C) 2018 Amlogic, Inc. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + */ + +/dts-v1/; + +#include "mesontxl.dtsi" +#include "partition_mbox_normal.dtsi" +#include "mesontxl_p321-panel.dtsi" + +/ { + model = "Amlogic TXL T962 P321 Reference Board"; + compatible = "amlogic, txl_t962_p321"; + amlogic-dt-id = "txl_p321_v1"; + + aliases { + serial0 = &uart_AO; + serial1 = &uart_A; + serial2 = &uart_B; + serial3 = &uart_C; + serial4 = &uart_AO_B; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + i2c4 = &i2c_AO; + }; + + ion_dev { + compatible = "amlogic, ion_dev"; + memory-region = <&ion_reserved>; + }; + + memory@00000000 { + device_type = "memory"; + linux,usable-memory = <0x100000 0x3ff00000>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + /* global autoconfigured region for contiguous allocations */ + secmon_reserved:linux,secmon { + compatible = "shared-dma-pool"; + reusable; + size = <0x400000>; + alignment = <0x400000>; + alloc-ranges = <0x05000000 0x400000>; + }; + + //secos_reserved:linux,secos { + // status = "disabled"; + // compatible = "amlogic, aml_secos_memory"; + // reg = <0x0 0x05300000 0x0 0x2000000>; + // no-map; + //}; + + logo_reserved:linux,meson-fb { + compatible = "shared-dma-pool"; + reusable; + size = <0x800000>; + alignment = <0x400000>; + alloc-ranges = <0x32000000 0xc800000>; + }; + + ion_reserved:linux,ion-dev { + compatible = "shared-dma-pool"; + reusable; + /* if no direct render, ion size = fb0_size x 3 + fb1_size + 4 M */ + size = <0x2400000>; + alignment = <0x400000>; + /* alloc by self */ + alloc-ranges = <0x32000000 0xc800000>; + }; + + codec_mm_cma:linux,codec_mm_cma { + compatible = "shared-dma-pool"; + reusable; + /* ion_codec_mm max can alloc size 80M*/ + size = <0x13400000>; + alignment = <0x400000>; + linux,contiguous-region; + /** alloc by self **/ + alloc-ranges = <0x0 0x2ee00000>; + }; + + /* codec shared reserved */ + codec_mm_reserved:linux,codec_mm_reserved { + compatible = "amlogic, codec-mm-reserved"; + size = <0x0>; + alignment = <0x100000>; + //no-map; + }; + + //di_reserved:linux,di { + //compatible = "amlogic, di-mem"; + /* buffer_size = 3621952(yuv422 8bit) */ + /* 4179008(yuv422 10bit full pack mode) */ + /** 10x3621952=34.6M(0x23) support 8bit **/ + /** 10x4736064=45.2M(0x2e) support 12bit **/ + /** 10x4179008=40M(0x28) support 10bit **/ + //size = <0x2800000>; + //no-map; + //}; + + /*di CMA pool */ + di_cma_reserved:linux,di_cma { + compatible = "shared-dma-pool"; + reusable; + /* buffer_size = 3621952(yuv422 8bit) + * | 4736064(yuv422 10bit) + * | 4179008(yuv422 10bit full pack mode) + * 10x3621952=34.6M(0x23) support 8bit + * 10x4736064=45.2M(0x2e) support 12bit + * 10x4179008=40M(0x28) support 10bit + */ + size = <0x02800000>; + alignment = <0x400000>; + alloc-ranges = <0x32000000 0xc800000>; + }; + + /* POST PROCESS MANAGER */ + ppmgr_reserved:linux,ppmgr { + compatible = "amlogic, ppmgr_memory"; + size = <0x0>; + alloc-ranges = <0x32000000 0xc800000>; + }; + + picdec_cma_reserved:linux,picdec { + compatible = "shared-dma-pool"; + reusable; + size = <0x0>; + alignment = <0x0>; + linux,contiguous-region; + alloc-ranges = <0x32000000 0xc800000>; + }; + + demod_cma_reserved:linux,demod_cma { + compatible = "shared-dma-pool"; + reusable; + /* 5M */ + size = <0x0800000>; + alignment = <0x400000>; + alloc-ranges = <0x32000000 0xc800000>; + }; + + /* vdin1 CMA pool */ + vdin1_cma_reserved:linux,vdin1_cma { + compatible = "shared-dma-pool"; + reusable; + /* 1920x1080x2x4 =16 M */ + size = <0x04000000>; + alignment = <0x400000>; + /** alloc by self **/ + alloc-ranges = <0x32000000 0xc800000>; + }; + }; /* end of reserved-memory */ + + secmon { + compatible = "amlogic, secmon"; + memory-region = <&secmon_reserved>; + in_base_func = <0x82000020>; + out_base_func = <0x82000021>; + reserve_mem_size = <0x00300000>; + }; + + gpioleds { + compatible = "gpio-leds"; + status = "disabled"; + + sys_led { + label = "sys_led"; + gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + }; + + /*for external keypad*/ + adc-keypad { + compatible = "amlogic, adc_keypad"; + status = "okay"; + key_name = "power","up", "down","enter","left","right","home"; + key_num = <7>; + io-channels = <&saradc SARADC_CH2>, + <&saradc SARADC_CH3>; + io-channel-names = "key-chan-2", "key-chan-3"; + key_chan = ; + key_code = <116 103 108 28 105 106 102>; + key_val = <0 143 266 389 512 143 266>; //val=voltage/1800mV*1023 + key_tolerance = <40 40 40 40 40 40 40>; + }; + + avin_detect { + compatible = "amlogic, avin_detect"; + status = "okay"; + avin_device_num = <1>; + gpios = <&gpio GPIODV_8 GPIO_ACTIVE_HIGH>; + detect_interval_length = <100>; + set_detect_times = <5>; + set_fault_tolerance = <1>; + }; + + meson-fb { + compatible = "amlogic, meson-txl"; + memory-region = <&logo_reserved>; + dev_name = "meson-fb"; + status = "okay"; + interrupts = <0 3 1 + 0 89 1>; + interrupt-names = "viu-vsync", "rdma"; + mem_size = <0x00800000 0x01800000 0x00100000>; + /* uboot logo,fb0/fb1 memory size,if afbcd fb0=0x01851000*/ + display_mode_default = "1080p60hz"; + /* 0:VPU free scale 1:OSD free scale 2:OSD super scale */ + scale_mode = <1>; + /* 1920*1080*4*3 = 0x17BB000 */ + display_size_default = <1920 1080 1920 3240 32>; + pxp_mode = <0>; /** 0:normal mode 1:pxp mode */ + logo_addr = "0x3f800000"; + }; + + picdec { + compatible = "amlogic, picdec"; + status = "okay"; + memory-region = <&picdec_cma_reserved>; + }; + + ppmgr { + compatible = "amlogic, ppmgr"; + status = "okay"; + memory-region = <&ppmgr_reserved>; + }; + + deinterlace { + compatible = "amlogic, deinterlace"; + status = "okay"; + /* 0:use reserved; 1:use cma; 2:use cma as reserved */ + flag_cma = <1>; + //memory-region = <&di_reserved>; + memory-region = <&di_cma_reserved>; + interrupts = <0 46 1 + 0 6 1>; + interrupt-names = "de_irq"; + clocks = <&clkc CLKID_VPU_MUX>, + <&clkc CLKID_FCLK_DIV4>, + <&clkc CLKID_VPU_CLKB_TMP_COMP>, + <&clkc CLKID_VPU_CLKB_COMP>; + clock-names = "vpu_mux", + "fclk_div4", + "vpu_clkb_tmp_composite", + "vpu_clkb_composite"; + clock-range = <333 333>; + /* buffer-size = <3621952>;(yuv422 8bit) */ + buffer-size = <4179008>;/*yuv422 fullpack*/ + /* reserve-iomap = "true"; */ + /* if enable nr10bit, set nr10bit-support to 1 */ + nr10bit-support = <1>; + }; + + ionvideo { + compatible = "amlogic, ionvideo"; + dev_name = "ionvideo"; + status = "okay"; + }; + + hdmirx { + compatible = "amlogic, hdmirx-txl"; + status = "okay"; + #address-cells=<1>; + #size-cells=<1>; + dev_name = "hdmirx"; + pinctrl-names = "hdmirx_pins"; + pinctrl-0 = <&hdmirx_a_mux &hdmirx_b_mux + &hdmirx_c_mux>; + repeat = <0>; + interrupts = <0 56 1>; + clocks = <&clkc CLKID_HDMIRX_MODET_COMP>, + <&clkc CLKID_HDMIRX_CFG_COMP>, + <&clkc CLKID_HDMIRX_ACR_COMP>, + <&clkc CLKID_HDMIRX_AUDMEAS_COMP>, + <&xtal>, + <&clkc CLKID_FCLK_DIV5>, + <&clkc CLKID_FCLK_DIV7>, + <&clkc CLKID_HDCP22_SKP_COMP>, + <&clkc CLKID_HDCP22_ESM_COMP>; + //<&clkc CLK_AUD_PLL2FS>, + //<&clkc CLK_AUD_PLL4FS>, + //<&clkc CLK_AUD_OUT>; + clock-names = "hdmirx_modet_clk", + "hdmirx_cfg_clk", + "hdmirx_acr_ref_clk", + "hdmirx_audmeas_clk", + "xtal", + "fclk_div5", + "fclk_div7", + "hdcp_rx22_skp", + "hdcp_rx22_esm"; + //"hdmirx_aud_pll2fs", + //"hdmirx_aud_pll4f", + //"clk_aud_out"; + hdmirx_id = <0>; + en_4k_2_2k = <0>; + hpd_low_cec_off = <1>; + /* bit4: enable feature, bit3~0: port number */ + disable_port = <0x0>; + reg = <0xc0800000 0xa00000 + 0xC883C000 0x2000 + 0xd0076000 0x2000 + 0xc883e000 0x2000 + 0xda83e000 0x2000 + 0xc8834000 0x2000 + 0xda846000 0x2000>; + }; + + vdin@0 { + compatible = "amlogic, vdin"; + /*memory-region = <&vdin0_cma_reserved>;*/ + dev_name = "vdin0"; + status = "okay"; + reserve-iomap = "true"; + /*bit0:(1:share with codec_mm;0:cma alone)*/ + /*bit8:(1:alloc in discontinus way;0:alone in continuous way)*/ + flag_cma = <0x101>; + /* MByte, if 10bit disable: 64M(YUV422), + * if 10bit enable: 64*1.5 = 96M(YUV422) + * if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M + * if support 4K2K-YUV444-10bit-WR:3840*2160*4*6 ~= 190M + * if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M + * if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M + * if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M + */ + cma_size = <190>; + interrupts = <0 83 1>; + rdma-irq = <2>; + clocks = <&clkc CLKID_FCLK_DIV5>, + <&clkc CLKID_VDIN_MEAS_COMP>; + clock-names = "fclk_div5", "cts_vdin_meas_clk"; + vdin_id = <0>; + /* vdin write mem color depth support: + * bit0:support 8bit + * bit1:support 9bit + * bit2:support 10bit + * bit3:support 12bit + * bit4:support yuv422 10bit full pack mode (from txl new add) + * bit8:use 8bit at 4k_50/60hz_10bit + * bit9:use 10bit at 4k_50/60hz_10bit + */ + tv_bit_mode = <0x215>; + }; + + vdin@1 { + compatible = "amlogic, vdin"; + memory-region = <&vdin1_cma_reserved>; + dev_name = "vdin1"; + status = "okay"; + reserve-iomap = "true"; + flag_cma = <0>;/*1:share with codec_mm;0:cma alone*/ + interrupts = <0 85 1>; + rdma-irq = <4>; + clocks = <&clkc CLKID_FCLK_DIV5>, + <&clkc CLKID_VDIN_MEAS_COMP>; + clock-names = "fclk_div5", "cts_vdin_meas_clk"; + vdin_id = <1>; + /* vdin write mem color depth support: + * bit0:support 8bit + * bit1:support 9bit + * bit2:support 10bit + * bit3:support 12bit + */ + tv_bit_mode = <21>; + }; + + tvafe:tvafe@c8842000 { + compatible = "amlogic, tvafe-txl"; + status = "okay"; + /*memory-region = <&tvafe_cma_reserved>;*/ + dev_name = "tvafe"; + flag_cma = <1>;/*1:share with codec_mm;0:cma alone*/ + cma_size = <5>;/*MByte*/ + reg = <0xc8842000 0x2000>;/*tvafe reg base*/ + reserve-iomap = "true"; + tvafe_id = <0>; + //pinctrl-names = "default"; + /*!!particular sequence, no more and no less!!!*/ + tvafe_pin_mux = < + 3 /* TVAFE_CVBS_IN2, CVBS_IN0 = 0 */ + 1 /* TVAFE_CVBS_IN0, CVBS_IN1 */ + 2 /* TVAFE_CVBS_IN1, CVBS_IN2 */ + 4 /* TVAFE_CVBS_IN3, CVBS_IN3 */ + >; + clocks = <&clkc CLKID_DAC_CLK>; + clock-names = "vdac_clk_gate"; + }; + + vecm { + compatible = "amlogic, vecm"; + dev_name = "aml_vecm"; + status = "okay"; + gamma_en = <1>;/*1:enabel ;0:disable*/ + wb_en = <1>;/*1:enabel ;0:disable*/ + cm_en = <1>;/*1:enabel ;0:disable*/ + }; + + tuner: tuner { + status = "okay"; + tuner_name = "r842_tuner"; + tuner_i2c_adap = <&i2c1>; + tuner_i2c_addr = <0xf6>; + tuner_xtal = <1>; /* 0: 16MHz, 1: 24MHz, 3: 27MHz */ + tuner_xtal_mode = <0>; + /* NO_SHARE_XTAL(0) + * MASTER_TO_SLAVE_XTAL_IN(1) + * MASTER_TO_SLAVE_XTAL_OUT(2) + * SLAVE_XTAL_OUT(3) + */ + tuner_xtal_cap = <38>; /* 0 ~ 41 (pf) */ + }; + + atv-demod { + compatible = "amlogic, atv-demod"; + status = "okay"; + tuner = <&tuner>; + btsc_sap_mode = <1>; + pinctrl-names = "atvdemod_agc_pins"; + pinctrl-0 = <&atvdemod_agc_pins>; + reg = <0xc8840000 0x2000 /* demod reg */ + 0xc883c000 0x2000 /* hiu reg */ + 0xc8834000 0x2000>; /* periphs reg */ + reg_23cf = <0x88188832>; + /*default:0x88188832;r840 on haier:0x48188832*/ + }; + + sd_emmc_c: emmc@d0074000 { + compatible = "amlogic, meson-mmc-txl"; + status = "okay"; + reg = <0xd0074000 0x2000>; + interrupts = <0 218 1>; + pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins"; + pinctrl-0 = <&emmc_clk_cmd_pins>; + pinctrl-1 = <&emmc_conf_pull_up &emmc_conf_pull_done>; + clocks = <&clkc CLKID_SD_EMMC_C>, + <&clkc CLKID_SD_EMMC_C_COMP>, + <&clkc CLKID_FCLK_DIV2>; + clock-names = "core", "clkin0", "clkin1"; + + bus-width = <8>; + cap-sd-highspeed; + cap-mmc-highspeed; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + + max-frequency = <200000000>; + non-removable; + disable-wp; + emmc { + pinname = "emmc"; + ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */ + caps = "MMC_CAP_8_BIT_DATA", + "MMC_CAP_MMC_HIGHSPEED", + "MMC_CAP_SD_HIGHSPEED", + "MMC_CAP_NONREMOVABLE", + "MMC_CAP_1_8V_DDR", + "MMC_CAP_HW_RESET", + "MMC_CAP_ERASE", + "MMC_CAP_CMD23"; + caps2 = "MMC_CAP2_HS200"; + f_min = <400000>; + f_max = <100000000>; + max_req_size = <0x20000>; /**128KB*/ + gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>; + hw_reset = <&gpio BOOT_9 GPIO_ACTIVE_HIGH>; + tx_phase = <3>; + card_type = <1>; + /* 1:mmc card(include eMMC), + * 2:sd card(include tSD) + */ + }; + }; + + sd_emmc_b:sd@d0072000 { + compatible = "amlogic, meson-mmc-txl"; + status = "okay"; + reg = <0xd0072000 0x2000>; + interrupts = <0 217 1>; + pinctrl-names = "sd_all_pins", + "sd_clk_cmd_pins", + "sd_1bit_pins", + "sd_clk_cmd_uart_pins", + "sd_1bit_uart_pins", + "sd_to_ao_uart_pins", + "ao_to_sd_uart_pins", + "ao_to_sd_jtag_pins", + "sd_to_ao_jtag_pins"; + pinctrl-0 = <&sd_all_pins>; + pinctrl-1 = <&sd_clk_cmd_pins>; + pinctrl-2 = <&sd_1bit_pins>; + pinctrl-3 = <&sd_to_ao_uart_clr_pins + &sd_clk_cmd_pins &ao_to_sd_uart_pins>; + pinctrl-4 = <&sd_to_ao_uart_clr_pins + &sd_1bit_pins &ao_to_sd_uart_pins>; + pinctrl-5 = <&sd_all_pins &sd_to_ao_uart_pins>; + pinctrl-6 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>; + pinctrl-7 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>; + pinctrl-8 = <&sd_all_pins &sd_to_ao_uart_pins>; + clocks = <&clkc CLKID_SD_EMMC_B>, + <&clkc CLKID_SD_EMMC_B_COMP>, + <&clkc CLKID_FCLK_DIV2>; + clock-names = "core", "clkin0", "clkin1"; + + bus-width = <4>; + cap-sd-highspeed; + max-frequency = <100000000>; + disable-wp; + sd { + pinname = "sd"; + ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */ + caps = "MMC_CAP_4_BIT_DATA", + "MMC_CAP_MMC_HIGHSPEED", + "MMC_CAP_SD_HIGHSPEED"; + /* "MMC_CAP_UHS_SDR12", + * "MMC_CAP_UHS_SDR25", + * "MMC_CAP_UHS_SDR50", + * "MMC_CAP_UHS_SDR104"; + */ + f_min = <400000>; + f_max = <100000000>; + max_req_size = <0x20000>; /**128KB*/ + gpio_dat3 = <&gpio CARD_4 GPIO_ACTIVE_HIGH>; + jtag_pin = <&gpio CARD_0 GPIO_ACTIVE_HIGH>; + gpio_cd = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; + card_type = <5>; + /* 0:unknown, + * 1:mmc card(include eMMC), + * 2:sd card(include tSD), + * 3:sdio device(ie:sdio-wifi), + * 4:SD combo (IO+mem) card, + * 5:NON sdio device(means sd/mmc card), + * other:reserved + */ + }; + }; + + spifc: spifc@c1108c80 { + status = "disabled"; + compatible = "amlogic,aml-spi-nor"; + reg = <0xc1108c80 0x80>; + pinctrl-names = "default"; + pinctrl-0 = <&spifc_all_pins>; + clocks = <&clkc CLKID_CLK81>; + clock-names = "core"; + spi-nor@0 { + compatible = "jedec,spi-nor"; + spifc-frequency = <40000000>; + read-capability = <2>;/* dual read 1_1_2 */ + spifc-io-width = <2>;/* txl only support 2 io */ + cs_gpios = <&gpio BOOT_11 GPIO_ACTIVE_HIGH>; + }; + }; + + unifykey { + compatible = "amlogic, unifykey"; + status = "okay"; + + unifykey-num = <19>; + unifykey-index-0 = <&keysn_0>; + unifykey-index-1 = <&keysn_1>; + unifykey-index-2 = <&keysn_2>; + unifykey-index-3 = <&keysn_3>; + unifykey-index-4 = <&keysn_4>; + unifykey-index-5 = <&keysn_5>; + unifykey-index-6 = <&keysn_6>; + unifykey-index-7 = <&keysn_7>; + unifykey-index-8 = <&keysn_8>; + unifykey-index-9 = <&keysn_9>; + unifykey-index-10= <&keysn_10>; + unifykey-index-11 = <&keysn_11>; + unifykey-index-12 = <&keysn_12>; + unifykey-index-13 = <&keysn_13>; + unifykey-index-14 = <&keysn_14>; + unifykey-index-15 = <&keysn_15>; + unifykey-index-16 = <&keysn_16>; + unifykey-index-17 = <&keysn_17>; + unifykey-index-18 = <&keysn_18>; + + keysn_0: key_0{ + key-name = "usid"; + key-device = "normal"; + key-permit = "read","write","del"; + }; + keysn_1:key_1{ + key-name = "mac"; + key-device = "normal"; + key-permit = "read","write","del"; + }; + keysn_2:key_2{ + key-name = "hdcp"; + key-device = "secure"; + key-type = "sha1"; + key-permit = "read","write","del"; + }; + keysn_3:key_3{ + key-name = "secure_boot_set"; + key-device = "efuse"; + key-permit = "write"; + }; + keysn_4:key_4{ + key-name = "mac_bt"; + key-device = "normal"; + key-permit = "read","write","del"; + key-type = "mac"; + }; + keysn_5:key_5{ + key-name = "mac_wifi"; + key-device = "normal"; + key-permit = "read","write","del"; + key-type = "mac"; + }; + keysn_6:key_6{ + key-name = "hdcp2_tx"; + key-device = "normal"; + key-permit = "read","write","del"; + }; + keysn_7:key_7{ + key-name = "hdcp2_rx"; + key-device = "normal"; + key-permit = "read","write","del"; + }; + keysn_8:key_8{ + key-name = "widevinekeybox"; + key-device = "secure"; + key-type = "sha1"; + key-permit = "read","write","del"; + }; + keysn_9:key_9{ + key-name = "deviceid"; + key-device = "normal"; + key-permit = "read","write","del"; + }; + keysn_10:key_10{ + key-name = "hdcp22_fw_private"; + key-device = "secure"; + key-permit = "read","write","del"; + }; + keysn_11:key_11{ + key-name = "hdcp22_rx_private"; + key-device = "secure"; + key-permit = "read","write","del"; + }; + keysn_12:key_12{ + key-name = "hdcp22_rx_fw"; + key-device = "normal"; + key-permit = "read","write","del"; + }; + keysn_13:key_13{ + key-name = "hdcp14_rx"; + key-device = "normal"; + key-type = "sha1"; + key-permit = "read","write","del"; + }; + keysn_14:key_14{ + key-name = "prpubkeybox";// PlayReady + key-device = "secure"; + key-permit = "read","write","del"; + }; + keysn_15:key_15{ + key-name = "prprivkeybox";// PlayReady + key-device = "secure"; + key-permit = "read","write","del"; + }; + keysn_16:key_16{ + key-name = "lcd"; + key-device = "normal"; + key-permit = "read","write","del"; + }; + keysn_17:key_17{ + key-name = "lcd_extern"; + key-device = "normal"; + key-permit = "read","write","del"; + }; + keysn_18:key_18{ + key-name = "backlight"; + key-device = "normal"; + key-permit = "read","write","del"; + }; + }; /* End unifykey */ + + vout { + compatible = "amlogic, vout"; + dev_name = "vout"; + status = "okay"; + fr_auto_policy = <0>; + }; + + dvb { + compatible = "amlogic, dvb"; + dev_name = "dvb"; + status = "okay"; + fe0_mode = "internal"; + fe0_tuner = <&tuner>; + + /*"parallel","serial","disable"*/ + ts2 = "parallel"; + ts2_control = <0>; + ts2_invert = <0>; + interrupts = <0 23 1 + 0 5 1 + 0 53 1 + 0 19 1 + 0 25 1 + 0 18 1 + 0 24 1>; + interrupt-names = "demux0_irq", + "demux1_irq", + "demux2_irq", + "dvr0_irq", + "dvr1_irq", + "dvrfill0_fill", + "dvrfill1_flush"; + clocks = <&clkc CLKID_DEMUX + &clkc CLKID_ASYNC_FIFO + &clkc CLKID_AHB_ARB0 + &clkc CLKID_DOS_PARSER>; + clock-names = "demux", "asyncfifo", "ahbarb0", "uparsertop"; + }; + + meson_sensor: sensor@0 { + compatible = "amlogic, aml-thermal"; + #thermal-sensor-cells = <1>; + cooling_devices { + cpufreq_cool_cluster0 { + min_state = <1000000>; + dyn_coeff = <140>; + cluster_id = <0>; + node_name = "cpus"; + device_type = "cpufreq"; + }; + cpucore_cool_cluster0 { + min_state = <1>; + dyn_coeff = <0>; + cluster_id = <0>; + node_name = "cpu_core_cluster0"; + device_type = "cpucore"; + }; + gpufreq_cool { + min_state = <400>; + dyn_coeff = <437>; + cluster_id = <0>; + node_name = "mali"; + device_type = "gpufreq"; + }; + gpucore_cool { + min_state = <1>; + dyn_coeff = <0>; + cluster_id = <0>; + node_name = "thermal_gpu_cores"; + device_type = "gpucore"; + }; + }; + cpu_cluster0:cpu_core_cluster0 { + #cooling-cells = <2>; /* min followed by max */ + }; + gpucore:thermal_gpu_cores { + #cooling-cells = <2>; /* min followed by max */ + }; + }; + + dtv-demod { + compatible = "amlogic, ddemod-txl"; + status = "okay"; + + pinctrl-names = "dtvdemod_agc_pins"; + pinctrl-0 = <&dtvdemod_agc_pins>; + + clocks = <&clkc CLKID_DAC_CLK>; + clock-names = "vdac_clk_gate"; + + reg = <0xc8844000 0x2000 /*dtv demod base*/ + 0xc883c000 0x2000 /*hiu reg base*/ + 0xc8100000 0x1000 /*io_aobus_base*/ + 0xc1104400 0x1000 /*reset*/ + >; + /*move from dvbfe*/ + dtv_demod0_mem = <0>; // need move to aml_dtv_demod ? + spectrum = <1>; + cma_flag = <1>; + cma_mem_size = <8>; + memory-region = <&demod_cma_reserved>;//<&demod_reserved>; + }; + + thermal-zones { + soc_thermal { + polling-delay = <1000>; + polling-delay-passive = <100>; + sustainable-power = <2150>; + thermal-sensors = <&meson_sensor 3>; + + trips { + switch_on: trip-point@0 { + temperature = <70000>; + hysteresis = <1000>; + type = "passive"; + }; + control: trip-point@1 { + temperature = <80000>; + hysteresis = <1000>; + type = "passive"; + }; + hot: trip-point@2 { + temperature = <85000>; + hysteresis = <5000>; + type = "hot"; + }; + critical: trip-point@3 { + temperature = <260000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + + cooling-maps { + cpufreq_cooling_map { + trip = <&control>; + cooling-device = <&cpus 0 4>; + contribution = <1024>; + }; + cpucore_cooling_map { + trip = <&control>; + cooling-device = <&cpu_cluster0 0 3>; + contribution = <1024>; + }; + gpufreq_cooling_map { + trip = <&control>; + cooling-device = <&gpu 0 4>; + contribution = <1024>; + }; + gpucore_cooling_map { + trip = <&control>; + cooling-device = <&gpucore 0 2>; + contribution = <1024>; + }; + }; + }; + }; + + /* start AUDIO_RELATED */ + i2s_dai: I2S { + #sound-dai-cells = <0>; + compatible = "amlogic, aml-i2s-dai"; + clocks = < + &clkc CLKID_MPLL3 + &clkc CLKID_AMCLK_COMP + &clkc CLKID_AIU_GLUE + &clkc CLKID_I2S_OUT + &clkc CLKID_AMCLK_MEASURE + &clkc CLKID_AIFIFO2 + &clkc CLKID_MIXER + &clkc CLKID_MIXER_IFACE + &clkc CLKID_ADC + &clkc CLKID_AIU_TOP + &clkc CLKID_AOCLK_GATE + &clkc CLKID_I2S_SPDIF + >; + clock-names = + "mpll", + "mclk", + "top_glue", + "i2s_out", + "amclk_measure", + "aififo2", + "aud_mixer", + "mixer_reg", + "adc", + "top_level", + "aoclk", + "aud_in"; + }; + + spdif_dai: SPDIF { + #sound-dai-cells = <0>; + compatible = "amlogic, aml-spdif-dai"; + clocks = < + &clkc CLKID_MPLL1 + &clkc CLKID_IEC958_INT_COMP + &clkc CLKID_AMCLK_COMP + &clkc CLKID_IEC958_MUX + &clkc CLKID_CLK81 + &clkc CLKID_IEC958 + &clkc CLKID_IEC958_GATE + >; + clock-names = + "mpll1", + "i958", + "mclk", + "spdif", + "clk_81", + "iec958", + "iec958_amclk"; + }; + + pcm_dai: PCM { + #sound-dai-cells = <0>; + compatible = "amlogic, aml-pcm-dai"; + pinctrl-names = "audio_pcm"; + /* disable pcm pin mux temporary, enable it if necessary */ + /*pinctrl-0 = <&aml_audio_pcm>;*/ + clocks = < + &clkc CLKID_MPLL0 + &clkc CLKID_PCM_MCLK_COMP + &clkc CLKID_PCM_SCLK_COMP + >; + clock-names = "mpll0", "pcm_mclk", "pcm_sclk"; + pcm_mode = <1>; /* 0=slave mode, 1=master mode */ + }; + + i2s_plat: i2s_platform { + compatible = "amlogic, aml-i2s"; + interrupts = <0 29 1>; + }; + + pcm_plat: pcm_platform { + compatible = "amlogic, aml-pcm"; + }; + + spdif_codec: spdif_codec { + #sound-dai-cells = <0>; + compatible = "amlogic, aml-spdif-codec"; + status = "okay"; + pinctrl-names = "audio_spdif_out"; + pinctrl-0 = <&audio_spdif_out_pins>; + }; + + pcm_codec: pcm_codec { + #sound-dai-cells = <0>; + compatible = "amlogic, pcm2BT-codec"; + status = "okay"; + }; + /* endof AUDIO MESON8 DEVICES */ + + /* AUDIO board specific */ + dummy_codec:dummy { + #sound-dai-cells = <0>; + compatible = "amlogic, aml_dummy_codec"; + status = "disabled"; + }; + + amlogic_codec:t9015S { + #sound-dai-cells = <0>; + compatible = "amlogic, aml_codec_T9015S"; + status = "okay"; + reg = <0xc8832000 0x14>; + }; + + aml_snd_tv { + compatible = "amlogic, txl-snd-tv"; + status = "okay"; + aml-sound-card,format = "i2s"; + aml_sound_card,name = "AML-TVAUDIO"; + pinctrl-names = "audio_i2s"; + pinctrl-0 = <&aml_audio_i2s>; + /*avout mute gpio*/ + mute_gpio-gpios = <&gpio GPIODV_11 GPIO_ACTIVE_HIGH>; + sleep_time = <20>; + aux_dev = <&tas5707>; + cpu_list = <&cpudai0 &cpudai1 &cpudai2>; + codec_list = <&codec0 &codec1 &codec2>; + plat_list = <&i2s_plat &i2s_plat &pcm_plat>; + cpudai0: cpudai0 { + sound-dai = <&i2s_dai>; + }; + cpudai1: cpudai1 { + sound-dai = <&spdif_dai>; + }; + cpudai2: cpudai2 { + sound-dai = <&pcm_dai>; + }; + codec0: codec0 { + sound-dai = <&amlogic_codec>; + }; + codec1: codec1 { + sound-dai = <&spdif_codec>; + }; + codec2: codec2 { + sound-dai = <&pcm_codec>; + }; + Channel_Mask { + /*i2s has 4 pins, 8channel, mux output*/ + Speaker1_Channel_Mask = "i2s_2/3"; + DAC0_Channel_Mask = "i2s_0/1"; + }; + }; + + amaudio2 { + compatible = "amlogic, aml_amaudio2"; + status = "okay"; + interrupts = <0 48 1>; + }; + /* end of AUDIO_RELATED */ + + wifi { + compatible = "amlogic, aml_wifi"; + status = "okay"; + power_on_pin = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>; + }; +}; /* end of / */ + +&pinctrl_periphs { + /* start AUDIO_RELATED */ + /*i2s*/ + aml_audio_i2s: aml_audio_i2s { + mux { + groups = "i2s_amclk_z", + "i2s_aoclk_out_z", + "i2s_lrclk_out_z" + /*,"i2s_out_ch01_z"*/ + ,"i2s_out_ch23" + ; + function = "i2s"; + }; + }; + + /*spdif*/ + audio_spdif_out_pins: audio_spdif_out_pins { + mux { + groups = "spdif_out"; + function = "spdif_out"; + }; + }; + + /*pcm*/ + aml_audio_pcm: aml_audio_pcm { + mux { + groups = + "pcm_clk_a", + "pcm_fs_a", + "pcm_in_a", + "pcm_out_a"; + function = "pcm_a"; + }; + }; + /* end AUDIO_RELATED */ + + /*lcd_extern*/ + lcd_extern_off_pins:lcd_extern_off_pin { + mux { + pins = "GPIOH_2", + "GPIOH_3"; + function = "gpio_periphs"; + /*output-high;*/ + output-low; + /*input-enable;*/ + }; + }; + + /*backlight*/ + bl_pwm_off_pins:bl_pwm_off_pin { + mux { + pins = "GPIOZ_6"; + function = "gpio_periphs"; + output-low; + }; + }; + bl_pwm_combo_off_pins:bl_pwm_combo_off_pin { + mux { + pins = "GPIOZ_6", + "GPIOZ_7"; + function = "gpio_periphs"; + output-low; + }; + }; +}; + +&i2c0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_z_pins>; + + /* start AUDIO_RELATED */ + tas5707: tas5707@36 { + #sound-dai-cells = <0>; + compatible = "ti,tas5707"; + status = "okay"; + codec_name = "tas5707"; + reg = <0x1B>; + reset_pin = <&gpio GPIOZ_13 GPIO_ACTIVE_LOW>; + eq_enable = <0>; + drc_enable = <0>; + }; + /* end AUDIO_RELATED */ +}; + + +&i2c1 { + status = "okay"; + clock-frequency = <300000>; + pinctrl-names="default"; + pinctrl-0=<&i2c1_dv_pins>; +}; + +&i2c2 { + status = "okay"; + pinctrl-names="default"; + pinctrl-0=<&i2c2_h_pins>; + + lcd_extern_i2c0: lcd_extern_i2c@0 { + compatible = "lcd_ext, i2c"; + dev_name = "i2c_T5800Q"; + reg = <0x1c>; + status = "okay"; + }; +}; + +&dwc3 { + status = "okay"; +}; + +&usb2_phy { + status = "okay"; +}; + +&usb3_phy { + status = "okay"; +}; + +&dwc2_a { + status = "okay"; + /** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/ + controller-type = <1>; +}; + +&audio_data{ + status = "okay"; +}; + +&pwm_ab { + status = "okay"; +}; + +&pwm_cd { + status = "okay"; +}; + +ðmac { + status = "okay"; +}; + +&spicc { + status = "disabled"; + pinctrl-names = "default"; + pinctrl-0 = <&spicc_pins>; + cs-gpios = <&gpio GPIOZ_3 0>; +}; diff --git a/arch/arm/configs/meson64_a32_defconfig b/arch/arm/configs/meson64_a32_defconfig index 8e7d5648501a..07fac6fba9c1 100644 --- a/arch/arm/configs/meson64_a32_defconfig +++ b/arch/arm/configs/meson64_a32_defconfig @@ -213,6 +213,7 @@ CONFIG_AMLOGIC_PINCTRL_MESON_GXL=y CONFIG_AMLOGIC_PINCTRL_MESON_AXG=y CONFIG_AMLOGIC_PINCTRL_MESON_TXLX=y CONFIG_AMLOGIC_PINCTRL_MESON_G12A=y +CONFIG_AMLOGIC_PINCTRL_MESON_TXL=y CONFIG_AMLOGIC_USB=y CONFIG_AMLOGIC_USB_DWC_OTG_HCD=y CONFIG_AMLOGIC_USB_HOST_ELECT_TEST=y diff --git a/scripts/amlogic/mk_32dtb.sh b/scripts/amlogic/mk_32dtb.sh new file mode 100755 index 000000000000..8c8a4f97b88a --- /dev/null +++ b/scripts/amlogic/mk_32dtb.sh @@ -0,0 +1,10 @@ +#! /bin/bash + +export CROSS_COMPILE=/opt/gcc-linaro-6.3.1-2017.02-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf- + +make ARCH=arm meson64_a32_defconfig +make ARCH=arm txl_t962_p321.dtb || echo "Compile dtb Fail !!" +make ARCH=arm txlx_t962x_r311_1g.dtb || echo "Compile dtb Fail !!" + + + diff --git a/scripts/amlogic/mk_gx32.sh b/scripts/amlogic/mk_gx32.sh new file mode 100755 index 000000000000..388f468d2057 --- /dev/null +++ b/scripts/amlogic/mk_gx32.sh @@ -0,0 +1,10 @@ +#! /bin/bash + +export CROSS_COMPILE=/opt/gcc-linaro-6.3.1-2017.02-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf- + +make ARCH=arm meson64_a32_defconfig +make ARCH=arm -j16 uImage || echo "Compile Image Fail !!" +make ARCH=arm txl_t962_p321.dtb || echo "Compile dtb Fail !!" + + +