shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-09 20:32:04 +09:00
Code Issues Packages Projects Releases Wiki Activity

drm: bridge: dw-hdmi: fix tmds clk in status show

Browse Source 
According to HDMI 2.0 chapter 6.1, for TMDS character Rates
avove 340Mcsc, the TMDS Clock Rate shall be one fourth of
the TMDS Character Rate.

Change-Id: I4cc78aa1a5fbf6cec93e787dde49e482d0b4d342
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
This commit is contained in:
Zheng Yang
2017-12-06 15:54:52 +08:00
committed by Tao Huang
parent 09f340ba86
commit a7d17fdc65
1 changed files with 6 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

9
drivers/gpu/drm/bridge/dw-hdmi.c
View File

@@ -2973,7 +2973,7 @@ static int dw_hdmi_status_show(struct seq_file *s, void *v)
struct dw_hdmi *hdmi = s->private;
u32 val;
seq_puts(s, "PHY ");
seq_puts(s, "PHY: ");
if (!hdmi->phy.enabled) {
seq_puts(s, "disabled\n");
return 0;
@@ -2983,9 +2983,12 @@ static int dw_hdmi_status_show(struct seq_file *s, void *v)
seq_puts(s, "HDMI\n");
else
seq_puts(s, "DVI\n");
if (hdmi->hdmi_data.video_mode.mtmdsclock > 340000000)
val = hdmi->hdmi_data.video_mode.mtmdsclock / 4;
else
val = hdmi->hdmi_data.video_mode.mtmdsclock;
seq_printf(s, "Pixel Clk: %uHz\t\tTMDS Clk: %uHz\n",
hdmi->hdmi_data.video_mode.mpixelclock,
hdmi->hdmi_data.video_mode.mtmdsclock);
hdmi->hdmi_data.video_mode.mpixelclock, val);
seq_puts(s, "Color Format: ");
if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format))
seq_puts(s, "RGB");