From a85ad02a4b83382518fb4d708a59eb66ec29b68c Mon Sep 17 00:00:00 2001 From: Rocky Hao Date: Mon, 4 Jun 2018 14:55:49 +0800 Subject: [PATCH] arm: dts: rockchip: thermal: update soc's sw/hw over temperature power off degree to cope with Wide Temperature Range test, we maxamize soc's sw/hw over temperature power off degree. fow now, 115 degree Celsius is set to trigger sw powering off. if sw function does not work and temperature is continuing to grow up, and till 120 degree Celsius, hw powering off/reset is triggered. Change-Id: I751e9ea754f434bc20df39fdbdb40216a1582c39 Signed-off-by: Rocky Hao --- arch/arm/boot/dts/rk322x.dtsi | 4 ++-- arch/arm/boot/dts/rk3288.dtsi | 7 ++++--- arch/arm64/boot/dts/rockchip/rk3328.dtsi | 4 ++-- arch/arm64/boot/dts/rockchip/rk3368.dtsi | 6 +++--- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 6 +++--- 5 files changed, 14 insertions(+), 13 deletions(-) diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi index 1e8eecfe21e8..e01d23506a4b 100644 --- a/arch/arm/boot/dts/rk322x.dtsi +++ b/arch/arm/boot/dts/rk322x.dtsi @@ -656,7 +656,7 @@ type = "passive"; }; soc_crit: soc-crit { - temperature = <90000>; /* millicelsius */ + temperature = <115000>; /* millicelsius */ hysteresis = <2000>; /* millicelsius */ type = "critical"; }; @@ -706,7 +706,7 @@ pinctrl-1 = <&otp_out>; pinctrl-2 = <&otp_gpio>; #thermal-sensor-cells = <0>; - rockchip,hw-tshut-temp = <95000>; + rockchip,hw-tshut-temp = <120000>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 0840ffb3205c..b55c4d363c8c 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -497,8 +497,8 @@ hysteresis = <2000>; /* millicelsius */ type = "passive"; }; - cpu_crit: cpu_crit { - temperature = <90000>; /* millicelsius */ + soc_crit: soc-crit { + temperature = <115000>; /* millicelsius */ hysteresis = <2000>; /* millicelsius */ type = "critical"; }; @@ -560,7 +560,8 @@ pinctrl-1 = <&otp_out>; pinctrl-2 = <&otp_gpio>; #thermal-sensor-cells = <1>; - rockchip,hw-tshut-temp = <95000>; + rockchip,hw-tshut-temp = <120000>; + rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */ status = "disabled"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index f69486665484..e87630e742d8 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -536,7 +536,7 @@ type = "passive"; }; soc_crit: soc-crit { - temperature = <95000>; + temperature = <115000>; hysteresis = <2000>; type = "critical"; }; @@ -583,7 +583,7 @@ resets = <&cru SRST_TSADC>; reset-names = "tsadc-apb"; rockchip,grf = <&grf>; - rockchip,hw-tshut-temp = <100000>; + rockchip,hw-tshut-temp = <120000>; #thermal-sensor-cells = <1>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index 9c24de1ba43c..1dd5c534a30b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -415,8 +415,8 @@ hysteresis = <2000>; /* millicelsius */ type = "passive"; }; - cpu_crit: cpu_crit { - temperature = <95000>; /* millicelsius */ + soc_crit: soc-crit { + temperature = <115000>; /* millicelsius */ hysteresis = <2000>; /* millicelsius */ type = "critical"; }; @@ -478,7 +478,7 @@ pinctrl-1 = <&otp_out>; pinctrl-2 = <&otp_gpio>; #thermal-sensor-cells = <1>; - rockchip,hw-tshut-temp = <95000>; + rockchip,hw-tshut-temp = <120000>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index b6bde952a80b..2cf7c966742c 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -802,8 +802,8 @@ type = "passive"; }; soc_crit: soc-crit { - temperature = <95000>; - hysteresis = <2000>; + temperature = <115000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ type = "critical"; }; }; @@ -849,7 +849,7 @@ resets = <&cru SRST_TSADC>; reset-names = "tsadc-apb"; rockchip,grf = <&grf>; - rockchip,hw-tshut-temp = <95000>; + rockchip,hw-tshut-temp = <120000>; pinctrl-names = "init", "default", "sleep"; pinctrl-0 = <&otp_gpio>; pinctrl-1 = <&otp_out>;