From a86d8b187bd7238ca889c88cdc6b6409fbc733c6 Mon Sep 17 00:00:00 2001
From: Brian Kim <brian.kim@hardkernel.com>
Date: Tue, 3 Jan 2017 16:05:54 +0900
Subject: [PATCH] regulator: s2mps11: odroidxu3: add ethernet power reset in
 shutdown

Ethernet device cannot be detected on warm boot sometimes. This patch is
to add the power reset routines for ethernet device using PMIC. Then
ethernet device can be reset hardware-wise.

Change-Id: Iffbe2966da7e4679f63b91ab79241167391792df
Signed-off-by: Brian Kim <brian.kim@hardkernel.com>
---
 drivers/regulator/s2mps11.c | 55 +++++++++++++++++++++++++++++++++++++
 1 file changed, 55 insertions(+)

diff --git a/drivers/regulator/s2mps11.c b/drivers/regulator/s2mps11.c
index 333d57a416d4..06acad24ca06 100644
--- a/drivers/regulator/s2mps11.c
+++ b/drivers/regulator/s2mps11.c
@@ -1091,6 +1091,57 @@ static const struct regulator_desc s2mpu02_regulators[] = {
 	regulator_desc_s2mpu02_buck7(7),
 };
 
+static int s2mps11_pmic_ethonoff(struct platform_device *pdev, bool onoff)
+{
+	struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
+	unsigned int reg_val = 0;
+	int ret = 0;
+
+	ret = regmap_read(iodev->regmap_pmic, S2MPS11_REG_L15CTRL, &reg_val);
+	if (ret) {
+		dev_err(&pdev->dev, "failed to read S2MPS11_REG_L15CTRL value\n");
+		return ret;
+	}
+
+	ret = regmap_read(iodev->regmap_pmic, S2MPS11_REG_L17CTRL, &reg_val);
+	if (ret) {
+		dev_err(&pdev->dev, "failed to read S2MPS11_REG_L17CTRL value\n");
+		return ret;
+	}
+
+	if (onoff) {
+		/* ETH VDD0 ON */
+		ret = regmap_update_bits(iodev->regmap_pmic, S2MPS11_REG_L15CTRL, 0xFF, 0x72);
+		if (ret) {
+			dev_err(&pdev->dev, "cannot update S2MPS11 LDO CTRL15 register\n");
+			return ret;
+		}
+
+		/* ETH VDD1 ON */
+		ret = regmap_update_bits(iodev->regmap_pmic, S2MPS11_REG_L17CTRL, 0xFF, 0x72);
+		if (ret) {
+			dev_err(&pdev->dev, "cannot update S2MPS11 LDO CTRL17 register\n");
+			return ret;
+		}
+	} else {
+		/* ETH VDD0 OFF */
+		ret = regmap_update_bits(iodev->regmap_pmic, S2MPS11_REG_L15CTRL, 0x3F, 0x00);
+		if (ret) {
+			dev_err(&pdev->dev, "cannot update S2MPS11 LDO CTRL15 register\n");
+			return ret;
+		}
+
+		/* ETH VDD1 OFF */
+		ret = regmap_update_bits(iodev->regmap_pmic, S2MPS11_REG_L17CTRL, 0x3F, 0x00);
+		if (ret) {
+			dev_err(&pdev->dev, "cannot update S2MPS11 LDO CTRL17 register\n");
+			return ret;
+		}
+	}
+
+	return ret;
+}
+
 static int s2mps11_pmic_probe(struct platform_device *pdev)
 {
 	struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
@@ -1267,6 +1318,8 @@ static void s2mps11_pmic_shutdown(struct platform_device *pdev)
                                 "could not update S2MPS11_REG_L19CTRL Error!!\n");
         }
 
+	s2mps11_pmic_ethonoff(pdev, false);
+
         mdelay(10);
 
         if (regmap_update_bits(iodev->regmap_pmic,
@@ -1280,6 +1333,8 @@ static void s2mps11_pmic_shutdown(struct platform_device *pdev)
                 dev_crit(&pdev->dev,
                                 "could not update S2MPS11_REG_L13CTRL Error!!\n");
         }
+
+	s2mps11_pmic_ethonoff(pdev, true);
 }
 
 static const struct platform_device_id s2mps11_pmic_id[] = {