From a90d2f00003e1798cf525d1fe16a856b18d28f8b Mon Sep 17 00:00:00 2001 From: Xing Zheng Date: Tue, 17 Jul 2018 12:58:38 +0800 Subject: [PATCH] ASoC: rockchip: i2s: add support 'rockchip,clk-trcm' property If there is only one lrck (tx or rx) by hardware, we need to use 'rockchip,clk-trcm' specify which lrck can be used. Change-Id: I3bf8d87a6bc8c45e183040012d87d8be21a4c133 Signed-off-by: Xing Zheng --- sound/soc/rockchip/rockchip_i2s.c | 22 +++++++++++++--------- 1 file changed, 13 insertions(+), 9 deletions(-) diff --git a/sound/soc/rockchip/rockchip_i2s.c b/sound/soc/rockchip/rockchip_i2s.c index 5a85d5b528b0..d29ab5c33468 100644 --- a/sound/soc/rockchip/rockchip_i2s.c +++ b/sound/soc/rockchip/rockchip_i2s.c @@ -54,6 +54,7 @@ struct rk_i2s_dev { const struct rk_i2s_pins *pins; unsigned int bclk_ratio; spinlock_t lock; /* tx/rx lock */ + unsigned int clk_trcm; }; static int i2s_runtime_suspend(struct device *dev) @@ -304,7 +305,6 @@ static int rockchip_i2s_hw_params(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { struct rk_i2s_dev *i2s = to_info(dai); - struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); unsigned int val = 0; unsigned int mclk_rate, bclk_rate, div_bclk, div_lrck; @@ -404,13 +404,6 @@ static int rockchip_i2s_hw_params(struct snd_pcm_substream *substream, regmap_update_bits(i2s->regmap, I2S_DMACR, I2S_DMACR_RDL_MASK, I2S_DMACR_RDL(16)); - val = I2S_CKR_TRCM_TXRX; - if (dai->driver->symmetric_rates && rtd->dai_link->symmetric_rates) - val = I2S_CKR_TRCM_TXONLY; - - regmap_update_bits(i2s->regmap, I2S_CKR, - I2S_CKR_TRCM_MASK, - val); return 0; } @@ -493,7 +486,6 @@ static const struct snd_soc_dai_ops rockchip_i2s_dai_ops = { static struct snd_soc_dai_driver rockchip_i2s_dai = { .probe = rockchip_i2s_dai_probe, .ops = &rockchip_i2s_dai_ops, - .symmetric_rates = 1, }; static const struct snd_soc_component_driver rockchip_i2s_component = { @@ -695,6 +687,18 @@ static int rockchip_i2s_init_dai(struct rk_i2s_dev *i2s, struct resource *res, } } + i2s->clk_trcm = I2S_CKR_TRCM_TXRX; + if (!of_property_read_u32(node, "rockchip,clk-trcm", &val)) { + if (val >= 0 && val <= 2) { + i2s->clk_trcm = val << I2S_CKR_TRCM_SHIFT; + if (i2s->clk_trcm) + dai->symmetric_rates = 1; + } + } + + regmap_update_bits(i2s->regmap, I2S_CKR, + I2S_CKR_TRCM_MASK, i2s->clk_trcm); + if (dp) *dp = dai;