From ab65fe5bce49a46a276aa52b798a6da295fe820d Mon Sep 17 00:00:00 2001 From: Wyon bi Date: Sat, 25 Dec 2021 16:28:48 +0800 Subject: [PATCH] arm64: dts: rockchip: rk3588: Drop unused reset from hdptxphy Signed-off-by: Wyon bi Change-Id: Ia9e9c76dcf24f6effd73f7e018d6e65ec1a587fb --- arch/arm64/boot/dts/rockchip/rk3588.dtsi | 9 +++------ arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 9 +++------ 2 files changed, 6 insertions(+), 12 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588.dtsi b/arch/arm64/boot/dts/rockchip/rk3588.dtsi index 5c57a8d0fbf6..fa9d72bec08b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588.dtsi @@ -686,12 +686,9 @@ reg = <0x0 0xfed70000 0x0 0x2000>; clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>, <&cru PCLK_HDPTX1>; clock-names = "ref", "apb"; - resets = <&cru SRST_HDPTX1>, <&cru SRST_P_HDPTX1>, - <&cru SRST_HDPTX1_INIT>, <&cru SRST_HDPTX1_CMN>, - <&cru SRST_HDPTX1_LANE>, <&cru SRST_HDPTX1_ROPLL>, - <&cru SRST_HDPTX1_LCPLL>; - reset-names = "phy", "apb", "init", "cmn", "lane", "ropll", - "lcpll"; + resets = <&cru SRST_P_HDPTX1>, <&cru SRST_HDPTX1_INIT>, + <&cru SRST_HDPTX1_CMN>, <&cru SRST_HDPTX1_LANE>; + reset-names = "apb", "init", "cmn", "lane"; rockchip,grf = <&hdptxphy1_grf>; #phy-cells = <0>; status = "disabled"; diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 323ac7f00282..f361ddf27896 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -4595,12 +4595,9 @@ reg = <0x0 0xfed60000 0x0 0x2000>; clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>, <&cru PCLK_HDPTX0>; clock-names = "ref", "apb"; - resets = <&cru SRST_HDPTX0>, <&cru SRST_P_HDPTX0>, - <&cru SRST_HDPTX0_INIT>, <&cru SRST_HDPTX0_CMN>, - <&cru SRST_HDPTX0_LANE>, <&cru SRST_HDPTX0_ROPLL>, - <&cru SRST_HDPTX0_LCPLL>; - reset-names = "phy", "apb", "init", "cmn", "lane", "ropll", - "lcpll"; + resets = <&cru SRST_P_HDPTX0>, <&cru SRST_HDPTX0_INIT>, + <&cru SRST_HDPTX0_CMN>, <&cru SRST_HDPTX0_LANE>; + reset-names = "apb", "init", "cmn", "lane"; rockchip,grf = <&hdptxphy0_grf>; #phy-cells = <0>; status = "disabled";