diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 2f965df707ab..2e27ca186624 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -284,6 +284,75 @@ reg = <0x0 0xfd5c8000 0x0 0x4000>; }; + usb2phy0_grf: syscon@fd5d0000 { + compatible = "rockchip,rk3588-usb2phy-grf", "syscon", + "simple-mfd"; + reg = <0x0 0xfd5d0000 0x0 0x4000>; + #address-cells = <1>; + #size-cells = <1>; + + u2phy0: usb2-phy@0 { + compatible = "rockchip,rk3588-usb2phy"; + reg = <0x0 0x10>; + interrupts = ; + clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>; + clock-names = "phyclk"; + #clock-cells = <0>; + status = "disabled"; + + u2phy0_otg: otg-port { + #phy-cells = <0>; + status = "disabled"; + }; + }; + }; + + usb2phy2_grf: syscon@fd5d8000 { + compatible = "rockchip,rk3588-usb2phy-grf", "syscon", + "simple-mfd"; + reg = <0x0 0xfd5d8000 0x0 0x4000>; + #address-cells = <1>; + #size-cells = <1>; + + u2phy2: usb2-phy@8000 { + compatible = "rockchip,rk3588-usb2phy"; + reg = <0x8000 0x10>; + interrupts = ; + clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>; + clock-names = "phyclk"; + #clock-cells = <0>; + status = "disabled"; + + u2phy2_host: host-port { + #phy-cells = <0>; + status = "disabled"; + }; + }; + }; + + usb2phy3_grf: syscon@fd5dc000 { + compatible = "rockchip,rk3588-usb2phy-grf", "syscon", + "simple-mfd"; + reg = <0x0 0xfd5dc000 0x0 0x4000>; + #address-cells = <1>; + #size-cells = <1>; + + u2phy3: usb2-phy@c000 { + compatible = "rockchip,rk3588-usb2phy"; + reg = <0xc000 0x10>; + interrupts = ; + clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>; + clock-names = "phyclk"; + #clock-cells = <0>; + status = "disabled"; + + u2phy3_host: host-port { + #phy-cells = <0>; + status = "disabled"; + }; + }; + }; + ioc: syscon@fd5f0000 { compatible = "rockchip,rk3588-ioc", "syscon"; reg = <0x0 0xfd5f0000 0x0 0x10000>;