From adb279b8e02ecd93865f717fe7a0f784ca0348da Mon Sep 17 00:00:00 2001 From: Elaine Zhang Date: Tue, 10 Nov 2020 09:37:57 +0800 Subject: [PATCH] clk: rockchip: rk3568: fix up the vpll register address Fix up the error description of TRM. Signed-off-by: Elaine Zhang Change-Id: I0a72c0c9d6070b53478e6a508fbc92c83a498c4b --- drivers/clk/rockchip/clk-rk3568.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/rockchip/clk-rk3568.c b/drivers/clk/rockchip/clk-rk3568.c index ab675d927592..1ac7e27bab34 100644 --- a/drivers/clk/rockchip/clk-rk3568.c +++ b/drivers/clk/rockchip/clk-rk3568.c @@ -319,7 +319,7 @@ static struct rockchip_pll_clock rk3568_pmu_pll_clks[] __initdata = { 0, RK3568_PMU_PLL_CON(0), RK3568_PMU_MODE_CON0, 0, 4, 0, rk3568_pll_rates), [hpll] = PLL(pll_rk3328, PLL_HPLL, "hpll", mux_pll_p, - 0, RK3568_PMU_PLL_CON(8), + 0, RK3568_PMU_PLL_CON(16), RK3568_PMU_MODE_CON0, 2, 7, 0, rk3568_pll_rates), };