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rk2928: rename hclk_nandc as nandc
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@@ -1887,7 +1887,7 @@ GATE_CLK(aclk_gps, aclk_periph_pre, ACLK_GPS);
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/*************************hclk_periph***********************/
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GATE_CLK(hclk_peri_axi_matrix, hclk_periph_pre, HCLK_PERI_AXI_MATRIX);
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GATE_CLK(hclk_peri_ahb_arbi, hclk_periph_pre, HCLK_PERI_ARBI);
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GATE_CLK(hclk_nandc, hclk_periph_pre, HCLK_NANDC);
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GATE_CLK(nandc, hclk_periph_pre, HCLK_NANDC);
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GATE_CLK(hclk_usb_peri, hclk_periph_pre, HCLK_USB_PERI);
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GATE_CLK(hclk_otg0, clk_hclk_usb_peri, HCLK_OTG0); // is not parent in clk tree, but when hclk_otg0/1 open,
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GATE_CLK(hclk_otg1, clk_hclk_usb_peri, HCLK_OTG1); // must open hclk_usb_peri
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@@ -2155,7 +2155,7 @@ static struct clk_lookup clks[] = {
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CLK_GATE_NODEV(hclk_peri_axi_matrix),
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CLK_GATE_NODEV(hclk_peri_ahb_arbi),
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CLK_GATE_NODEV(hclk_nandc),
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CLK_GATE_NODEV(nandc),
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CLK_GATE_NODEV(hclk_usb_peri),
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CLK_GATE_NODEV(hclk_otg0),
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CLK_GATE_NODEV(hclk_otg1),
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@@ -2273,7 +2273,7 @@ static void __init rk30_init_enable_clocks(void)
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/*************************hclk_periph***********************/
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clk_enable_nolock(&clk_hclk_peri_axi_matrix);
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clk_enable_nolock(&clk_hclk_peri_ahb_arbi);
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clk_enable_nolock(&clk_hclk_nandc);
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clk_enable_nolock(&clk_nandc);
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/*************************pclk_periph***********************/
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clk_enable_nolock(&clk_pclk_peri_axi_matrix);
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