From adc69b3cef804c61835c5e6129d251f2e05afe6d Mon Sep 17 00:00:00 2001 From: Zhichao Yu Date: Fri, 13 May 2022 10:28:10 +0800 Subject: [PATCH] ARM: dts: rockchip: rv1106-ipc: add coherent_pool=0 to bootargs Signed-off-by: Zhichao Yu Change-Id: I451f5b220e5395a7af78cdc4989e086fc977108e --- arch/arm/boot/dts/rv1106-ipc.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/rv1106-ipc.dtsi b/arch/arm/boot/dts/rv1106-ipc.dtsi index 8f3f00170038..6b6cf8138de1 100644 --- a/arch/arm/boot/dts/rv1106-ipc.dtsi +++ b/arch/arm/boot/dts/rv1106-ipc.dtsi @@ -6,7 +6,7 @@ / { chosen { - bootargs = "earlycon=uart8250,mmio32,0xff4c0000 console=ttyFIQ0 rootwait snd_soc_core.prealloc_buffer_size_kbytes=16"; + bootargs = "earlycon=uart8250,mmio32,0xff4c0000 console=ttyFIQ0 rootwait snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=0"; }; acodec_sound: acodec-sound {