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video: rockchip: hdmi: 3288/3368: phy pll support more vesa dmt clock

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Change-Id: I7382e5554664f2014bb5aa579a2524bf1738d971
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
This commit is contained in:
Zheng Yang
2015-09-15 09:30:33 +08:00
committed by Huang, Tao
parent f6656c7c7f
commit ae4c2644f3
1 changed files with 12 additions and 0 deletions
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12
drivers/video/rockchip/hdmi/rockchip-hdmiv2/rockchip_hdmiv2_hw.c
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@@ -19,6 +19,8 @@ static const struct phy_mpll_config_tab PHY_MPLL_TABLE[] = {
3, 3, 0, 3, 3, 0, 0},
{27000000, 54000000, 0, 16, 3, 0, 0,
2, 3, 0, 2, 5, 0, 1},
{65000000, 65000000, 0, 8, 0, 0, 0,
1, 3, 0, 2, 5, 0, 1},
/* {74250000, 74250000, 0, 8, 0, 0, 0,
1, 3, 0, 2, 5, 0, 1}, */
{74250000, 74250000, 0, 8, 0, 0, 0,
@@ -29,6 +31,16 @@ static const struct phy_mpll_config_tab PHY_MPLL_TABLE[] = {
1, 2, 0, 1, 7, 0, 2},
{74250000, 148500000, 0, 16, 3, 0, 0,
1, 3, 0, 1, 7, 0, 2},
{83500000, 83500000, 0, 8, 0, 0, 0,
1, 3, 0, 2, 5, 0, 1},
{85500000, 85500000, 0, 8, 0, 0, 0,
1, 3, 0, 2, 5, 0, 1},
{106500000, 106500000, 0, 8, 0, 0, 0,
1, 1, 0, 1, 7, 0, 2},
{108000000, 108000000, 0, 8, 0, 0, 0,
1, 1, 0, 1, 7, 0, 2},
{146250000, 146250000, 0, 8, 0, 0, 0,
1, 1, 0, 1, 7, 0, 2},
{148500000, 74250000, 0, 8, 0, 0, 0,
1, 1, 1, 1, 0, 0, 3},
{148500000, 148500000, 0, 8, 0, 0, 0,