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arm64: dts: ti: k3-am62: Remove duplicate GICR reg

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[ Upstream commit 72c691d77ea5d0c4636fd3e9f0ad80d813c7d1a7 ]

The GIC Redistributor control register range is mapped twice. Remove
the extra entry from the reg range.

Fixes: f1d17330a5 ("arm64: dts: ti: Introduce base support for AM62x SoC")
Reported-by: Bin Liu <b-liu@ti.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20241210-am62-gic-fixup-v1-1-758b4d5b4a0a@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Bryan Brattlof
2024-12-10 14:59:24 -06:00
committed by Greg Kroah-Hartman
parent d91c71aa96
commit aedfacb103
1 changed files with 0 additions and 1 deletions
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arch/arm64/boot/dts/ti/k3-am62-main.dtsi
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@@ -23,7 +23,6 @@
interrupt-controller; interrupt-controller;
reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */ reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */
<0x00 0x01880000 0x00 0xc0000>, /* GICR */ <0x00 0x01880000 0x00 0xc0000>, /* GICR */
<0x00 0x01880000 0x00 0xc0000>, /* GICR */
<0x01 0x00000000 0x00 0x2000>, /* GICC */ <0x01 0x00000000 0x00 0x2000>, /* GICC */
<0x01 0x00010000 0x00 0x1000>, /* GICH */ <0x01 0x00010000 0x00 0x1000>, /* GICH */
<0x01 0x00020000 0x00 0x2000>; /* GICV */ <0x01 0x00020000 0x00 0x2000>; /* GICV */