diff --git a/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi b/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi
index d2730d102627..b93d6f3bca5e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi
@@ -253,13 +253,20 @@
 	};
 	clk32k {
 		/omit-if-no-ref/
-		clk32k_pins: clk32k-pins {
+		clkin_32k: clkin-32k {
+			rockchip,pins =
+				<0 RK_PB0 1 &pcfg_pull_none>;
+		};
+
+		/omit-if-no-ref/
+		clk32k_out0: clk32k-out0 {
+			rockchip,pins =
+				<0 RK_PB0 2 &pcfg_pull_none>;
+		};
+
+		/omit-if-no-ref/
+		clk32k_out1: clk32k-out1 {
 			rockchip,pins =
-				/* clk32k_in */
-				<0 RK_PB0 1 &pcfg_pull_none>,
-				/* clk32k_out0 */
-				<0 RK_PB0 2 &pcfg_pull_none>,
-				/* clk32k_out1 */
 				<2 RK_PC6 1 &pcfg_pull_none>;
 		};
 	};
diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
index 3b4a7b62e58f..55bb5fea25ad 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
@@ -205,6 +205,15 @@
 		clock-output-names = "xin24m";
 	};
 
+	xin32k: xin32k {
+		compatible = "fixed-clock";
+		clock-frequency = <32768>;
+		clock-output-names = "xin32k";
+		#clock-cells = <0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&clk32k_out0>;
+	};
+
 	sata0: sata@fc000000 {
 		compatible = "snps,dwc-ahci";
 		reg = <0 0xfc000000 0 0x1000>;
@@ -546,8 +555,12 @@
 		compatible = "rockchip,rk3568-pmucru";
 		reg = <0x0 0xfdd00000 0x0 0x1000>;
 		rockchip,grf = <&grf>;
+		rockchip,pmugrf = <&pmugrf>;
 		#clock-cells = <1>;
 		#reset-cells = <1>;
+
+		assigned-clocks = <&pmucru SCLK_32K_IOE>;
+		assigned-clock-parents = <&pmucru CLK_RTC_32K>;
 	};
 
 	cru: clock-controller@fdd20000 {