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ARM: dts: rv1126: add SPI0 and SPI1 node

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Change-Id: I15c9c665291a586204b71fcf7066928745887717
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
This commit is contained in:
Jon Lin
2020-03-10 10:53:12 +08:00
committed by Tao Huang
parent 86aa9308c9
commit b06291815d
1 changed files with 32 additions and 0 deletions
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32
arch/arm/boot/dts/rv1126.dtsi
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@@ -33,6 +33,8 @@
serial3 = &uart3;
serial4 = &uart4;
serial5 = &uart5;
spi0 = &spi0;
spi1 = &spi1;
};
cpus {
@@ -590,6 +592,21 @@
status = "disabled";
};
spi0: spi@ff450000 {
compatible = "rockchip,rv1126-spi", "rockchip,rk3066-spi";
reg = <0xff450000 0x1000>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
clocks = <&cru CLK_SPI0>, <&cru PCLK_SPI0>;
clock-names = "spiclk", "apb_pclk";
dmas = <&dmac 1>, <&dmac 0>;
dma-names = "tx", "rx";
pinctrl-names = "default", "high_speed";
pinctrl-0 = <&spi0m0_clk &spi0m0_cs0n &spi0m0_cs1n &spi0m0_miso &spi0m0_mosi>;
pinctrl-1 = <&spi0m0_clk_hs &spi0m0_cs0n &spi0m0_cs1n &spi0m0_miso_hs &spi0m0_mosi_hs>;
status = "disabled";
};
pvtm@ff470000 {
compatible = "rockchip,rv1126-pmu-pvtm";
reg = <0xff470000 0x100>;
@@ -862,6 +879,21 @@
status = "disabled";
};
spi1: spi@ff5b0000 {
compatible = "rockchip,rv1126-spi", "rockchip,rk3066-spi";
reg = <0xff5b0000 0x1000>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
clocks = <&cru CLK_SPI1>, <&cru PCLK_SPI1>;
clock-names = "spiclk", "apb_pclk";
dmas = <&dmac 3>, <&dmac 2>;
dma-names = "tx", "rx";
pinctrl-names = "default", "high_speed";
pinctrl-0 = <&spi1m0_clk &spi1m0_cs0n &spi1m0_cs1n &spi1m0_miso &spi1m0_mosi>;
pinctrl-1 = <&spi1m0_clk_hs &spi1m0_cs0n &spi1m0_cs1n &spi1m0_miso_hs &spi1m0_mosi_hs>;
status = "disabled";
};
otp: otp@ff5c0000 {
compatible = "rockchip,rv1126-otp";
reg = <0xff5c0000 0x1000>;