From b147d4da8f3b7bebbb2dcf5e3f9258cadedaa0c7 Mon Sep 17 00:00:00 2001 From: Sugar Zhang Date: Sun, 18 Jun 2023 21:55:24 +0800 Subject: [PATCH] ASoC: rockchip: pdm: Fix clear on runtime resume register PDM_SYSCONFIG is marked as volatile, and for regcache sync policy, it will skip the registers which marked as volatile. so, we should do it after regcache sync. Signed-off-by: Sugar Zhang Signed-off-by: Tao Huang Change-Id: Ic65bc28d14fefc6e6c70e1b2c26468aa0fcd142e --- sound/soc/rockchip/rockchip_pdm.c | 30 ++++++++++++++++-------------- 1 file changed, 16 insertions(+), 14 deletions(-) diff --git a/sound/soc/rockchip/rockchip_pdm.c b/sound/soc/rockchip/rockchip_pdm.c index a4b2a3f44a8f..d2f903f767ed 100644 --- a/sound/soc/rockchip/rockchip_pdm.c +++ b/sound/soc/rockchip/rockchip_pdm.c @@ -741,27 +741,29 @@ static int rockchip_pdm_runtime_resume(struct device *dev) int ret; ret = clk_prepare_enable(pdm->clk); - if (ret) { - dev_err(pdm->dev, "clock enable failed %d\n", ret); - return ret; - } + if (ret) + goto err_clk; ret = clk_prepare_enable(pdm->hclk); - if (ret) { - clk_disable_unprepare(pdm->clk); - dev_err(pdm->dev, "hclock enable failed %d\n", ret); - return ret; - } + if (ret) + goto err_hclk; - rockchip_pdm_rxctrl(pdm, 0); regcache_cache_only(pdm->regmap, false); regcache_mark_dirty(pdm->regmap); ret = regcache_sync(pdm->regmap); - if (ret) { - clk_disable_unprepare(pdm->clk); - clk_disable_unprepare(pdm->hclk); - } + if (ret) + goto err_regmap; + + rockchip_pdm_rxctrl(pdm, 0); + return 0; + +err_regmap: + clk_disable_unprepare(pdm->hclk); +err_hclk: + clk_disable_unprepare(pdm->clk); +err_clk: + return ret; } static bool rockchip_pdm_wr_reg(struct device *dev, unsigned int reg)