From b19eb7a962c8da701d4283922f180d09cd9bafa7 Mon Sep 17 00:00:00 2001 From: Zefa Chen Date: Fri, 25 Jul 2025 21:38:26 +0800 Subject: [PATCH] media: rockchip: vicap add reg of read size for rv1126b Change-Id: I6d9cd3324af1aefacd978fb659ae347a3e7300af Signed-off-by: Zefa Chen --- drivers/media/platform/rockchip/cif/hw.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/media/platform/rockchip/cif/hw.c b/drivers/media/platform/rockchip/cif/hw.c index 814c4555bc09..5bd05055f507 100644 --- a/drivers/media/platform/rockchip/cif/hw.c +++ b/drivers/media/platform/rockchip/cif/hw.c @@ -1303,6 +1303,10 @@ static const struct cif_reg rv1126b_cif_regs[] = { [CIF_REG_MIPI_SET_SIZE_ID1] = CIF_REG(CSI_MIPI0_SET_FRAME_SIZE_ID1_RV1126B), [CIF_REG_MIPI_SET_SIZE_ID2] = CIF_REG(CSI_MIPI0_SET_FRAME_SIZE_ID2_RV1126B), [CIF_REG_MIPI_SET_SIZE_ID3] = CIF_REG(CSI_MIPI0_SET_FRAME_SIZE_ID3_RV1126B), + [CIF_REG_MIPI_FRAME_SIZE_ID0] = CIF_REG(CSI_MIPI0_FRAME_SIZE_ID0), + [CIF_REG_MIPI_FRAME_SIZE_ID1] = CIF_REG(CSI_MIPI0_FRAME_SIZE_ID1), + [CIF_REG_MIPI_FRAME_SIZE_ID2] = CIF_REG(CSI_MIPI0_FRAME_SIZE_ID2), + [CIF_REG_MIPI_FRAME_SIZE_ID3] = CIF_REG(CSI_MIPI0_FRAME_SIZE_ID3), [CIF_REG_GLB_CTRL] = CIF_REG(GLB_CTRL), [CIF_REG_GLB_INTEN] = CIF_REG(GLB_INTEN),